From bcad0aaee635d75be9c27b8792f0f69dedd03a57 Mon Sep 17 00:00:00 2001 From: Gedare Bloom Date: Tue, 22 Jun 2021 19:55:39 -0600 Subject: bsps/aarch64: add mnemonic for ICC_IGRPEN1_EL3 --- bsps/shared/dev/irq/arm-gicv3.c | 1 + 1 file changed, 1 insertion(+) (limited to 'bsps/shared/dev/irq/arm-gicv3.c') diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c index 113b840068..7a0d42b27b 100644 --- a/bsps/shared/dev/irq/arm-gicv3.c +++ b/bsps/shared/dev/irq/arm-gicv3.c @@ -112,6 +112,7 @@ /* AArch64 GICv3 registers are not named in GCC */ #define ICC_IGRPEN0 "S3_0_C12_C12_6, %0" #define ICC_IGRPEN1 "S3_0_C12_C12_7, %0" +#define ICC_IGRPEN1_EL3 "S3_6_C12_C12_7, %0" #define ICC_PMR "S3_0_C4_C6_0, %0" #define ICC_EOIR1 "S3_0_C12_C12_1, %0" #define ICC_SRE "S3_0_C12_C12_5, %0" -- cgit v1.2.3