From 747fb65c6e5921c39c324c6e86ab2f2d87b47ee0 Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Thu, 10 Dec 2020 09:09:10 +0100
Subject: bsps: Add GICv3 arm_gic_irq_processor_count()

Update #4202.
---
 bsps/shared/dev/irq/arm-gicv3.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

(limited to 'bsps/shared/dev/irq/arm-gicv3.c')

diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index 536abdfc35..e23778ea37 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -354,3 +354,30 @@ void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
 #endif
   WRITE64_SR(ICC_SGI1, value);
 }
+
+uint32_t arm_gic_irq_processor_count(void)
+{
+  volatile gic_dist *dist = ARM_GIC_DIST;
+  uint32_t cpu_count;
+
+  if ((dist->icddcr & GIC_DIST_ICDDCR_ARE_S) == 0) {
+    cpu_count = GIC_DIST_ICDICTR_CPU_NUMBER_GET(dist->icdictr) + 1;
+  } else {
+    int i;
+
+    /* Assume that an interrupt export port exists */
+    cpu_count = 0;
+
+    for (i = 0; i < CPU_MAXIMUM_PROCESSORS; ++i) {
+      volatile gic_redist *redist = gicv3_get_redist(i);
+
+      if ((redist->icrtyper & GIC_REDIST_ICRTYPER_LAST) != 0) {
+        break;
+      }
+
+      ++cpu_count;
+    }
+  }
+
+  return cpu_count;
+}
-- 
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