From 026eb3db7e61ed29ff3b676c126168bf08dfe0a8 Mon Sep 17 00:00:00 2001 From: Chris Johns Date: Mon, 15 Feb 2021 12:27:14 -1000 Subject: powerpc/motorola_powerpc: Add cache coherent memory to the allocator Updates #4245 Updates #4243 --- bsps/powerpc/motorola_powerpc/start/bspstart.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'bsps/powerpc/motorola_powerpc/start/bspstart.c') diff --git a/bsps/powerpc/motorola_powerpc/start/bspstart.c b/bsps/powerpc/motorola_powerpc/start/bspstart.c index ef8418e2c6..a781297565 100644 --- a/bsps/powerpc/motorola_powerpc/start/bspstart.c +++ b/bsps/powerpc/motorola_powerpc/start/bspstart.c @@ -44,6 +44,9 @@ extern void set_L2CR(unsigned); extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *); extern void BSP_pgtbl_activate(Triv121PgTbl); +#define PPC_MIN_BAT_SIZE (128 * 1024) +static char cc_memory[PPC_MIN_BAT_SIZE] RTEMS_ALIGNED(PPC_MIN_BAT_SIZE); + SPR_RW(SPRG1) #if defined(DEBUG_BATS) @@ -351,6 +354,9 @@ static void bsp_early( void ) setdbat(3, 0, 0, 0, 0); } + setdbat(3, (intptr_t) &cc_memory[0], (intptr_t) &cc_memory[0], PPC_MIN_BAT_SIZE, IO_PAGE); + rtems_cache_coherent_add_area(&cc_memory[0], PPC_MIN_BAT_SIZE); + #if defined(DEBUG_BATS) ShowBATS(); #endif -- cgit v1.2.3