From c991eeeccc21901011ddd9ecc626c4d164fe2041 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 4 Mar 2019 15:32:15 +0100 Subject: bsps: Adjust bsp.h Doxygen groups Update #3706. --- bsps/arm/xilinx-zynq/include/bsp.h | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'bsps/arm/xilinx-zynq/include/bsp.h') diff --git a/bsps/arm/xilinx-zynq/include/bsp.h b/bsps/arm/xilinx-zynq/include/bsp.h index 72b98193d2..43568980be 100644 --- a/bsps/arm/xilinx-zynq/include/bsp.h +++ b/bsps/arm/xilinx-zynq/include/bsp.h @@ -1,6 +1,6 @@ /** * @file - * @ingroup arm_zynq + * @ingroup RTEMSBSPsARMZynq * @brief Global BSP definitions. */ @@ -21,6 +21,16 @@ #ifndef LIBBSP_ARM_XILINX_ZYNQ_BSP_H #define LIBBSP_ARM_XILINX_ZYNQ_BSP_H +/** + * @defgroup RTEMSBSPsARMZynq Xilinx Zynq + * + * @ingroup RTEMSBSPsARM + * + * @brief Xilinx Zynq Board Support Package. + * + * @{ + */ + #include #define BSP_FEATURE_IRQ_EXTENSION @@ -36,13 +46,6 @@ extern "C" { #endif /* __cplusplus */ -/** - * @defgroup arm_zynq Xilinx-Zynq Support - * @ingroup RTEMSBSPsARM - * @brief Xilinz-Zynq Board Support Package - * @{ - */ - #define BSP_ARM_A9MPCORE_SCU_BASE 0xf8f00000 #define BSP_ARM_GIC_CPUIF_BASE 0xf8f00100 @@ -69,12 +72,12 @@ BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void); uint32_t zynq_clock_cpu_1x(void); -/** @} */ - #ifdef __cplusplus } #endif /* __cplusplus */ #endif /* ASM */ +/** @} */ + #endif /* LIBBSP_ARM_XILINX_ZYNQ_BSP_H */ -- cgit v1.2.3