From fe58f6ce4bf1ff5e92d64b9fee0cb46b6ac06e64 Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Thu, 26 Nov 2020 08:13:52 +0100
Subject: bsp/stm32h7: Add and use BSP Doxygen group

Update #3910.
---
 bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

(limited to 'bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h')

diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h
index 4eca439036..1b5d5b36bf 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h
@@ -37,11 +37,13 @@
   */
 /* Exported types ------------------------------------------------------------*/
 /** @defgroup CORTEX_Exported_Types Cortex Exported Types
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 
 #if (__MPU_PRESENT == 1)
 /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @brief  MPU Region initialization structure
   * @{
   */
@@ -81,10 +83,12 @@ typedef struct
 /* Exported constants --------------------------------------------------------*/
 
 /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 
 /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define NVIC_PRIORITYGROUP_0         ((uint32_t)0x00000007) /*!< 0 bits for pre-emption priority
@@ -102,6 +106,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define SYSTICK_CLKSOURCE_HCLK_DIV8    ((uint32_t)0x00000000)
@@ -113,6 +118,7 @@ typedef struct
 
 #if (__MPU_PRESENT == 1)
 /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_HFNMI_PRIVDEF_NONE      ((uint32_t)0x00000000)
@@ -124,6 +130,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_REGION_ENABLE     ((uint8_t)0x01)
@@ -133,6 +140,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_INSTRUCTION_ACCESS_ENABLE      ((uint8_t)0x00)
@@ -142,6 +150,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_ACCESS_SHAREABLE        ((uint8_t)0x01)
@@ -151,6 +160,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_ACCESS_CACHEABLE         ((uint8_t)0x01)
@@ -160,6 +170,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_ACCESS_BUFFERABLE         ((uint8_t)0x01)
@@ -169,6 +180,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_TEX_LEVEL0    ((uint8_t)0x00)
@@ -179,6 +191,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define   MPU_REGION_SIZE_32B      ((uint8_t)0x04)
@@ -214,6 +227,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_REGION_NO_ACCESS      ((uint8_t)0x00)
@@ -227,6 +241,7 @@ typedef struct
   */
 
 /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define  MPU_REGION_NUMBER0    ((uint8_t)0x00)
@@ -260,6 +275,7 @@ typedef struct
 
 /* Exported Macros -----------------------------------------------------------*/
 /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 
@@ -270,6 +286,7 @@ typedef struct
 
 
 /** @defgroup CORTEX_CPU_Identifier CORTEX_CPU_Identifier
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define CM7_CPUID        ((uint32_t)0x00000003)
@@ -335,6 +352,7 @@ uint32_t HAL_GetCurrentCPUID(void);
 /* Private constants ---------------------------------------------------------*/
 /* Private macros ------------------------------------------------------------*/
 /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
+  * @ingroup RTEMSBSPsARMSTM32H7
   * @{
   */
 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
-- 
cgit v1.2.3