From 0d3453a47e522fbb13b211e44ce4007b666686f3 Mon Sep 17 00:00:00 2001 From: Christian Mauderer Date: Fri, 28 May 2021 16:54:00 +0200 Subject: bsps/imxrt: Simplify linkcmds and make it flexible Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes it simpler to support other types of external RAM. This patch also removes some of the calculations and improves names and documentation to avoid pitfalls. It removes a unnecessary memory definition. Update #4180 --- bsps/arm/imxrt/include/imxrt/memory.h | 34 ++++++++-------- bsps/arm/imxrt/start/flash-boot-data.c | 4 +- bsps/arm/imxrt/start/flash-config.c | 60 ----------------------------- bsps/arm/imxrt/start/flash-flexspi-config.c | 60 +++++++++++++++++++++++++++++ bsps/arm/imxrt/start/linkcmds.flexspi | 38 +++++++++--------- bsps/arm/imxrt/start/linkcmds.sdram | 34 ++++++++-------- bsps/arm/imxrt/start/mpu-config.c | 12 +++--- 7 files changed, 119 insertions(+), 123 deletions(-) delete mode 100644 bsps/arm/imxrt/start/flash-config.c create mode 100644 bsps/arm/imxrt/start/flash-flexspi-config.c (limited to 'bsps/arm/imxrt') diff --git a/bsps/arm/imxrt/include/imxrt/memory.h b/bsps/arm/imxrt/include/imxrt/memory.h index 8185f713cc..47bb10f41e 100644 --- a/bsps/arm/imxrt/include/imxrt/memory.h +++ b/bsps/arm/imxrt/include/imxrt/memory.h @@ -56,29 +56,25 @@ extern char imxrt_memory_peripheral_begin[]; extern char imxrt_memory_peripheral_end[]; extern char imxrt_memory_peripheral_size[]; -extern char imxrt_memory_flexspi_config_begin[]; -extern char imxrt_memory_flexspi_config_end[]; -extern char imxrt_memory_flexspi_config_size[]; +extern char imxrt_memory_flash_config_begin[]; +extern char imxrt_memory_flash_config_end[]; +extern char imxrt_memory_flash_config_size[]; -extern char imxrt_memory_flexspi_ivt_begin[]; -extern char imxrt_memory_flexspi_ivt_end[]; -extern char imxrt_memory_flexspi_ivt_size[]; +extern char imxrt_memory_flash_ivt_begin[]; +extern char imxrt_memory_flash_ivt_end[]; +extern char imxrt_memory_flash_ivt_size[]; -extern char imxrt_memory_flexspi_begin[]; -extern char imxrt_memory_flexspi_end[]; -extern char imxrt_memory_flexspi_size[]; +extern char imxrt_memory_flash_begin[]; +extern char imxrt_memory_flash_end[]; +extern char imxrt_memory_flash_size[]; -extern char imxrt_memory_flexspi_fifo_begin[]; -extern char imxrt_memory_flexspi_fifo_end[]; -extern char imxrt_memory_flexspi_fifo_size[]; +extern char imxrt_memory_extram_begin[]; +extern char imxrt_memory_extram_end[]; +extern char imxrt_memory_extram_size[]; -extern char imxrt_memory_sdram_begin[]; -extern char imxrt_memory_sdram_end[]; -extern char imxrt_memory_sdram_size[]; - -extern char imxrt_memory_sdram_nocache_begin[]; -extern char imxrt_memory_sdram_nocache_end[]; -extern char imxrt_memory_sdram_nocache_size[]; +extern char imxrt_memory_extram_nocache_begin[]; +extern char imxrt_memory_extram_nocache_end[]; +extern char imxrt_memory_extram_nocache_size[]; #ifdef __cplusplus } diff --git a/bsps/arm/imxrt/start/flash-boot-data.c b/bsps/arm/imxrt/start/flash-boot-data.c index cf0430af72..a1877f4d26 100644 --- a/bsps/arm/imxrt/start/flash-boot-data.c +++ b/bsps/arm/imxrt/start/flash-boot-data.c @@ -30,8 +30,8 @@ #include const BOOT_DATA_T imxrt_boot_data = { - .start = (uint32_t) imxrt_memory_flexspi_config_begin, - .size = IMXRT_MEMORY_FLEXSPI_FLASH_SIZE, + .start = (uint32_t) imxrt_memory_flash_config_begin, + .size = IMXRT_MEMORY_FLASH_SIZE, .plugin = PLUGIN_FLAG, .placeholder = 0xFFFFFFFF, }; diff --git a/bsps/arm/imxrt/start/flash-config.c b/bsps/arm/imxrt/start/flash-config.c deleted file mode 100644 index 07324f1330..0000000000 --- a/bsps/arm/imxrt/start/flash-config.c +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -const flexspi_nor_config_t imxrt_flexspi_config = { - .memConfig = { - .tag = FLEXSPI_CFG_BLK_TAG, - .version = FLEXSPI_CFG_BLK_VERSION, - .readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad, - .csHoldTime = 3u, - .csSetupTime = 3u, - .columnAddressWidth = 3u, - .controllerMiscOption = (1 << kFlexSpiMiscOffset_DdrModeEnable) | - (1 << kFlexSpiMiscOffset_WordAddressableEnable) | - (1 << kFlexSpiMiscOffset_SafeConfigFreqEnable) | - (1 << kFlexSpiMiscOffset_DiffClkEnable), - .deviceType = kFlexSpiDeviceType_SerialRAM, - .sflashPadType = kSerialFlash_8Pads, - .serialClkFreq = kFlexSpiSerialClk_133MHz, - .sflashA1Size = IMXRT_MEMORY_FLEXSPI_FLASH_SIZE, - .dataValidTime = {16u, 16u}, - .lookupTable = { - FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18), - FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06), - FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0), - }, - .lutCustomSeq = {{0,0},{0,0},{0,0},{0,0},{0,0},{0,0}, - {0,0},{0,0},{0,0},{0,0},{0,0},{0,0}}, - }, - .pageSize = 0x200, - .sectorSize = 0x40000, - .blockSize = 0x40000, - .isUniformBlockSize = 1, -}; diff --git a/bsps/arm/imxrt/start/flash-flexspi-config.c b/bsps/arm/imxrt/start/flash-flexspi-config.c new file mode 100644 index 0000000000..50eca19b20 --- /dev/null +++ b/bsps/arm/imxrt/start/flash-flexspi-config.c @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +const flexspi_nor_config_t imxrt_flexspi_config = { + .memConfig = { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad, + .csHoldTime = 3u, + .csSetupTime = 3u, + .columnAddressWidth = 3u, + .controllerMiscOption = (1 << kFlexSpiMiscOffset_DdrModeEnable) | + (1 << kFlexSpiMiscOffset_WordAddressableEnable) | + (1 << kFlexSpiMiscOffset_SafeConfigFreqEnable) | + (1 << kFlexSpiMiscOffset_DiffClkEnable), + .deviceType = kFlexSpiDeviceType_SerialRAM, + .sflashPadType = kSerialFlash_8Pads, + .serialClkFreq = kFlexSpiSerialClk_133MHz, + .sflashA1Size = IMXRT_MEMORY_FLASH_SIZE, + .dataValidTime = {16u, 16u}, + .lookupTable = { + FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18), + FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06), + FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0), + }, + .lutCustomSeq = {{0,0},{0,0},{0,0},{0,0},{0,0},{0,0}, + {0,0},{0,0},{0,0},{0,0},{0,0},{0,0}}, + }, + .pageSize = 0x200, + .sectorSize = 0x40000, + .blockSize = 0x40000, + .isUniformBlockSize = 1, +}; diff --git a/bsps/arm/imxrt/start/linkcmds.flexspi b/bsps/arm/imxrt/start/linkcmds.flexspi index 4196bb33e5..ceed164894 100644 --- a/bsps/arm/imxrt/start/linkcmds.flexspi +++ b/bsps/arm/imxrt/start/linkcmds.flexspi @@ -1,22 +1,22 @@ INCLUDE linkcmds.memory -REGION_ALIAS ("REGION_START", FLEXSPI); -REGION_ALIAS ("REGION_VECTOR", FLEXSPI); -REGION_ALIAS ("REGION_TEXT", FLEXSPI); -REGION_ALIAS ("REGION_TEXT_LOAD", FLEXSPI); -REGION_ALIAS ("REGION_RODATA", FLEXSPI); -REGION_ALIAS ("REGION_RODATA_LOAD", FLEXSPI); -REGION_ALIAS ("REGION_DATA", SDRAM); -REGION_ALIAS ("REGION_DATA_LOAD", FLEXSPI); -REGION_ALIAS ("REGION_FAST_TEXT", FLEXSPI); -REGION_ALIAS ("REGION_FAST_TEXT_LOAD", FLEXSPI); -REGION_ALIAS ("REGION_FAST_DATA", SDRAM); -REGION_ALIAS ("REGION_FAST_DATA_LOAD", FLEXSPI); -REGION_ALIAS ("REGION_BSS", SDRAM); -REGION_ALIAS ("REGION_WORK", SDRAM); -REGION_ALIAS ("REGION_STACK", SDRAM); -REGION_ALIAS ("REGION_NOCACHE", SDRAM_NOCACHE); -REGION_ALIAS ("REGION_NOCACHE_LOAD", FLEXSPI); +REGION_ALIAS ("REGION_START", FLASH); +REGION_ALIAS ("REGION_VECTOR", FLASH); +REGION_ALIAS ("REGION_TEXT", FLASH); +REGION_ALIAS ("REGION_TEXT_LOAD", FLASH); +REGION_ALIAS ("REGION_RODATA", FLASH); +REGION_ALIAS ("REGION_RODATA_LOAD", FLASH); +REGION_ALIAS ("REGION_DATA", EXTRAM); +REGION_ALIAS ("REGION_DATA_LOAD", FLASH); +REGION_ALIAS ("REGION_FAST_TEXT", FLASH); +REGION_ALIAS ("REGION_FAST_TEXT_LOAD", FLASH); +REGION_ALIAS ("REGION_FAST_DATA", EXTRAM); +REGION_ALIAS ("REGION_FAST_DATA_LOAD", FLASH); +REGION_ALIAS ("REGION_BSS", EXTRAM); +REGION_ALIAS ("REGION_WORK", EXTRAM); +REGION_ALIAS ("REGION_STACK", EXTRAM); +REGION_ALIAS ("REGION_NOCACHE", EXTRAM_NOCACHE); +REGION_ALIAS ("REGION_NOCACHE_LOAD", FLASH); bsp_vector_table_in_start_section = 1; @@ -24,12 +24,12 @@ SECTIONS { . = imxrt_memory_flexspi_begin; .flash_config : ALIGN_WITH_INPUT { KEEP(*(.boot_hdr.conf)) - } > FLEXSPI_CONFIG AT > FLEXSPI_CONFIG + } > FLASH_CONFIG AT > FLASH_CONFIG .flash_ivt : ALIGN_WITH_INPUT { KEEP(*(.boot_hdr.ivt)) KEEP(*(.boot_hdr.boot_data)) KEEP(*(.boot_hdr.dcd_data)) - } > FLEXSPI_IVT AT > FLEXSPI_IVT + } > FLASH_IVT AT > FLASH_IVT } INCLUDE linkcmds.armv7m diff --git a/bsps/arm/imxrt/start/linkcmds.sdram b/bsps/arm/imxrt/start/linkcmds.sdram index 87d1dffa53..b1b90e32d6 100644 --- a/bsps/arm/imxrt/start/linkcmds.sdram +++ b/bsps/arm/imxrt/start/linkcmds.sdram @@ -1,22 +1,22 @@ INCLUDE linkcmds.memory -REGION_ALIAS ("REGION_START", SDRAM); -REGION_ALIAS ("REGION_VECTOR", SDRAM); -REGION_ALIAS ("REGION_TEXT", SDRAM); -REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM); -REGION_ALIAS ("REGION_RODATA", SDRAM); -REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM); -REGION_ALIAS ("REGION_DATA", SDRAM); -REGION_ALIAS ("REGION_DATA_LOAD", SDRAM); -REGION_ALIAS ("REGION_FAST_TEXT", SDRAM); -REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM); -REGION_ALIAS ("REGION_FAST_DATA", SDRAM); -REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM); -REGION_ALIAS ("REGION_BSS", SDRAM); -REGION_ALIAS ("REGION_WORK", SDRAM); -REGION_ALIAS ("REGION_STACK", SDRAM); -REGION_ALIAS ("REGION_NOCACHE", SDRAM_NOCACHE); -REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM); +REGION_ALIAS ("REGION_START", EXTRAM); +REGION_ALIAS ("REGION_VECTOR", EXTRAM); +REGION_ALIAS ("REGION_TEXT", EXTRAM); +REGION_ALIAS ("REGION_TEXT_LOAD", EXTRAM); +REGION_ALIAS ("REGION_RODATA", EXTRAM); +REGION_ALIAS ("REGION_RODATA_LOAD", EXTRAM); +REGION_ALIAS ("REGION_DATA", EXTRAM); +REGION_ALIAS ("REGION_DATA_LOAD", EXTRAM); +REGION_ALIAS ("REGION_FAST_TEXT", EXTRAM); +REGION_ALIAS ("REGION_FAST_TEXT_LOAD", EXTRAM); +REGION_ALIAS ("REGION_FAST_DATA", EXTRAM); +REGION_ALIAS ("REGION_FAST_DATA_LOAD", EXTRAM); +REGION_ALIAS ("REGION_BSS", EXTRAM); +REGION_ALIAS ("REGION_WORK", EXTRAM); +REGION_ALIAS ("REGION_STACK", EXTRAM); +REGION_ALIAS ("REGION_NOCACHE", EXTRAM_NOCACHE); +REGION_ALIAS ("REGION_NOCACHE_LOAD", EXTRAM); bsp_vector_table_in_start_section = 1; diff --git a/bsps/arm/imxrt/start/mpu-config.c b/bsps/arm/imxrt/start/mpu-config.c index 683b26d45b..79800ac431 100644 --- a/bsps/arm/imxrt/start/mpu-config.c +++ b/bsps/arm/imxrt/start/mpu-config.c @@ -32,8 +32,8 @@ BSP_START_DATA_SECTION const ARMV7M_MPU_Region_config imxrt_config_mpu_region [] = { { - .begin = imxrt_memory_sdram_begin, - .end = imxrt_memory_sdram_end, + .begin = imxrt_memory_extram_begin, + .end = imxrt_memory_extram_end, .rasr = ARMV7M_MPU_RASR_AP(0x3) | ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B | ARMV7M_MPU_RASR_ENABLE, @@ -44,14 +44,14 @@ BSP_START_DATA_SECTION const ARMV7M_MPU_Region_config | ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B | ARMV7M_MPU_RASR_ENABLE, }, { - .begin = imxrt_memory_flexspi_config_begin, - .end = imxrt_memory_flexspi_end, + .begin = imxrt_memory_flash_config_begin, + .end = imxrt_memory_flash_end, .rasr = ARMV7M_MPU_RASR_AP(0x3) | ARMV7M_MPU_RASR_TEX(0x1) | ARMV7M_MPU_RASR_C | ARMV7M_MPU_RASR_B | ARMV7M_MPU_RASR_ENABLE, }, { - .begin = imxrt_memory_sdram_nocache_begin, - .end = imxrt_memory_sdram_nocache_end, + .begin = imxrt_memory_extram_nocache_begin, + .end = imxrt_memory_extram_nocache_end, .rasr = ARMV7M_MPU_RASR_AP(0x3) | ARMV7M_MPU_RASR_TEX(0x2) | ARMV7M_MPU_RASR_ENABLE, -- cgit v1.2.3