From adb85dd473af5c9a72e9da9b7fe013d1b216abc3 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Sat, 21 Apr 2018 10:22:08 +0200 Subject: bsps: Move make/custom/* files to bsps Adjust various build files. Remove automatic generation of the c/src/lib/libbsp/*/acinclude.m4 files from bootstrap script. This patch is a part of the BSP source reorganization. Update #3285. --- bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg | 5 +++++ bsps/arm/gdbarmsim/config/arm1136jfs.cfg | 18 ++++++++++++++++++ bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg | 5 +++++ bsps/arm/gdbarmsim/config/arm1136js.cfg | 18 ++++++++++++++++++ bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg | 5 +++++ bsps/arm/gdbarmsim/config/arm7tdmi.cfg | 18 ++++++++++++++++++ bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg | 5 +++++ bsps/arm/gdbarmsim/config/arm920.cfg | 18 ++++++++++++++++++ bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg | 5 +++++ bsps/arm/gdbarmsim/config/armcortexa9.cfg | 19 +++++++++++++++++++ 10 files changed, 116 insertions(+) create mode 100644 bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg create mode 100644 bsps/arm/gdbarmsim/config/arm1136jfs.cfg create mode 100644 bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg create mode 100644 bsps/arm/gdbarmsim/config/arm1136js.cfg create mode 100644 bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg create mode 100644 bsps/arm/gdbarmsim/config/arm7tdmi.cfg create mode 100644 bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg create mode 100644 bsps/arm/gdbarmsim/config/arm920.cfg create mode 100644 bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg create mode 100644 bsps/arm/gdbarmsim/config/armcortexa9.cfg (limited to 'bsps/arm/gdbarmsim') diff --git a/bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm1136jfs.cfg b/bsps/arm/gdbarmsim/config/arm1136jfs.cfg new file mode 100644 index 0000000000..be4d5a6484 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136jfs.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm1136jf-s (FPU) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm1136jf-s + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm1136js.cfg b/bsps/arm/gdbarmsim/config/arm1136js.cfg new file mode 100644 index 0000000000..83308c39b0 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136js.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm1136j-s (no FPU) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm1136j-s + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm7tdmi.cfg b/bsps/arm/gdbarmsim/config/arm7tdmi.cfg new file mode 100644 index 0000000000..e992733864 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm7tdmi.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm7tdmi +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm7tdmi + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm920.cfg b/bsps/arm/gdbarmsim/config/arm920.cfg new file mode 100644 index 0000000000..b246d5bb20 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm920.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm920 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm920 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg b/bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/armcortexa9.cfg b/bsps/arm/gdbarmsim/config/armcortexa9.cfg new file mode 100644 index 0000000000..6eecf70615 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/armcortexa9.cfg @@ -0,0 +1,19 @@ +# +# Config file for GDB ARM Simulator as cortex-a9 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# CPU_CFLAGS = -mcpu=arm920 -mstructure-size-boundary=8 +CPU_CFLAGS = -mcpu=cortex-a9 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections -- cgit v1.2.3