From a738d69bcf97d5a6fd88c1665380cfb381f05b1f Mon Sep 17 00:00:00 2001 From: Tian Ye Date: Wed, 18 Oct 2023 09:21:56 -0500 Subject: bsps/aarch64: Disable use of TTBR1 Force use of addresses that would be translated by TTBR1 to cause a translation fault. RTEMS on AArch64 does not use TTBR1 and so attempted translation of that address range could cause unexpected behavior in the form of other exception types since TTBR1 is never set. --- bsps/aarch64/include/bsp/aarch64-mmu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'bsps/aarch64/include/bsp/aarch64-mmu.h') diff --git a/bsps/aarch64/include/bsp/aarch64-mmu.h b/bsps/aarch64/include/bsp/aarch64-mmu.h index 2101ef4ae0..8c69705230 100644 --- a/bsps/aarch64/include/bsp/aarch64-mmu.h +++ b/bsps/aarch64/include/bsp/aarch64-mmu.h @@ -439,7 +439,8 @@ BSP_START_TEXT_SECTION static inline void aarch64_mmu_setup( void ) _AArch64_Write_tcr_el1( AARCH64_TCR_EL1_T0SZ( 0x10 ) | AARCH64_TCR_EL1_IRGN0( 0x1 ) | AARCH64_TCR_EL1_ORGN0( 0x1 ) | AARCH64_TCR_EL1_SH0( 0x3 ) | - AARCH64_TCR_EL1_TG0( 0x0 ) | AARCH64_TCR_EL1_IPS( 0x5ULL ) + AARCH64_TCR_EL1_TG0( 0x0 ) | AARCH64_TCR_EL1_IPS( 0x5ULL ) | + AARCH64_TCR_EL1_EPD1 ); /* Set MAIR */ -- cgit v1.2.3