From 11ff3a9e72ca261a6024b16c34c6fb35054fd53a Mon Sep 17 00:00:00 2001 From: Hesham Almatary Date: Fri, 27 Oct 2017 15:18:40 +1100 Subject: cpukit: RISC-V - make riscv32 code work for riscv64 - v2 * Use #ifdefs for 32/64 bit code * Use unsigned long which is 32-bit on riscv32 and 64-bit on riscv64 (register size) * Move the code to a new shared riscv folder to be shared between riscv32 and riscv64 * Rename RTEMS_CPU extracted from command line to shared riscv target s/riscv*/riscv Update #3109 --- aclocal/canonical-target-name.m4 | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'aclocal/canonical-target-name.m4') diff --git a/aclocal/canonical-target-name.m4 b/aclocal/canonical-target-name.m4 index 6870bbf29a..498610c993 100644 --- a/aclocal/canonical-target-name.m4 +++ b/aclocal/canonical-target-name.m4 @@ -12,7 +12,10 @@ case "${target}" in no_cpu-*rtems*) RTEMS_CPU=no_cpu ;; - *) + riscv*-*rtems*) + RTEMS_CPU=riscv + ;; + *) RTEMS_CPU=`echo $target | sed 's%^\([[^-]]*\)-\(.*\)$%\1%'` ;; esac -- cgit v1.2.3