From dcf4e0f1b72e3c840aec647b0cc79333461391ec Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Tue, 10 Jan 2006 18:26:03 +0000
Subject: 2006-01-10	Joel Sherrill <joel@OARcorp.com>

	* shared/start.S: Add include of bspopts.h so SIS quirks will trigger.
---
 c/src/lib/libbsp/sparc/ChangeLog      | 4 ++++
 c/src/lib/libbsp/sparc/shared/start.S | 1 +
 2 files changed, 5 insertions(+)

diff --git a/c/src/lib/libbsp/sparc/ChangeLog b/c/src/lib/libbsp/sparc/ChangeLog
index df61d168e3..bac324e7eb 100644
--- a/c/src/lib/libbsp/sparc/ChangeLog
+++ b/c/src/lib/libbsp/sparc/ChangeLog
@@ -1,3 +1,7 @@
+2006-01-10	Joel Sherrill <joel@OARcorp.com>
+
+	* shared/start.S: Add include of bspopts.h so SIS quirks will trigger.
+
 2006-01-09	Ralf Corsepius <ralf.corsepius@rtems.org>
 
 	* shared/start.S: Backport from rtems-4-6-branch.
diff --git a/c/src/lib/libbsp/sparc/shared/start.S b/c/src/lib/libbsp/sparc/shared/start.S
index 9b2bbb42fc..4a1f1adebc 100644
--- a/c/src/lib/libbsp/sparc/shared/start.S
+++ b/c/src/lib/libbsp/sparc/shared/start.S
@@ -11,6 +11,7 @@
  */
 
 #include <rtems/asm.h>
+#include <bspopts.h>
 
 /*
  *  Unexpected trap will halt the processor by forcing it to error state
-- 
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