From cd12590b7f237e1633ab85dfbafe99e7bb80cba4 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 29 Aug 2006 21:53:25 +0000 Subject: 2006-08-29 Joel Sherrill * rtems/score/cpu.h: Correct inline assembly constraints. --- cpukit/score/cpu/h8300/ChangeLog | 4 ++++ cpukit/score/cpu/h8300/rtems/score/cpu.h | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/cpukit/score/cpu/h8300/ChangeLog b/cpukit/score/cpu/h8300/ChangeLog index 2ab126b563..f73f6a143e 100644 --- a/cpukit/score/cpu/h8300/ChangeLog +++ b/cpukit/score/cpu/h8300/ChangeLog @@ -1,3 +1,7 @@ +2006-08-29 Joel Sherrill + + * rtems/score/cpu.h: Correct inline assembly constraints. + 2006-01-16 Joel Sherrill * rtems/score/cpu.h: Part of a large patch to improve Doxygen output. diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h index c7f3b3c77b..498304ad8f 100644 --- a/cpukit/score/cpu/h8300/rtems/score/cpu.h +++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h @@ -626,7 +626,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); #define _CPU_ISR_Disable( _isr_cookie ) \ do { \ - asm volatile( "stc.w ccr, @-er7 ;\n orc #0xC0,ccr ;\n mov.w @er7+,%0" : : "r" (_isr_cookie) ); \ + asm volatile( "stc.w ccr, @-er7 ;\n orc #0xC0,ccr ;\n mov.w @er7+,%0" : "=r" (_isr_cookie) : ); \ } while (0) -- cgit v1.2.3