From c3e73138b8cf833a90e168ef2d0efb21946eca43 Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@oarcorp.com>
Date: Mon, 7 May 2012 16:58:20 -0500
Subject: csb350 - Correct tm27.h to use PIC Interrupt Model

---
 c/src/lib/libbsp/mips/csb350/include/tm27.h | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/c/src/lib/libbsp/mips/csb350/include/tm27.h b/c/src/lib/libbsp/mips/csb350/include/tm27.h
index b08801155f..caac8ee980 100644
--- a/c/src/lib/libbsp/mips/csb350/include/tm27.h
+++ b/c/src/lib/libbsp/mips/csb350/include/tm27.h
@@ -1,11 +1,11 @@
+/**
+ *  @file
+ */
+
 /*
- *  tm27.h
- *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
  *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
  */
 
 #ifndef _RTEMS_TMTEST27
@@ -15,6 +15,8 @@
 #ifndef __tm27_h
 #define __tm27_h
 
+#include <bsp/irq.h>
+
 /*
  *  Define the interrupt mechanism for Time Test 27
  */
@@ -25,7 +27,8 @@ int negate_sw_irw(uint32_t irqnum);
 #define MUST_WAIT_FOR_INTERRUPT 0
 
 #define Install_tm27_vector( handler ) \
-   (void) set_vector(handler, AU1X00_IRQ_SW0, 1);
+   rtems_interrupt_handler_install( \
+      AU1X00_IRQ_SW0, "benchmark", 0, (rtems_interrupt_handler)handler, NULL );
 
 #define Cause_tm27_intr() \
   do { \
@@ -37,14 +40,9 @@ int negate_sw_irw(uint32_t irqnum);
      negate_sw_irq(0); \
   } while(0)
 
-#if 0
-#define Lower_tm27_intr() \
-  mips_enable_in_interrupt_mask( 0xff01 );
-#else
 #define Lower_tm27_intr() \
   do { \
      continue;\
   } while(0)
-#endif
 
 #endif
-- 
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