From b6755affc05466a49e684c316ea6e6f00c21c370 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 9 Mar 2018 16:45:56 +0100 Subject: bsps/mips: Move libcpu content to bsps This patch is a part of the BSP source reorganization. Update #3285. --- bsps/mips/shared/irq/installisrentries.c | 29 ++++++ bsps/mips/shared/irq/isr_entries.S | 106 +++++++++++++++++++ bsps/mips/shared/timer/gettime.S | 33 ++++++ bsps/mips/shared/timer/timer.c | 113 +++++++++++++++++++++ c/src/lib/libbsp/mips/csb350/Makefile.am | 4 +- .../lib/libbsp/mips/csb350/make/custom/csb350.cfg | 1 - c/src/lib/libbsp/mips/hurricane/Makefile.am | 8 +- .../mips/hurricane/make/custom/hurricane.cfg | 2 - c/src/lib/libbsp/mips/jmr3904/Makefile.am | 5 +- .../libbsp/mips/jmr3904/make/custom/jmr3904.cfg | 1 - c/src/lib/libbsp/mips/malta/Makefile.am | 4 +- c/src/lib/libbsp/mips/malta/make/custom/malta.cfg | 1 - c/src/lib/libbsp/mips/rbtx4925/Makefile.am | 7 +- .../libbsp/mips/rbtx4925/make/custom/rbtx4925.cfg | 2 - c/src/lib/libbsp/mips/rbtx4938/Makefile.am | 8 +- .../libbsp/mips/rbtx4938/make/custom/rbtx4938.cfg | 2 - c/src/lib/libcpu/mips/Makefile.am | 48 --------- c/src/lib/libcpu/mips/configure.ac | 40 -------- .../mips/shared/interrupts/installisrentries.c | 29 ------ .../libcpu/mips/shared/interrupts/interruptmask.c | 20 ---- .../libcpu/mips/shared/interrupts/isr_entries.S | 106 ------------------- c/src/lib/libcpu/mips/timer/gettime.S | 33 ------ c/src/lib/libcpu/mips/timer/timer.c | 113 --------------------- 23 files changed, 302 insertions(+), 413 deletions(-) create mode 100644 bsps/mips/shared/irq/installisrentries.c create mode 100644 bsps/mips/shared/irq/isr_entries.S create mode 100644 bsps/mips/shared/timer/gettime.S create mode 100644 bsps/mips/shared/timer/timer.c delete mode 100644 c/src/lib/libcpu/mips/Makefile.am delete mode 100644 c/src/lib/libcpu/mips/configure.ac delete mode 100644 c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c delete mode 100644 c/src/lib/libcpu/mips/shared/interrupts/interruptmask.c delete mode 100644 c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S delete mode 100644 c/src/lib/libcpu/mips/timer/gettime.S delete mode 100644 c/src/lib/libcpu/mips/timer/timer.c diff --git a/bsps/mips/shared/irq/installisrentries.c b/bsps/mips/shared/irq/installisrentries.c new file mode 100644 index 0000000000..9380a26f37 --- /dev/null +++ b/bsps/mips/shared/irq/installisrentries.c @@ -0,0 +1,29 @@ +#include +#include +#include +#include + +#include + +void mips_install_isr_entries( void ) +{ +#if __mips == 1 + memcpy( (void *)UT_VEC, exc_utlb_code, 40 ); /* utlbmiss vector */ + memcpy( (void *)DB_VEC, exc_dbg_code, 40 ); + memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vevtor */ + +#elif __mips == 32 + memcpy( (void *)T_VEC, exc_tlb_code, 40 ); /* tlbmiss vector */ + memcpy( (void *)X_VEC, exc_xtlb_code, 40 ); /* xtlbmiss vector */ + memcpy( (void *)C_VEC, exc_cache_code, 40 ); /* cache error vector */ + memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vector */ + +#elif __mips == 3 + memcpy( (void *)T_VEC, exc_tlb_code, 40 ); /* tlbmiss vector */ + memcpy( (void *)X_VEC, exc_xtlb_code, 40 ); /* xtlbmiss vector */ + memcpy( (void *)C_VEC, exc_cache_code, 40 ); /* cache error vector */ + memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vector */ +#endif + + rtems_cache_flush_entire_data(); +} diff --git a/bsps/mips/shared/irq/isr_entries.S b/bsps/mips/shared/irq/isr_entries.S new file mode 100644 index 0000000000..2e3791cab2 --- /dev/null +++ b/bsps/mips/shared/irq/isr_entries.S @@ -0,0 +1,106 @@ +/* + * This file contains the raw entry points for the exceptions. + * + * COPYRIGHT (c) 1989-2000. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include +#include + +/* + * MIPS ISA Level 1 entries + */ + +#if __mips == 1 + +FRAME(exc_norm_code,sp,0,ra) + la k0, _ISR_Handler /* generic external int hndlr */ + j k0 + nop +ENDFRAME(exc_norm_code) + +FRAME(exc_dbg_code,sp,0,ra) + la k0, _DBG_Handler /* debug interrupt */ + j k0 + nop +ENDFRAME(exc_dbg_code) + +/* XXX this is dependent on IDT/SIM and needs to be addressed */ +FRAME(exc_utlb_code,sp,0,ra) + la k0, (R_VEC+((48)*8)) + j k0 + nop +ENDFRAME(exc_utlb_code) + +/* + * MIPS ISA Level 32 + * XXX Again, reliance on SIM. Not good.?????????? + */ +#elif __mips == 32 +FRAME(exc_tlb_code,sp,0,ra) + la k0, _ISR_Handler + j k0 + nop +ENDFRAME(exc_tlb_code) + +FRAME(exc_xtlb_code,sp,0,ra) + la k0, _ISR_Handler + j k0 + nop + +ENDFRAME(exc_xtlb_code) + +FRAME(exc_cache_code,sp,0,ra) + la k0, _ISR_Handler + j k0 + nop +ENDFRAME(exc_cache_code) + +FRAME(exc_norm_code,sp,0,ra) + la k0, _ISR_Handler /* generic external int hndlr */ + j k0 + nop +ENDFRAME(exc_norm_code) + +/* + * MIPS ISA Level 3 + * XXX Again, reliance on SIM. Not good. + */ +#elif __mips == 3 + +FRAME(exc_tlb_code,sp,0,ra) + la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ + j k0 + nop +ENDFRAME(exc_tlb_code) + +FRAME(exc_xtlb_code,sp,0,ra) + la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ + j k0 + nop + +ENDFRAME(exc_xtlb_code) + +FRAME(exc_cache_code,sp,0,ra) + la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ + j k0 + nop +ENDFRAME(exc_cache_code) + +FRAME(exc_norm_code,sp,0,ra) + la k0, _ISR_Handler /* generic external int hndlr */ + j k0 + nop +ENDFRAME(exc_norm_code) + +#else + +#error "isr_entries.S: ISA support problem" + +#endif diff --git a/bsps/mips/shared/timer/gettime.S b/bsps/mips/shared/timer/gettime.S new file mode 100644 index 0000000000..2661dfee33 --- /dev/null +++ b/bsps/mips/shared/timer/gettime.S @@ -0,0 +1,33 @@ +/* gettime.s + * + * This file contains the assembly code for the IDT 4650 timer driver. + * + * Author: Craig Lebakken + * + * COPYRIGHT (c) 1996 by Transition Networks Inc. + * + * To anyone who acknowledges that this file is provided "AS IS" + * without any express or implied warranty: + * permission to use, copy, modify, and distribute this file + * for any purpose is hereby granted without fee, provided that + * the above copyright notice and this notice appears in all + * copies, and that the name of Transition Networks not be used in + * advertising or publicity pertaining to distribution of the + * software without specific, written prior permission. + * Transition Networks makes no representations about the suitability + * of this software for any purpose. + */ + +/* @(#)gettime.S 08/20/96 1.2 */ + +#include +#include +#include + +FRAME(mips_read_timer,sp,0,ra) + .set noreorder + mfc0 v0,C0_COUNT + nop + j ra + .set reorder +ENDFRAME(mips_read_timer) diff --git a/bsps/mips/shared/timer/timer.c b/bsps/mips/shared/timer/timer.c new file mode 100644 index 0000000000..da5291a48a --- /dev/null +++ b/bsps/mips/shared/timer/timer.c @@ -0,0 +1,113 @@ +/** + * @file + * @brief IDT 4650 Timer Driver. + * + * This file manages the benchmark timer used by the RTEMS Timing Test + * Suite. + */ + +/* + * Author: Craig Lebakken + * + * COPYRIGHT (c) 1996 by Transition Networks Inc. + * + * To anyone who acknowledges that this file is provided "AS IS" + * without any express or implied warranty: + * permission to use, copy, modify, and distribute this file + * for any purpose is hereby granted without fee, provided that + * the above copyright notice and this notice appears in all + * copies, and that the name of Transition Networks not be used in + * advertising or publicity pertaining to distribution of the + * software without specific, written prior permission. + * Transition Networks makes no representations about the suitability + * of this software for any purpose. + * + * derived from src/lib/libbsp/no_cpu/no_bsp/timer/timer.c + * + * COPYRIGHT (c) 1989-1999. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include + +#define CLOCKS_PER_MICROSECOND ( CPU_CLOCK_RATE_MHZ ) +#define TIMER_MAX_VALUE 0xffffffff + +extern uint32_t mips_read_timer( void ); + +static bool benchmark_timer_find_average_overhead; +static uint32_t benchmark_timer_initial_value = 0; + +void benchmark_timer_initialize( void ) +{ + benchmark_timer_initial_value = mips_read_timer(); + /* + * Somehow start the timer + */ + + /* Timer on 4650 is always running */ +} + +/* + * The following controls the behavior of benchmark_timer_read(). + * + * AVG_OVEREHAD is the overhead for starting and stopping the timer. It + * is usually deducted from the number returned. + * + * LEAST_VALID is the lowest number this routine should trust. Numbers + * below this are "noise" and zero is returned. + */ + +#define AVG_OVERHEAD 8 /* It typically takes X.X microseconds */ + /* (Y countdowns) to start/stop the timer. */ + /* This value is in cycles. */ +#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */ + +benchmark_timer_t benchmark_timer_read( void ) +{ + uint64_t clicks; + uint32_t total; + + /* + * Read the timer and see how many clicks it has been since we started. + */ + + clicks = mips_read_timer(); /* XXX: read some HW here */ + if (clicks < benchmark_timer_initial_value) + { + clicks += TIMER_MAX_VALUE; + } + clicks -= benchmark_timer_initial_value; + + /* + * Total is calculated by taking into account the number of timer overflow + * interrupts since the timer was initialized and clicks since the last + * interrupts. + */ +#if 0 /* leave total in number of cycles */ + total = clicks / CLOCKS_PER_MICROSECOND; +#else + total = clicks; +#endif + + if ( benchmark_timer_find_average_overhead == 1 ) + return total; /* in # cycles units */ + else { + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + /* + * leave total in cycles + */ + return (total - AVG_OVERHEAD); + } +} + +void benchmark_timer_disable_subtracting_average_overhead(bool find_flag) +{ + benchmark_timer_find_average_overhead = find_flag; +} diff --git a/c/src/lib/libbsp/mips/csb350/Makefile.am b/c/src/lib/libbsp/mips/csb350/Makefile.am index 69c709ce2e..f289195047 100644 --- a/c/src/lib/libbsp/mips/csb350/Makefile.am +++ b/c/src/lib/libbsp/mips/csb350/Makefile.am @@ -54,8 +54,8 @@ libbsp_a_SOURCES += network/network.c endif libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -libbsp_a_LIBADD = ../../../libcpu/mips/shared/interrupts.rel +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/installisrentries.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/isr_entries.S include $(top_srcdir)/../../../../automake/local.am include $(srcdir)/../../../../../../bsps/mips/csb350/headers.am diff --git a/c/src/lib/libbsp/mips/csb350/make/custom/csb350.cfg b/c/src/lib/libbsp/mips/csb350/make/custom/csb350.cfg index ebadadd1f6..f6d50662b0 100644 --- a/c/src/lib/libbsp/mips/csb350/make/custom/csb350.cfg +++ b/c/src/lib/libbsp/mips/csb350/make/custom/csb350.cfg @@ -5,7 +5,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=mips -RTEMS_CPU_MODEL=au1x00 # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. diff --git a/c/src/lib/libbsp/mips/hurricane/Makefile.am b/c/src/lib/libbsp/mips/hurricane/Makefile.am index a65d2989c2..8746b969eb 100644 --- a/c/src/lib/libbsp/mips/hurricane/Makefile.am +++ b/c/src/lib/libbsp/mips/hurricane/Makefile.am @@ -18,6 +18,7 @@ project_lib_DATA = start.$(OBJEXT) project_lib_DATA += linkcmds noinst_LIBRARIES = libbsp.a +libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -DRM52XX libbsp_a_SOURCES = # startup @@ -56,9 +57,10 @@ libbsp_a_SOURCES += irq/vectorisrs.c libbsp_a_SOURCES += ../shared/irq/interruptmask.c libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel -libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/rm52xx/timer.rel +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/installisrentries.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/isr_entries.S +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/timer/timer.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/timer/gettime.S include $(top_srcdir)/../../../../automake/local.am include $(srcdir)/../../../../../../bsps/mips/hurricane/headers.am diff --git a/c/src/lib/libbsp/mips/hurricane/make/custom/hurricane.cfg b/c/src/lib/libbsp/mips/hurricane/make/custom/hurricane.cfg index 02d198bfe3..b1c050b966 100644 --- a/c/src/lib/libbsp/mips/hurricane/make/custom/hurricane.cfg +++ b/c/src/lib/libbsp/mips/hurricane/make/custom/hurricane.cfg @@ -4,8 +4,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg -RTEMS_CPU_MODEL=rm5231 - # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. CPU_CFLAGS = -mips3 -G0 -EL diff --git a/c/src/lib/libbsp/mips/jmr3904/Makefile.am b/c/src/lib/libbsp/mips/jmr3904/Makefile.am index e67e58865f..df52ca3883 100644 --- a/c/src/lib/libbsp/mips/jmr3904/Makefile.am +++ b/c/src/lib/libbsp/mips/jmr3904/Makefile.am @@ -18,6 +18,7 @@ project_lib_DATA = start.$(OBJEXT) project_lib_DATA += linkcmds noinst_LIBRARIES = libbsp.a +libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -DTX39 libbsp_a_SOURCES = # startup @@ -48,8 +49,8 @@ libbsp_a_SOURCES += irq/vectorisrs.c libbsp_a_SOURCES += ../shared/irq/interruptmask.c libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/installisrentries.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/isr_entries.S include $(top_srcdir)/../../../../automake/local.am include $(srcdir)/../../../../../../bsps/mips/jmr3904/headers.am diff --git a/c/src/lib/libbsp/mips/jmr3904/make/custom/jmr3904.cfg b/c/src/lib/libbsp/mips/jmr3904/make/custom/jmr3904.cfg index 6b761356da..ed4e6b3be0 100644 --- a/c/src/lib/libbsp/mips/jmr3904/make/custom/jmr3904.cfg +++ b/c/src/lib/libbsp/mips/jmr3904/make/custom/jmr3904.cfg @@ -5,7 +5,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=mips -RTEMS_CPU_MODEL=tx3904 CPU_CFLAGS = -march=r3900 -Wa,-xgot -G0 diff --git a/c/src/lib/libbsp/mips/malta/Makefile.am b/c/src/lib/libbsp/mips/malta/Makefile.am index 5349907003..ea431d93be 100644 --- a/c/src/lib/libbsp/mips/malta/Makefile.am +++ b/c/src/lib/libbsp/mips/malta/Makefile.am @@ -55,8 +55,8 @@ libbsp_a_SOURCES += ../../shared/console_control.c libbsp_a_SOURCES += ../../shared/timerstub.c libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/installisrentries.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/isr_entries.S # pci libbsp_a_SOURCES += pci/pci.c diff --git a/c/src/lib/libbsp/mips/malta/make/custom/malta.cfg b/c/src/lib/libbsp/mips/malta/make/custom/malta.cfg index 2bd1eab988..a25abcc911 100644 --- a/c/src/lib/libbsp/mips/malta/make/custom/malta.cfg +++ b/c/src/lib/libbsp/mips/malta/make/custom/malta.cfg @@ -5,7 +5,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=mips -RTEMS_CPU_MODEL=mips24kf # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. diff --git a/c/src/lib/libbsp/mips/rbtx4925/Makefile.am b/c/src/lib/libbsp/mips/rbtx4925/Makefile.am index 74c8303492..446d0535ed 100644 --- a/c/src/lib/libbsp/mips/rbtx4925/Makefile.am +++ b/c/src/lib/libbsp/mips/rbtx4925/Makefile.am @@ -56,9 +56,10 @@ libbsp_a_SOURCES += irq/vectorisrs.c libbsp_a_SOURCES += ../shared/irq/interruptmask_TX49.c libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel -libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/tx49/timer.rel +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/installisrentries.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/isr_entries.S +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/timer/timer.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/timer/gettime.S include $(top_srcdir)/../../../../automake/local.am include $(srcdir)/../../../../../../bsps/mips/rbtx4925/headers.am diff --git a/c/src/lib/libbsp/mips/rbtx4925/make/custom/rbtx4925.cfg b/c/src/lib/libbsp/mips/rbtx4925/make/custom/rbtx4925.cfg index 37b1e00443..744fdb4240 100644 --- a/c/src/lib/libbsp/mips/rbtx4925/make/custom/rbtx4925.cfg +++ b/c/src/lib/libbsp/mips/rbtx4925/make/custom/rbtx4925.cfg @@ -4,8 +4,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg -RTEMS_CPU_MODEL=tx4925 - # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. CPU_CFLAGS = -mips3 -G0 -EL diff --git a/c/src/lib/libbsp/mips/rbtx4938/Makefile.am b/c/src/lib/libbsp/mips/rbtx4938/Makefile.am index 7d29c80d95..efce115736 100644 --- a/c/src/lib/libbsp/mips/rbtx4938/Makefile.am +++ b/c/src/lib/libbsp/mips/rbtx4938/Makefile.am @@ -20,6 +20,7 @@ project_lib_DATA = start.$(OBJEXT) project_lib_DATA += linkcmds noinst_LIBRARIES = libbsp.a +libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -DTX49 libbsp_a_SOURCES = # startup @@ -56,9 +57,10 @@ libbsp_a_SOURCES += irq/vectorisrs.c libbsp_a_SOURCES += ../shared/irq/interruptmask_TX49.c libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel -libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/tx49/timer.rel +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/installisrentries.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/irq/isr_entries.S +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/timer/timer.c +libbsp_a_SOURCES += ../../../../../../bsps/mips/shared/timer/gettime.S include $(top_srcdir)/../../../../automake/local.am include $(srcdir)/../../../../../../bsps/mips/rbtx4938/headers.am diff --git a/c/src/lib/libbsp/mips/rbtx4938/make/custom/rbtx4938.cfg b/c/src/lib/libbsp/mips/rbtx4938/make/custom/rbtx4938.cfg index a60a8c6307..42cdf17a04 100644 --- a/c/src/lib/libbsp/mips/rbtx4938/make/custom/rbtx4938.cfg +++ b/c/src/lib/libbsp/mips/rbtx4938/make/custom/rbtx4938.cfg @@ -4,8 +4,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg -RTEMS_CPU_MODEL=tx4938 - # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. CPU_CFLAGS = -mips3 -G0 -EL diff --git a/c/src/lib/libcpu/mips/Makefile.am b/c/src/lib/libcpu/mips/Makefile.am deleted file mode 100644 index 8ae999dd28..0000000000 --- a/c/src/lib/libcpu/mips/Makefile.am +++ /dev/null @@ -1,48 +0,0 @@ -ACLOCAL_AMFLAGS = -I ../../../aclocal - -include $(top_srcdir)/../../../automake/compile.am - -EXTRA_DIST = - -noinst_PROGRAMS = - -## interrupts - -if rm52xx -interrupts_CPPFLAGS = -DRM52XX -endif - -if tx39 -interrupts_CPPFLAGS = -DTX39 -endif - -if tx49 -interrupts_CPPFLAGS = -DTX49 -endif - -noinst_PROGRAMS += shared/interrupts.rel -shared_interrupts_rel_SOURCES = shared/interrupts/installisrentries.c \ - shared/interrupts/isr_entries.S shared/interrupts/isr_entries.h -shared_interrupts_rel_CPPFLAGS = $(AM_CPPFLAGS) $(interrupts_CPPFLAGS) -shared_interrupts_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -if tx39 -endif - -if tx49 -noinst_PROGRAMS += tx49/timer.rel -tx49_timer_rel_SOURCES = timer/timer.c timer/gettime.S -tx49_timer_rel_CPPFLAGS = $(AM_CPPFLAGS) -tx49_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -endif - -if au1x00 -endif - -if rm52xx -noinst_PROGRAMS += rm52xx/timer.rel -rm52xx_timer_rel_SOURCES = timer/timer.c timer/gettime.S -rm52xx_timer_rel_CPPFLAGS = $(AM_CPPFLAGS) -rm52xx_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -endif - -include $(top_srcdir)/../../../automake/local.am diff --git a/c/src/lib/libcpu/mips/configure.ac b/c/src/lib/libcpu/mips/configure.ac deleted file mode 100644 index 6a9e2665d9..0000000000 --- a/c/src/lib/libcpu/mips/configure.ac +++ /dev/null @@ -1,40 +0,0 @@ -## Process this file with autoconf to produce a configure script. - -AC_PREREQ([2.69]) -AC_INIT([rtems-c-src-lib-libcpu-mips],[_RTEMS_VERSION],[https://devel.rtems.org/newticket]) -AC_CONFIG_SRCDIR([timer]) -RTEMS_TOP([../../../../..],[../../..]) -RTEMS_SOURCE_TOP -RTEMS_BUILD_TOP - -RTEMS_CANONICAL_TARGET_CPU - -AM_INIT_AUTOMAKE([no-define foreign subdir-objects 1.12.2]) -AM_MAINTAINER_MODE - -RTEMS_ENV_RTEMSBSP - -RTEMS_PROJECT_ROOT - -RTEMS_PROG_CC_FOR_TARGET -AM_PROG_CC_C_O -RTEMS_CANONICALIZE_TOOLS -RTEMS_PROG_CCAS - -AM_CONDITIONAL(tx39, test "$RTEMS_CPU_MODEL" = "tx3904") - -AM_CONDITIONAL(tx49, test "$RTEMS_CPU_MODEL" = "tx4925" \ -|| test "$RTEMS_CPU_MODEL" = "tx4938" ) - -AM_CONDITIONAL(rm52xx, test "$RTEMS_CPU_MODEL" = "rm5231") - -AM_CONDITIONAL(mongoosev, test "$RTEMS_CPU_MODEL" = "mongoosev") - -AM_CONDITIONAL(au1x00, test "$RTEMS_CPU_MODEL" = "au1x00") - -RTEMS_AMPOLISH3 - -# Explicitly list all Makefiles here -AC_CONFIG_FILES([Makefile -]) -AC_OUTPUT diff --git a/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c b/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c deleted file mode 100644 index 9380a26f37..0000000000 --- a/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c +++ /dev/null @@ -1,29 +0,0 @@ -#include -#include -#include -#include - -#include - -void mips_install_isr_entries( void ) -{ -#if __mips == 1 - memcpy( (void *)UT_VEC, exc_utlb_code, 40 ); /* utlbmiss vector */ - memcpy( (void *)DB_VEC, exc_dbg_code, 40 ); - memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vevtor */ - -#elif __mips == 32 - memcpy( (void *)T_VEC, exc_tlb_code, 40 ); /* tlbmiss vector */ - memcpy( (void *)X_VEC, exc_xtlb_code, 40 ); /* xtlbmiss vector */ - memcpy( (void *)C_VEC, exc_cache_code, 40 ); /* cache error vector */ - memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vector */ - -#elif __mips == 3 - memcpy( (void *)T_VEC, exc_tlb_code, 40 ); /* tlbmiss vector */ - memcpy( (void *)X_VEC, exc_xtlb_code, 40 ); /* xtlbmiss vector */ - memcpy( (void *)C_VEC, exc_cache_code, 40 ); /* cache error vector */ - memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vector */ -#endif - - rtems_cache_flush_entire_data(); -} diff --git a/c/src/lib/libcpu/mips/shared/interrupts/interruptmask.c b/c/src/lib/libcpu/mips/shared/interrupts/interruptmask.c deleted file mode 100644 index 9f2b679a77..0000000000 --- a/c/src/lib/libcpu/mips/shared/interrupts/interruptmask.c +++ /dev/null @@ -1,20 +0,0 @@ -#include - -/* - * This function returns a mask value which is used to select the bits - * in the processor status register that can be set to enable interrupts. - * The mask value should not include the 2 software interrupt enable bits. - */ - -uint32_t mips_interrupt_mask( void ) -{ - uint32_t interrupt_mask; - -#ifdef TX49 - interrupt_mask = 0x00000400; /* Toshiba TX49 processors have a non-standard interrupt mask */ -#else - interrupt_mask = 0x0000fc00; -#endif - - return(interrupt_mask); -} diff --git a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S deleted file mode 100644 index 2e3791cab2..0000000000 --- a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S +++ /dev/null @@ -1,106 +0,0 @@ -/* - * This file contains the raw entry points for the exceptions. - * - * COPYRIGHT (c) 1989-2000. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include -#include -#include - -/* - * MIPS ISA Level 1 entries - */ - -#if __mips == 1 - -FRAME(exc_norm_code,sp,0,ra) - la k0, _ISR_Handler /* generic external int hndlr */ - j k0 - nop -ENDFRAME(exc_norm_code) - -FRAME(exc_dbg_code,sp,0,ra) - la k0, _DBG_Handler /* debug interrupt */ - j k0 - nop -ENDFRAME(exc_dbg_code) - -/* XXX this is dependent on IDT/SIM and needs to be addressed */ -FRAME(exc_utlb_code,sp,0,ra) - la k0, (R_VEC+((48)*8)) - j k0 - nop -ENDFRAME(exc_utlb_code) - -/* - * MIPS ISA Level 32 - * XXX Again, reliance on SIM. Not good.?????????? - */ -#elif __mips == 32 -FRAME(exc_tlb_code,sp,0,ra) - la k0, _ISR_Handler - j k0 - nop -ENDFRAME(exc_tlb_code) - -FRAME(exc_xtlb_code,sp,0,ra) - la k0, _ISR_Handler - j k0 - nop - -ENDFRAME(exc_xtlb_code) - -FRAME(exc_cache_code,sp,0,ra) - la k0, _ISR_Handler - j k0 - nop -ENDFRAME(exc_cache_code) - -FRAME(exc_norm_code,sp,0,ra) - la k0, _ISR_Handler /* generic external int hndlr */ - j k0 - nop -ENDFRAME(exc_norm_code) - -/* - * MIPS ISA Level 3 - * XXX Again, reliance on SIM. Not good. - */ -#elif __mips == 3 - -FRAME(exc_tlb_code,sp,0,ra) - la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ - j k0 - nop -ENDFRAME(exc_tlb_code) - -FRAME(exc_xtlb_code,sp,0,ra) - la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ - j k0 - nop - -ENDFRAME(exc_xtlb_code) - -FRAME(exc_cache_code,sp,0,ra) - la k0, (R_VEC+((112)*8)) /* R4000 Sim location */ - j k0 - nop -ENDFRAME(exc_cache_code) - -FRAME(exc_norm_code,sp,0,ra) - la k0, _ISR_Handler /* generic external int hndlr */ - j k0 - nop -ENDFRAME(exc_norm_code) - -#else - -#error "isr_entries.S: ISA support problem" - -#endif diff --git a/c/src/lib/libcpu/mips/timer/gettime.S b/c/src/lib/libcpu/mips/timer/gettime.S deleted file mode 100644 index 2661dfee33..0000000000 --- a/c/src/lib/libcpu/mips/timer/gettime.S +++ /dev/null @@ -1,33 +0,0 @@ -/* gettime.s - * - * This file contains the assembly code for the IDT 4650 timer driver. - * - * Author: Craig Lebakken - * - * COPYRIGHT (c) 1996 by Transition Networks Inc. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of Transition Networks not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * Transition Networks makes no representations about the suitability - * of this software for any purpose. - */ - -/* @(#)gettime.S 08/20/96 1.2 */ - -#include -#include -#include - -FRAME(mips_read_timer,sp,0,ra) - .set noreorder - mfc0 v0,C0_COUNT - nop - j ra - .set reorder -ENDFRAME(mips_read_timer) diff --git a/c/src/lib/libcpu/mips/timer/timer.c b/c/src/lib/libcpu/mips/timer/timer.c deleted file mode 100644 index da5291a48a..0000000000 --- a/c/src/lib/libcpu/mips/timer/timer.c +++ /dev/null @@ -1,113 +0,0 @@ -/** - * @file - * @brief IDT 4650 Timer Driver. - * - * This file manages the benchmark timer used by the RTEMS Timing Test - * Suite. - */ - -/* - * Author: Craig Lebakken - * - * COPYRIGHT (c) 1996 by Transition Networks Inc. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of Transition Networks not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * Transition Networks makes no representations about the suitability - * of this software for any purpose. - * - * derived from src/lib/libbsp/no_cpu/no_bsp/timer/timer.c - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include -#include - -#define CLOCKS_PER_MICROSECOND ( CPU_CLOCK_RATE_MHZ ) -#define TIMER_MAX_VALUE 0xffffffff - -extern uint32_t mips_read_timer( void ); - -static bool benchmark_timer_find_average_overhead; -static uint32_t benchmark_timer_initial_value = 0; - -void benchmark_timer_initialize( void ) -{ - benchmark_timer_initial_value = mips_read_timer(); - /* - * Somehow start the timer - */ - - /* Timer on 4650 is always running */ -} - -/* - * The following controls the behavior of benchmark_timer_read(). - * - * AVG_OVEREHAD is the overhead for starting and stopping the timer. It - * is usually deducted from the number returned. - * - * LEAST_VALID is the lowest number this routine should trust. Numbers - * below this are "noise" and zero is returned. - */ - -#define AVG_OVERHEAD 8 /* It typically takes X.X microseconds */ - /* (Y countdowns) to start/stop the timer. */ - /* This value is in cycles. */ -#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */ - -benchmark_timer_t benchmark_timer_read( void ) -{ - uint64_t clicks; - uint32_t total; - - /* - * Read the timer and see how many clicks it has been since we started. - */ - - clicks = mips_read_timer(); /* XXX: read some HW here */ - if (clicks < benchmark_timer_initial_value) - { - clicks += TIMER_MAX_VALUE; - } - clicks -= benchmark_timer_initial_value; - - /* - * Total is calculated by taking into account the number of timer overflow - * interrupts since the timer was initialized and clicks since the last - * interrupts. - */ -#if 0 /* leave total in number of cycles */ - total = clicks / CLOCKS_PER_MICROSECOND; -#else - total = clicks; -#endif - - if ( benchmark_timer_find_average_overhead == 1 ) - return total; /* in # cycles units */ - else { - if ( total < LEAST_VALID ) - return 0; /* below timer resolution */ - /* - * leave total in cycles - */ - return (total - AVG_OVERHEAD); - } -} - -void benchmark_timer_disable_subtracting_average_overhead(bool find_flag) -{ - benchmark_timer_find_average_overhead = find_flag; -} -- cgit v1.2.3