From ab971bf5e37a057432c267175ddf12d6799a2b35 Mon Sep 17 00:00:00 2001 From: Amaan Cheval Date: Mon, 13 Aug 2018 15:51:47 +0530 Subject: bsps/x86_64: Reorganize header files and compile-options Updates #2898. --- bsps/x86_64/amd64/config/amd64.cfg | 3 ++ cpukit/score/cpu/x86_64/headers.am | 1 + cpukit/score/cpu/x86_64/include/rtems/asm.h | 10 +++++ cpukit/score/cpu/x86_64/include/rtems/score/cpu.h | 5 ++- .../score/cpu/x86_64/include/rtems/score/cpu_asm.h | 50 ++++++++++++++++++++++ .../score/cpu/x86_64/include/rtems/score/cpuimpl.h | 16 +------ .../score/cpu/x86_64/include/rtems/score/x86_64.h | 13 +++++- cpukit/score/cpu/x86_64/x86_64-context-switch.S | 8 ++-- 8 files changed, 84 insertions(+), 22 deletions(-) create mode 100644 cpukit/score/cpu/x86_64/include/rtems/score/cpu_asm.h diff --git a/bsps/x86_64/amd64/config/amd64.cfg b/bsps/x86_64/amd64/config/amd64.cfg index 3c4492d9d3..ad861cb867 100644 --- a/bsps/x86_64/amd64/config/amd64.cfg +++ b/bsps/x86_64/amd64/config/amd64.cfg @@ -11,3 +11,6 @@ CPU_CFLAGS = -mno-red-zone # way we can avoid linker-time relocation errors spawning from values being # larger than their optimized container sizes. CPU_CFLAGS += -mcmodel=large +CPU_CFLAGS += -Werror=return-type + +LDFLAGS = -Wl,--gc-sections diff --git a/cpukit/score/cpu/x86_64/headers.am b/cpukit/score/cpu/x86_64/headers.am index b3792d00b1..d23c39d99b 100644 --- a/cpukit/score/cpu/x86_64/headers.am +++ b/cpukit/score/cpu/x86_64/headers.am @@ -11,6 +11,7 @@ include_rtems_HEADERS += include/rtems/asm.h include_rtems_scoredir = $(includedir)/rtems/score include_rtems_score_HEADERS = include_rtems_score_HEADERS += include/rtems/score/cpu.h +include_rtems_score_HEADERS += include/rtems/score/cpu_asm.h include_rtems_score_HEADERS += include/rtems/score/cpuatomic.h include_rtems_score_HEADERS += include/rtems/score/cpuimpl.h include_rtems_score_HEADERS += include/rtems/score/x86_64.h diff --git a/cpukit/score/cpu/x86_64/include/rtems/asm.h b/cpukit/score/cpu/x86_64/include/rtems/asm.h index 36699140b7..76efc07db3 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/asm.h +++ b/cpukit/score/cpu/x86_64/include/rtems/asm.h @@ -84,6 +84,16 @@ #define r14 REG (r14) #define r15 REG (r15) +/* + * Order of register usage for function arguments as per the calling convention + */ +#define REG_ARG0 rdi +#define REG_ARG1 rsi +#define REG_ARG2 rdx +#define REG_ARG3 rcx +#define REG_ARG4 r8 +#define REG_ARG5 r9 + // XXX: eax, ax, etc., segment registers /* diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h index 5c40af7647..557d11109d 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h @@ -40,6 +40,7 @@ extern "C" { #endif #include +#include #include #define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE @@ -54,7 +55,7 @@ extern "C" { #define CPU_PROVIDES_IDLE_THREAD_BODY FALSE #define CPU_STACK_GROWS_UP FALSE -#define CPU_STRUCTURE_ALIGNMENT __attribute__((aligned ( 64 ))) +#define CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED(64) #define CPU_CACHE_LINE_BYTES 64 #define CPU_MODES_INTERRUPT_MASK 0x00000001 #define CPU_MAXIMUM_PROCESSORS 32 @@ -104,7 +105,7 @@ typedef struct { uint32_t special_interrupt_register; } CPU_Interrupt_frame; -#endif /* ASM */ +#endif /* !ASM */ #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpu_asm.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpu_asm.h new file mode 100644 index 0000000000..ac43a6366d --- /dev/null +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpu_asm.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2018. + * Amaan Cheval + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef _RTEMS_SCORE_CPU_ASM_H +#define _RTEMS_SCORE_CPU_ASM_H + +#if !ASM + +#include + +RTEMS_INLINE_ROUTINE uint8_t inport_byte(uint16_t port) +{ + uint8_t ret; + __asm__ volatile ( "inb %1, %0" + : "=a" (ret) + : "Nd" (port) ); + return ret; +} + +RTEMS_INLINE_ROUTINE void outport_byte(uint16_t port, uint8_t val) +{ + __asm__ volatile ( "outb %0, %1" : : "a" (val), "Nd" (port) ); +} + +#endif /* !ASM */ + +#endif diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h index 722edeb00e..a3a40faf66 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h @@ -28,20 +28,6 @@ extern "C" { #endif -static inline uint8_t inport_byte(uint16_t port) -{ - uint8_t ret; - __asm__ volatile ( "inb %1, %0" - : "=a" (ret) - : "Nd" (port) ); - return ret; -} - -static inline void outport_byte(uint16_t port, uint8_t val) -{ - __asm__ volatile ( "outb %0, %1" : : "a" (val), "Nd" (port) ); -} - RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ @@ -68,6 +54,6 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) } #endif -#endif /* ASM */ +#endif /* !ASM */ #endif /* _RTEMS_SCORE_CPUIMPL_H */ diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/x86_64.h b/cpukit/score/cpu/x86_64/include/rtems/score/x86_64.h index 853e45ab5d..f4710c4b8f 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/x86_64.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/x86_64.h @@ -32,11 +32,20 @@ extern "C" { #endif #define CPU_NAME "x86-64" -#define CPU_MODEL_NAME "XXX: x86-64 generic" +#define CPU_MODEL_NAME "amd64" -#define COM1_BASE_IO 0x3F8 +#define COM1_BASE_IO 0x3F8 #define COM1_CLOCK_RATE (115200 * 16) +#define EFLAGS_INTR_ENABLE 0x200 + +#if DEBUG +#define DBG_PRINTF(format, args...) \ + printf(format, ## args) +#else +#define DBG_PRINTF(format, args...) +#endif + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/x86_64/x86_64-context-switch.S b/cpukit/score/cpu/x86_64/x86_64-context-switch.S index cb451e9acb..5ff78d23e0 100644 --- a/cpukit/score/cpu/x86_64/x86_64-context-switch.S +++ b/cpukit/score/cpu/x86_64/x86_64-context-switch.S @@ -46,8 +46,10 @@ BEGIN_CODE .p2align 1 PUBLIC(_CPU_Context_switch) -.set RUNCONTEXT_ARG, rdi /* save context argument */ -.set HEIRCONTEXT_ARG, rsi /* restore context argument */ +/* save context argument */ +.set RUNCONTEXT_ARG, REG_ARG0 +/* restore context argument */ +.set HEIRCONTEXT_ARG, REG_ARG1 SYM(_CPU_Context_switch): movq RUNCONTEXT_ARG, rax /* rax = running threads context */ @@ -88,7 +90,7 @@ restore: PUBLIC(_CPU_Context_restore) -.set NEWCONTEXT_ARG, rdi /* context to restore argument */ +.set NEWCONTEXT_ARG, REG_ARG0 /* context to restore argument */ SYM(_CPU_Context_restore): movq NEWCONTEXT_ARG, rax /* rax = running threads context */ -- cgit v1.2.3