From a5225d7840e2d81008b64e7630a5eabdb4f376cc Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 29 Sep 2004 17:32:16 +0000 Subject: 2004-09-29 Joel Sherrill * score/cpu/i960/.cvsignore, score/cpu/i960/ChangeLog, score/cpu/i960/Makefile.am, score/cpu/i960/asm.h, score/cpu/i960/cpu.c, score/cpu/i960/cpu_asm.S, score/cpu/i960/rtems/score/cpu.h, score/cpu/i960/rtems/score/i960.h, score/cpu/i960/rtems/score/types.h: Removed. --- cpukit/ChangeLog | 8 + cpukit/score/cpu/i960/.cvsignore | 2 - cpukit/score/cpu/i960/ChangeLog | 224 -------------- cpukit/score/cpu/i960/Makefile.am | 58 ---- cpukit/score/cpu/i960/asm.h | 110 ------- cpukit/score/cpu/i960/cpu.c | 81 ----- cpukit/score/cpu/i960/cpu_asm.S | 213 ------------- cpukit/score/cpu/i960/rtems/score/cpu.h | 485 ------------------------------ cpukit/score/cpu/i960/rtems/score/i960.h | 194 ------------ cpukit/score/cpu/i960/rtems/score/types.h | 57 ---- 10 files changed, 8 insertions(+), 1424 deletions(-) delete mode 100644 cpukit/score/cpu/i960/.cvsignore delete mode 100644 cpukit/score/cpu/i960/ChangeLog delete mode 100644 cpukit/score/cpu/i960/Makefile.am delete mode 100644 cpukit/score/cpu/i960/asm.h delete mode 100644 cpukit/score/cpu/i960/cpu.c delete mode 100644 cpukit/score/cpu/i960/cpu_asm.S delete mode 100644 cpukit/score/cpu/i960/rtems/score/cpu.h delete mode 100644 cpukit/score/cpu/i960/rtems/score/i960.h delete mode 100644 cpukit/score/cpu/i960/rtems/score/types.h diff --git a/cpukit/ChangeLog b/cpukit/ChangeLog index c4488f1366..ed1ad60ee1 100644 --- a/cpukit/ChangeLog +++ b/cpukit/ChangeLog @@ -1,3 +1,11 @@ +2004-09-29 Joel Sherrill + + * score/cpu/i960/.cvsignore, score/cpu/i960/ChangeLog, + score/cpu/i960/Makefile.am, score/cpu/i960/asm.h, + score/cpu/i960/cpu.c, score/cpu/i960/cpu_asm.S, + score/cpu/i960/rtems/score/cpu.h, score/cpu/i960/rtems/score/i960.h, + score/cpu/i960/rtems/score/types.h: Removed. + 2004-09-27 Joel Sherrill PR 294/rtems diff --git a/cpukit/score/cpu/i960/.cvsignore b/cpukit/score/cpu/i960/.cvsignore deleted file mode 100644 index 282522db03..0000000000 --- a/cpukit/score/cpu/i960/.cvsignore +++ /dev/null @@ -1,2 +0,0 @@ -Makefile -Makefile.in diff --git a/cpukit/score/cpu/i960/ChangeLog b/cpukit/score/cpu/i960/ChangeLog deleted file mode 100644 index bd3494374a..0000000000 --- a/cpukit/score/cpu/i960/ChangeLog +++ /dev/null @@ -1,224 +0,0 @@ -2004-04-06 Ralf Corsepius - - * configure.ac: Remove (Merged into $(top_srcdir)/configure.ac). - * Makefile.am: Don't include multilib.am. - Reflect merging configure.ac into $(top_srcdir)/configure.ac. - -2004-04-01 Ralf Corsepius - - * Makefile.am: Install asm.h to $(includedir)/rtems. - -2004-03-30 Ralf Corsepius - - * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types. - -2004-03-29 Ralf Corsepius - - * configure.ac: RTEMS_TOP([../../../..]). - -2004-01-21 Ralf Corsepius - - * configure.ac: Move RTEMS_TOP one subdir down. - -2004-01-19 Ralf Corsepius - - * Makefile.am: Add PREINSTALL_DIRS. - -2004-01-14 Ralf Corsepius - - * Makefile.am: Re-add dirstamps to PREINSTALL_FILES. - Add PREINSTALL_FILES to CLEANFILES. - -2004-01-12 Ralf Corsepius - - * configure.ac: Requires automake >= 1.8.1. - -2004-01-11 Ralf Corsepius - - * Makefile.am: Include compile.am, again. - -2004-01-11 Ralf Corsepius - - * Makefile.am: Convert to using automake compilation rules. - -2003-12-12 Ralf Corsepius - - * Makefile.am: Use mkdir_p. Remove dirs from PREINSTALL_FILES. - -2003-12-12 Ralf Corsepius - - * configure.ac: Require automake >= 1.8, autoconf >= 2.59. - -2003-12-01 Ralf Corsepius - - * Makefile.am: Remove TMPINSTALL_FILES. - -2003-11-30 Ralf Corsepius - - * Makefile.am: Add $(dirstamp) to preinstallation rules. - -2003-11-23 Ralf Corsepius - - * Makefile.am: Don't use gmake rules for preinstallation. - -2003-10-21 Ralf Corsepius - - * configure.ac: Remove RTEMS_CANONICAL_HOST. - -2003-10-21 Ralf Corsepius - - * configure.ac: Remove RTEMS_CHECK_CPU. - -2003-09-04 Joel Sherrill - - * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/i960.h, - rtems/score/types.h: URL for license changed. - -2003-08-11 Ralf Corsepius - - * configure.ac: Use rtems-bugs@rtems.com as bug report email address. - -2003-03-06 Ralf Corsepius - - * configure.ac: Remove AC_CONFIG_AUX_DIR. - -2002-12-11 Ralf Corsepius - - * configure.ac: Require autoconf-2.57 + automake-1.7.2. - * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS. - -2002-11-19 Ralf Corsepius - - * configure.ac: Fix package name. - -2002-10-25 Ralf Corsepius - - * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE. - -2002-10-21 Ralf Corsepius - - * .cvsignore: Reformat. - Add autom4te*cache. - Remove autom4te.cache. - -2002-07-26 Ralf Corsepius - - * Makefile.am: Build libscorecpu.a instead of rtems-cpu.rel. - -2002-07-22 Ralf Corsepius - - * Makefile.am: Use .$(OBJEXT) instead of .o. - -2002-07-05 Ralf Corsepius - - * configure.ac: RTEMS_TOP(../../../..). - -2002-07-03 Ralf Corsepius - - * rtems.S: Remove. - * Makefile.am: Reflect changes above. - -2002-07-01 Ralf Corsepius - - * configure.ac: Remove RTEMS_PROJECT_ROOT. - -2002-06-27 Ralf Corsepius - - * configure.ac: Add RTEMS_PROG_CCAS - -2002-06-27 Ralf Corsepius - - * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..). - Add AC_PROG_RANLIB. - -2002-06-17 Ralf Corsepius - - * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. - Use ../../../aclocal. - -2002-06-17 Ralf Corsepius - - * Makefile.am: Include $(top_srcdir)/../../../automake/*.am. - Use ../../../aclocal. - -2001-04-03 Joel Sherrill - - * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. - * rtems/score/m68ktypes.h: Removed. - * rtems/score/types.h: New file via CVS magic. - * Makefile.am, rtems/score/cpu.h: Account for name change. - -2001-04-03 Joel Sherrill - - * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h. - * rtems/score/i960types.h: Removed. - * rtems/score/types.h: New file via CVS magic. - * Makefile.am, rtems/score/cpu.h: Account for name change. - -2002-03-27 Ralf Corsepius - - * configure.ac: - AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS). - AM_INIT_AUTOMAKE([no-define foreign 1.6]). - * Makefile.am: Remove AUTOMAKE_OPTIONS. - -2002-01-29 Ralf Corsepius - - * rtems/Makefile.am: Removed. - * rtems/score/Makefile.am: Removed. - * configure.ac: Reflect changes above. - * Makefile.am: Reflect changes above. - -2001-12-19 Ralf Corsepius - - * Makefile.am: Add multilib support. - -2001-11-28 Joel Sherrill , - - This was tracked as PR91. - * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which - is used to specify if the port uses the standard macro for this (FALSE). - A TRUE setting indicates the port provides its own implementation. - -2001-10-11 Ralf Corsepius - - * .cvsignore: Add autom4te.cache for autoconf > 2.52. - * configure.in: Remove. - * configure.ac: New file, generated from configure.in by autoupdate. - -2001-09-23 Ralf Corsepius - - * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. - * Makefile.am: Use 'PREINSTALL_FILES ='. - -2001-02-04 Ralf Corsepius - - * Makefile.am, rtems/score/Makefile.am: - Apply include_*HEADERS instead of H_FILES. - -2001-01-03 Joel Sherrill - - * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). - * cpu_asm.S: Modify to properly dereference _ISR_Vector_table - now that it is dynamically allocated. - -2000-11-09 Ralf Corsepius - - * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS. - -2000-11-02 Ralf Corsepius - - * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal. - -2000-10-25 Ralf Corsepius - - * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. - Switch to GNU canonicalization. - -2000-09-04 Ralf Corsepius - - * Makefile.am: Include compile.am. - -2000-08-10 Joel Sherrill - - * ChangeLog: New file. diff --git a/cpukit/score/cpu/i960/Makefile.am b/cpukit/score/cpu/i960/Makefile.am deleted file mode 100644 index c30ddf4213..0000000000 --- a/cpukit/score/cpu/i960/Makefile.am +++ /dev/null @@ -1,58 +0,0 @@ -## -## $Id$ -## - -include $(top_srcdir)/automake/compile.am - -include_rtemsdir = $(includedir)/rtems -include_rtems_HEADERS = asm.h - -include_rtems_scoredir = $(includedir)/rtems/score -include_rtems_score_HEADERS = rtems/score/cpu.h rtems/score/i960.h \ - rtems/score/types.h - -EXTRA_LIBRARIES = libscorecpu.a -CLEANFILES = libscorecpu.a -libscorecpu_a_SOURCES = cpu.c cpu_asm.S -libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_OPTIMIZE_V) - -EXTRA_LIBRARIES += libscorecpu_g.a -CLEANFILES += libscorecpu_g.a -libscorecpu_g_a_SOURCES = $(libscorecpu_a_SOURCES) -libscorecpu_g_a_CPPFLAGS = $(AM_CPPFLAGS) $(CFLAGS_DEBUG_V) - -all-local: $(PREINSTALL_FILES) libscorecpu$(LIB_VARIANT).a - -PREINSTALL_DIRS = -PREINSTALL_FILES = - -$(PROJECT_INCLUDE)/rtems/$(dirstamp): - @$(mkdir_p) $(PROJECT_INCLUDE)/rtems - @: > $(PROJECT_INCLUDE)/rtems/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/$(dirstamp) - -$(PROJECT_INCLUDE)/rtems/asm.h: asm.h $(PROJECT_INCLUDE)/rtems/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/asm.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/asm.h - -$(PROJECT_INCLUDE)/rtems/score/$(dirstamp): - @$(mkdir_p) $(PROJECT_INCLUDE)/rtems/score - @: > $(PROJECT_INCLUDE)/rtems/score/$(dirstamp) -PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/score/$(dirstamp) - -$(PROJECT_INCLUDE)/rtems/score/cpu.h: rtems/score/cpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu.h - -$(PROJECT_INCLUDE)/rtems/score/i960.h: rtems/score/i960.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/i960.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/i960.h - -$(PROJECT_INCLUDE)/rtems/score/types.h: rtems/score/types.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/types.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/types.h - -CLEANFILES += $(PREINSTALL_FILES) -DISTCLEANFILES = $(PREINSTALL_DIRS) - -include $(top_srcdir)/automake/local.am diff --git a/cpukit/score/cpu/i960/asm.h b/cpukit/score/cpu/i960/asm.h deleted file mode 100644 index e98f900f59..0000000000 --- a/cpukit/score/cpu/i960/asm.h +++ /dev/null @@ -1,110 +0,0 @@ -/* asm.h - * - * This include file attempts to address the problems - * caused by incompatible flavors of assemblers and - * toolsets. It primarily addresses variations in the - * use of leading underscores on symbols and the requirement - * that register names be preceded by a %. - * - * - * NOTE: The spacing in the use of these macros - * is critical to them working as advertised. - * - * COPYRIGHT: - * - * This file is based on similar code found in newlib available - * from ftp.cygnus.com. The file which was used had no copyright - * notice. This file is freely distributable as long as the source - * of the file is noted. This file is: - * - * COPYRIGHT (c) 1994-1997. - * On-Line Applications Research Corporation (OAR). - * - * $Id$ - */ - -#ifndef __i960_ASM_h -#define __i960_ASM_h - -/* - * Indicate we are in an assembly file and get the basic CPU definitions. - */ - -#ifndef ASM -#define ASM -#endif -#include -#include - -/* - * Recent versions of GNU cpp define variables which indicate the - * need for underscores and percents. If not using GNU cpp or - * the version does not support this, then you will obviously - * have to define these as appropriate. - */ - -#ifndef __USER_LABEL_PREFIX__ -#define __USER_LABEL_PREFIX__ _ -#endif - -#ifndef __REGISTER_PREFIX__ -#define __REGISTER_PREFIX__ -#endif - -/* ANSI concatenation macros. */ - -#define CONCAT1(a, b) CONCAT2(a, b) -#define CONCAT2(a, b) a ## b - -/* Use the right prefix for global labels. */ - -#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x) - -/* Use the right prefix for registers. */ - -#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) - -#define g0 REG (g0) -#define g1 REG (g1) -#define g2 REG (g2) -#define g3 REG (g3) -#define g4 REG (g4) -#define g5 REG (g5) -#define g6 REG (g6) -#define g7 REG (g7) -#define g8 REG (g8) -#define g9 REG (g9) -#define g10 REG (g10) -#define g11 REG (g11) -#define g12 REG (g12) -#define g13 REG (g13) -#define g14 REG (g14) -#define g15 REG (g15) - -/* - * Define macros to handle section beginning and ends. - */ - - -#define BEGIN_CODE_DCL .text -#define END_CODE_DCL -#define BEGIN_DATA_DCL .data -#define END_DATA_DCL -#define BEGIN_CODE .text -#define END_CODE -#define BEGIN_DATA -#define END_DATA -#define BEGIN_BSS -#define END_BSS -#define END - -/* - * Following must be tailor for a particular flavor of the C compiler. - * They may need to put underscores in front of the symbols. - */ - -#define PUBLIC(sym) .globl SYM (sym) -#define EXTERN(sym) .globl SYM (sym) - -#endif -/* end of include file */ diff --git a/cpukit/score/cpu/i960/cpu.c b/cpukit/score/cpu/i960/cpu.c deleted file mode 100644 index 5a26da446f..0000000000 --- a/cpukit/score/cpu/i960/cpu.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Intel i960CA Dependent Source - * - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - -#include -#include - -/* _CPU_Initialize - * - * This routine performs processor dependent initialization. - * - * INPUT PARAMETERS: - * cpu_table - CPU table to initialize - * thread_dispatch - address of disptaching routine - * - * OUTPUT PARAMETERS: NONE - */ - -void _CPU_Initialize( - rtems_cpu_table *cpu_table, - void (*thread_dispatch) /* ignored on this CPU */ -) -{ - - _CPU_Table = *cpu_table; - -} - -/*PAGE - * - * _CPU_ISR_Get_level - */ - -uint32_t _CPU_ISR_Get_level( void ) -{ - uint32_t level; - - i960_get_interrupt_level( level ); - - return level; -} - -/*PAGE - * - * _CPU__ISR_install_vector - * - * Install the RTEMS vector wrapper in the CPU's interrupt table. - * - * Input parameters: - * vector - interrupt vector number - * old_handler - former ISR for this vector number - * new_handler - replacement ISR for this vector number - * - * Output parameters: NONE - * - */ - -void _CPU_ISR_install_vector( - uint32_t vector, - proc_ptr new_handler, - proc_ptr *old_handler -) -{ - proc_ptr ignored; - - *old_handler = _ISR_Vector_table[ vector ]; - - _CPU_ISR_install_raw_handler( vector, _ISR_Handler, &ignored ); - - _ISR_Vector_table[ vector ] = new_handler; -} diff --git a/cpukit/score/cpu/i960/cpu_asm.S b/cpukit/score/cpu/i960/cpu_asm.S deleted file mode 100644 index 2b49b5cda1..0000000000 --- a/cpukit/score/cpu/i960/cpu_asm.S +++ /dev/null @@ -1,213 +0,0 @@ -/* - * This file contains all assembly code for the i960 port of RTEMS. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - .data -_ISR_reg_save: - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - - .text -/* - * Format of i960ca Register structure - */ - -.set REG_R0_PFP , 0 # (r0) Previous Frame Pointer -.set REG_R1_SP , REG_R0_PFP+4 # (r1) Stack Pointer -.set REG_PC , REG_R1_SP+4 # (pc) Processor Controls -.set REG_G8 , REG_PC+4 # (g8) Global Register 8 -.set REG_G9 , REG_G8+4 # (g9) Global Register 9 -.set REG_G10 , REG_G9+4 # (g10) Global Register 10 -.set REG_G11 , REG_G10+4 # (g11) Global Register 11 -.set REG_G12 , REG_G11+4 # (g12) Global Register 12 -.set REG_G13 , REG_G12+4 # (g13) Global Register 13 -.set REG_G14 , REG_G13+4 # (g14) Global Register 14 -.set REG_G15_FP , REG_G14+4 # (g15) Global Register 15 -.set SIZE_REGS , REG_G15_FP+4 # size of cpu_context_registers - # structure - -/* - * void _CPU_Context_switch( run_context, heir_context ) - * - * This routine performs a normal non-FP context. - */ - .align 4 - .globl __CPU_Context_switch - -__CPU_Context_switch: - modpc 0,0,g2 # get old intr level (PC) - st g2,REG_PC(g0) # save pc - stq g8,REG_G8(g0) # save g8-g11 - stq g12,REG_G12(g0) # save g12-g15 - stl pfp,REG_R0_PFP(g0) # save pfp, sp - -restore: flushreg # flush register cache - ldconst 0x001f0000,g2 # g2 = PC mask - ld REG_PC(g1),g3 # thread->Regs.pc = pc; - ldq REG_G12(g1),g12 # restore g12-g15 - ldl REG_R0_PFP(g1),pfp # restore pfp, sp - ldq REG_G8(g1),g8 # restore g8-g11 - modpc 0,g2,g3 # restore PC register - ret - -/* - * void _CPU_Context_restore( new_context ) - * - * This routine performs a normal non-FP context. - */ - - .globl __CPU_Context_restore -__CPU_Context_restore: - mov g0,g1 # g0 = _Thread_executing - b restore - -/*PAGE - * void _CPU_Context_save_fp_context( &fp_context_ptr ) - * void _CPU_Context_restore_fp_context( &fp_context_ptr ) - * - * There is currently no hardware floating point for the i960. - */ - - .globl __CPU_Context_save_fp - .globl __CPU_Context_restore_fp -__CPU_Context_save_fp: -__CPU_Context_restore_fp: -#if ( I960_HAS_FPU == 1 ) -#error "Floating point support for i960 family has been implemented!!!" -#endif - ret - -/*PAGE - * void __ISR_Handler() - * - * This routine provides the RTEMS interrupt management. - * - * Input parameters: NONE - * - * Output parameters: NONE - * - * NOTE: - * Upon entry, the supervisor stack will contain a stack frame - * back to the interrupted thread and the interrupt stack will contain - * an interrupt stack frame. If dispatching is enabled, this - * is the outer most interrupt, and (a context switch is necessary or - * the current thread has signals), then set up the supervisor stack to - * transfer control to the interrupt dispatcher. - */ - - .globl __ISR_Handler -__ISR_Handler: - #ldconst 1,r8 - #modpc 0,r8,r8 # enable tracing - - # r4 = &_Thread_Dispatch_disable_level - ld __Thread_Dispatch_disable_level,r4 - movl g0,r8 # save g0-g1 - - ld -16+8(fp),g0 # g0 = vector number - movl g2,r10 # save g2-g3 - - ld __ISR_Nest_level,r5 # r5 = &_Isr_nest_level - mov g14,r7 # save g14 - - lda 0,g14 # NOT Branch and Link - movl g4,r12 # save g4-g5 - - lda 1(r4),r4 # increment dispatch disable level - movl g6,r14 # save g6-g7 - - ld __ISR_Vector_table,g1 # g1 = base of vector table - - stq g8, _ISR_reg_save # save g8-g11 - stl g12, _ISR_reg_save+16 # save g12-g13 - - ld (g1)[g0*4],g1 # g1 = Users handler - addo 1,r5,r5 # increment ISR level - - st r4,__Thread_Dispatch_disable_level - # one ISR nest level deeper - subo 1,r4,r4 # decrement dispatch disable level - - st r5,__ISR_Nest_level # disable multitasking - subo 1,r5,r5 # decrement ISR nest level - - callx (g1) # invoke user ISR - - # unnest multitasking - st r5,__ISR_Nest_level # one less ISR nest level - cmpobne.f 0,r4,exit # If dispatch disabled, exit - ldl -16(fp),g0 # g0 = threads PC reg - # g1 = threads AC reg - ld __Context_Switch_necessary,r6 - # r6 = Is thread switch necessary? - bbs.f 13,g0,exit # not outer level, then exit - cmpobne.f 0,r6,bframe # Switch necessary? - - ld __ISR_Signals_to_thread_executing,g2 - # signals sent to Run_thread - # while in interrupt handler? - cmpobe.f 0,g2,exit # No, then exit - -bframe: mov 0,g2 - st g2,__ISR_Signals_to_thread_executing - - ldconst 0x1f0000,g2 # g2 = intr disable mask - mov g2,g3 # g3 = new intr level - modpc 0,g2,g3 # set new level - - andnot 7,pfp,r4 # r4 = pfp without ret type - flushreg # flush registers - # push _Isr_dispatch ret frame - # build ISF in r4-r6 - ldconst 64,g2 # g2 = size of stack frame - ld 4(r4),g3 # g3 = previous sp - addo g2,g3,r5 # r5 = _Isr_dispatch SP - lda __ISR_Dispatch,r6 # r6 = _Isr_dispatch entry - stt r4,(g3) # set _Isr_dispatch ret info - st g1,16(g3) # set r4 = AC for ISR disp - or 7,g3,pfp # pfp to _Isr_dispatch - flushreg - b exit1 -exit: st r4,__Thread_Dispatch_disable_level -exit1: mov r7,g14 # restore g14 - movq r8,g0 # restore g0-g3 - movq r12,g4 # restore g4-g7 - ldq _ISR_reg_save, g8 # restore g8-g11 - ldl _ISR_reg_save+16, g12 # restore g12-g13 - ret - - -/*PAGE - * - * void __ISR_Dispatch() - * - * Entry point from the outermost interrupt service routine exit. - * The current stack is the supervisor mode stack. - */ - - .globl __ISR_Dispatch -__ISR_Dispatch: - mov g14,r7 - mov 0,g14 - movq g0,r8 - movq g4,r12 - call __Thread_Dispatch - - ldconst -1,r5 # r5 = reload mask - modac r5,r4,r4 # restore threads AC register - mov r7,g14 - movq r8,g0 - movq r12,g4 - ret diff --git a/cpukit/score/cpu/i960/rtems/score/cpu.h b/cpukit/score/cpu/i960/rtems/score/cpu.h deleted file mode 100644 index 77a6dc55a6..0000000000 --- a/cpukit/score/cpu/i960/rtems/score/cpu.h +++ /dev/null @@ -1,485 +0,0 @@ -/* cpu.h - * - * This include file contains information pertaining to the Intel - * i960 processor family. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - -#ifndef __CPU_h -#define __CPU_h - -#ifdef __cplusplus -extern "C" { -#endif - -#include /* pick up machine definitions */ -#ifndef ASM -#include -#endif - -#define CPU_INLINE_ENABLE_DISPATCH FALSE -#define CPU_UNROLL_ENQUEUE_PRIORITY FALSE - -/* - * Use the i960's hardware interrupt stack support and have the - * interrupt manager allocate the memory for it. - */ - -#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE -#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE -#define CPU_ALLOCATE_INTERRUPT_STACK TRUE - -/* - * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector - * number (0)? - */ - -#define CPU_ISR_PASSES_FRAME_POINTER 0 - -/* - * Some family members have no FP (SA/KA/CA/CF), others have it built in - * (KB/MC/MX). There does not appear to be an external coprocessor - * for this family. - */ - -#if ( I960_HAS_FPU == 1 ) -#define CPU_HARDWARE_FP TRUE -#error "Floating point support for i960 family has been implemented!!!" -#else -#define CPU_HARDWARE_FP FALSE -#endif - -#define CPU_SOFTWARE_FP FALSE - -#define CPU_ALL_TASKS_ARE_FP FALSE -#define CPU_IDLE_TASK_IS_FP FALSE -#define CPU_USE_DEFERRED_FP_SWITCH TRUE - -#define CPU_PROVIDES_IDLE_THREAD_BODY FALSE -#define CPU_STACK_GROWS_UP TRUE -#define CPU_STRUCTURE_ALIGNMENT /* __attribute__ ((aligned (16))) */ - -/* - * Define what is required to specify how the network to host conversion - * routines are handled. - */ - -#define CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES FALSE -#define CPU_BIG_ENDIAN TRUE -#define CPU_LITTLE_ENDIAN FALSE - - -/* structures */ - -/* - * Basic integer context for the i960 family. - */ - -typedef struct { - void *r0_pfp; /* (r0) Previous Frame Pointer */ - void *r1_sp; /* (r1) Stack Pointer */ - uint32_t pc; /* (pc) Processor Control */ - void *g8; /* (g8) Global Register 8 */ - void *g9; /* (g9) Global Register 9 */ - void *g10; /* (g10) Global Register 10 */ - void *g11; /* (g11) Global Register 11 */ - void *g12; /* (g12) Global Register 12 */ - void *g13; /* (g13) Global Register 13 */ - uint32_t g14; /* (g14) Global Register 14 */ - void *g15_fp; /* (g15) Frame Pointer */ -} Context_Control; - -/* - * FP context save area for the i960 Numeric Extension - */ - -typedef struct { - uint32_t fp0_1; /* (fp0) first word */ - uint32_t fp0_2; /* (fp0) second word */ - uint32_t fp0_3; /* (fp0) third word */ - uint32_t fp1_1; /* (fp1) first word */ - uint32_t fp1_2; /* (fp1) second word */ - uint32_t fp1_3; /* (fp1) third word */ - uint32_t fp2_1; /* (fp2) first word */ - uint32_t fp2_2; /* (fp2) second word */ - uint32_t fp2_3; /* (fp2) third word */ - uint32_t fp3_1; /* (fp3) first word */ - uint32_t fp3_2; /* (fp3) second word */ - uint32_t fp3_3; /* (fp3) third word */ -} Context_Control_fp; - -/* - * The following structure defines the set of information saved - * on the current stack by RTEMS upon receipt of each interrupt. - */ - -typedef struct { - uint32_t TBD; /* XXX Fix for this CPU */ -} CPU_Interrupt_frame; - -/* - * Call frame for the i960 family. - */ - -typedef struct { - void *r0_pfp; /* (r0) Previous Frame Pointer */ - void *r1_sp; /* (r1) Stack Pointer */ - void *r2_rip; /* (r2) Return Instruction Pointer */ - void *r3; /* (r3) Local Register 3 */ - void *r4; /* (r4) Local Register 4 */ - void *r5; /* (r5) Local Register 5 */ - void *r6; /* (r6) Local Register 6 */ - void *r7; /* (r7) Local Register 7 */ - void *r8; /* (r8) Local Register 8 */ - void *r9; /* (r9) Local Register 9 */ - void *r10; /* (r10) Local Register 10 */ - void *r11; /* (r11) Local Register 11 */ - void *r12; /* (r12) Local Register 12 */ - void *r13; /* (r13) Local Register 13 */ - void *r14; /* (r14) Local Register 14 */ - void *r15; /* (r15) Local Register 15 */ - /* XXX Looks like sometimes there is FP stuff here (MC manual)? */ -} CPU_Call_frame; - -/* - * The following table contains the information required to configure - * the i960 specific parameters. - */ - -typedef struct { - void (*pretasking_hook)( void ); - void (*predriver_hook)( void ); - void (*postdriver_hook)( void ); - void (*idle_task)( void ); - boolean do_zero_of_workspace; - uint32_t idle_task_stack_size; - uint32_t interrupt_stack_size; - uint32_t extra_mpci_receive_server_stack; - void * (*stack_allocate_hook)( uint32_t ); - void (*stack_free_hook)( void* ); - /* end of fields required on all CPUs */ -} rtems_cpu_table; - -/* - * Macros to access required entires in the CPU Table are in - * the file rtems/system.h. - */ - -/* - * Macros to access i960 specific additions to the CPU Table - * - * NONE - */ - -/* variables */ - -SCORE_EXTERN void *_CPU_Interrupt_stack_low; -SCORE_EXTERN void *_CPU_Interrupt_stack_high; - -/* constants */ - -/* - * This defines the number of levels and the mask used to pick those - * bits out of a thread mode. - */ - -#define CPU_MODES_INTERRUPT_LEVEL 0x0000001f /* interrupt level in mode */ -#define CPU_MODES_INTERRUPT_MASK 0x0000001f /* interrupt level in mode */ - -/* - * context size area for floating point - */ - -#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) - -/* - * extra stack required by the MPCI receive server thread - */ - -#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK (CPU_STACK_MINIMUM_SIZE) - -/* - * i960 family supports 256 distinct vectors. - */ - -#define CPU_INTERRUPT_NUMBER_OF_VECTORS 256 -#define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) - -/* - * This is defined if the port has a special way to report the ISR nesting - * level. Most ports maintain the variable _ISR_Nest_level. - */ - -#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE - -/* - * Minimum size of a thread's stack. - * - * NOTE: See CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK - */ - -#define CPU_STACK_MINIMUM_SIZE 2048 - -/* - * i960 is pretty tolerant of alignment but some CPU models do - * better with different default aligments so we use what the - * CPU model selected in rtems/score/i960.h. - */ - -#define CPU_ALIGNMENT I960_CPU_ALIGNMENT -#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT -#define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT - -/* - * i960ca stack requires 16 byte alignment - * - * NOTE: This factor may need to be family member dependent. - */ - -#define CPU_STACK_ALIGNMENT 16 - -/* macros */ - -/* - * ISR handler macros - * - * These macros perform the following functions: - * + initialize the RTEMS vector table - * + disable all maskable CPU interrupts - * + restore previous interrupt level (enable) - * + temporarily restore interrupts (flash) - * + set a particular level - */ - -#define _CPU_Initialize_vectors() -#define _CPU_ISR_Disable( _level ) i960_disable_interrupts( _level ) -#define _CPU_ISR_Enable( _level ) i960_enable_interrupts( _level ) -#define _CPU_ISR_Flash( _level ) i960_flash_interrupts( _level ) - -#define _CPU_ISR_Set_level( newlevel ) \ - { \ - uint32_t _mask = 0; \ - uint32_t _level = (newlevel); \ - \ - __asm__ volatile ( "ldconst 0x1f0000,%0; \ - modpc 0,%0,%1" : "=d" (_mask), "=d" (_level) \ - : "0" (_mask), "1" (_level) \ - ); \ - } - -uint32_t _CPU_ISR_Get_level( void ); - -/* ISR handler section macros */ - -/* - * Context handler macros - * - * These macros perform the following functions: - * + initialize a context area - * + restart the current thread - * + calculate the initial pointer into a FP context area - * + initialize an FP context area - */ - -#define _CPU_Context_Initialize( _the_context, _stack_base, _size, \ - _isr, _entry, _is_fp ) \ - { CPU_Call_frame *_texit_frame; \ - uint32_t _mask; \ - uint32_t _base_pc; \ - uint32_t _stack_tmp; \ - void *_stack; \ - \ - _stack_tmp = (uint32_t )(_stack_base) + CPU_STACK_ALIGNMENT; \ - _stack_tmp &= ~(CPU_STACK_ALIGNMENT - 1); \ - _stack = (void *) _stack_tmp; \ - \ - __asm__ volatile ( "flushreg" : : ); /* flush register cache */ \ - \ - (_the_context)->r0_pfp = _stack; \ - (_the_context)->g15_fp = _stack + (1 * sizeof(CPU_Call_frame)); \ - (_the_context)->r1_sp = _stack + (2 * sizeof(CPU_Call_frame)); \ - __asm__ volatile ( "ldconst 0x1f0000,%0 ; " \ - "modpc 0,0,%1 ; " \ - "andnot %0,%1,%1 ; " \ - : "=d" (_mask), "=d" (_base_pc) : ); \ - (_the_context)->pc = _base_pc | ((_isr) << 16); \ - (_the_context)->g14 = 0; \ - \ - _texit_frame = (CPU_Call_frame *)_stack; \ - _texit_frame->r0_pfp = NULL; \ - _texit_frame->r1_sp = (_the_context)->g15_fp; \ - _texit_frame->r2_rip = (_entry); \ - } - -#define _CPU_Context_Restart_self( _the_context ) \ - _CPU_Context_restore( (_the_context) ); - -#define _CPU_Context_Fp_start( _base, _offset ) NULL - -#define _CPU_Context_Initialize_fp( _fp_area ) - -/* end of Context handler macros */ - -/* - * Fatal Error manager macros - * - * These macros perform the following functions: - * + disable interrupts and halt the CPU - */ - -#define _CPU_Fatal_halt( _errorcode ) \ - { uint32_t _mask, _level; \ - uint32_t _error = (_errorcode); \ - \ - __asm__ volatile ( "ldconst 0x1f0000,%0 ; \ - mov %0,%1 ; \ - modpc 0,%0,%1 ; \ - mov %2,g0 ; \ - self: b self " \ - : "=d" (_mask), "=d" (_level), "=d" (_error) : ); \ - } - -/* end of Fatal Error Manager macros */ - -/* - * Bitfield handler macros - * - * These macros perform the following functions: - * + scan for the highest numbered (MSB) set in a 16 bit bitfield - */ - -#define CPU_USE_GENERIC_BITFIELD_CODE FALSE -#define CPU_USE_GENERIC_BITFIELD_DATA FALSE - -#define _CPU_Bitfield_Find_first_bit( _value, _output ) \ - { uint32_t _search = (_value); \ - \ - (_output) = 0; /* to prevent warnings */ \ - __asm__ volatile ( "scanbit %0,%1 " \ - : "=d" (_search), "=d" (_output) \ - : "0" (_search), "1" (_output) ); \ - } - -/* end of Bitfield handler macros */ - -/* - * Priority handler macros - * - * These macros perform the following functions: - * + return a mask with the bit for this major/minor portion of - * of thread priority set. - * + translate the bit number returned by "Bitfield_find_first_bit" - * into an index into the thread ready chain bit maps - */ - -#define _CPU_Priority_Mask( _bit_number ) \ - ( 0x8000 >> (_bit_number) ) - -#define _CPU_Priority_bits_index( _priority ) \ - ( 15 - (_priority) ) - -/* end of Priority handler macros */ - -/* functions */ - -/* - * _CPU_Initialize - * - * This routine performs CPU dependent initialization. - */ - -void _CPU_Initialize( - rtems_cpu_table *cpu_table, - void (*thread_dispatch) -); - -/* - * _CPU_ISR_install_raw_handler - * - * This routine installs a "raw" interrupt handler directly into the - * processor's vector table. - */ - -void _CPU_ISR_install_raw_handler( - uint32_t vector, - proc_ptr new_handler, - proc_ptr *old_handler -); - -/* - * _CPU_ISR_install_vector - * - * This routine installs an interrupt vector. - */ - -void _CPU_ISR_install_vector( - uint32_t vector, - proc_ptr new_handler, - proc_ptr *old_handler -); - -/* - * _CPU_Install_interrupt_stack - * - * This routine installs the hardware interrupt stack pointer. - */ - -void _CPU_Install_interrupt_stack( void ); - -/* - * _CPU_Context_switch - * - * This routine switches from the run context to the heir context. - */ - -void _CPU_Context_switch( - Context_Control *run, - Context_Control *heir -); - -/* - * _CPU_Context_restore - * - * This routine is generally used only to restart self in an - * efficient manner and avoid stack conflicts. - */ - -void _CPU_Context_restore( - Context_Control *new_context -); - -/* - * _CPU_Context_save_fp - * - * This routine saves the floating point context passed to it. - */ - -void _CPU_Context_save_fp( - void **fp_context_ptr -); - -/* - * _CPU_Context_restore_fp - * - * This routine restores the floating point context passed to it. - */ - -void _CPU_Context_restore_fp( - void **fp_context_ptr -); - -#ifdef __cplusplus -} -#endif - -#endif -/* end of include file */ diff --git a/cpukit/score/cpu/i960/rtems/score/i960.h b/cpukit/score/cpu/i960/rtems/score/i960.h deleted file mode 100644 index 42991c968b..0000000000 --- a/cpukit/score/cpu/i960/rtems/score/i960.h +++ /dev/null @@ -1,194 +0,0 @@ -/* i960.h - * - * This include file contains information pertaining to the Intel - * i960 processor family. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - -#ifndef __i960_h -#define __i960_h - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * This file contains the information required to build - * RTEMS for a particular member of the Intel i960 - * family. It does this by setting variables to indicate - * which implementation dependent features are present - * in a particular member of the family. - * - * NOTE: For now i960 support is for models without an FPU. - * The stubs for FP routines are in place so only need to be filled in. - * - * NOTE: RTEMS defines a canonical name for each cpu model. - */ - -/* - * Define the name of the CPU family. - */ - -#define CPU_NAME "Intel i960" - -/* - * This should work since most i960 models do not have FPUs. The logic is: - * - * + If the user specifically asks for soft-float, give it to them - * regardless of hardware availability. - * + If the CPU has hardware FPU, then use it. - * + Otherwise, we have to use soft float. - */ - -#if defined(_SOFT_FLOAT) -#define I960_HAS_FPU 0 -#elif defined(_i960_KB__) || defined(_i960_SB__) || defined(_i960_SB__) || \ - defined(_i960_JF__) || defined(_i960_MC__) || defined(_i960_CC__) -#define I960_HAS_FPU 1 -#else -#define I960_HAS_FPU 0 -#endif - -/* - * Some of the CPU models may have better performance with - * alignment of 8 or 16 but we don't know what model we are - * being compiled for based solely on the information provided - * when multilibbing. - */ - -#define I960_CPU_ALIGNMENT 4 - -/* - * This is not the perfect CPU model name but it is adequate and - * reflects what we know from multilib. - */ - -#if I960_HAS_FPU -#define CPU_MODEL_NAME "w/FPU" -#else -#define CPU_MODEL_NAME "w/soft-float" -#endif -#ifndef ASM - - -/* - * Miscellaneous Support Routines - */ - -#define i960_reload_ctl_group( group ) \ - { register int _cmd = ((group)|0x400) ; \ - asm volatile( "sysctl %0,%0,%0" : "=d" (_cmd) : "0" (_cmd) ); \ - } - -#define i960_atomic_modify( mask, addr, prev ) \ - { register unsigned int _mask = (mask); \ - register unsigned int *_addr = (unsigned int *)(addr); \ - asm volatile( "atmod %0,%1,%1" \ - : "=d" (_addr), "=d" (_mask) \ - : "0" (_addr), "1" (_mask) ); \ - (prev) = _mask; \ - } - -#define atomic_modify( _mask, _address, _previous ) \ - i960_atomic_modify( _mask, _address, _previous ) - -#define i960_enable_tracing() \ - { register unsigned int _pc = 0x1; \ - asm volatile( "modpc 0,%0,%0" : "=d" (_pc) : "0" (_pc) ); \ - } - -/* - * Interrupt Level Routines - */ - -#define i960_disable_interrupts( oldlevel ) \ - { (oldlevel) = 0x1f0000; \ - asm volatile ( "modpc 0,%1,%1" \ - : "=d" ((oldlevel)) \ - : "0" ((oldlevel)) ); \ - } - -#define i960_enable_interrupts( oldlevel ) \ - { unsigned int _mask = 0x1f0000; \ - asm volatile ( "modpc 0,%0,%1" \ - : "=d" (_mask), "=d" ((oldlevel)) \ - : "0" (_mask), "1" ((oldlevel)) ); \ - } - -#define i960_flash_interrupts( oldlevel ) \ - { unsigned int _mask = 0x1f0000; \ - asm volatile ( "modpc 0,%0,%1 ; \ - mov %0,%1 ; \ - modpc 0,%0,%1" \ - : "=d" (_mask), "=d" ((oldlevel)) \ - : "0" (_mask), "1" ((oldlevel)) ); \ - } - -#define i960_get_interrupt_level( _level ) \ - { \ - i960_disable_interrupts( _level ); \ - i960_enable_interrupts( _level ); \ - (_level) = ((_level) & 0x1f0000) >> 16; \ - } while ( 0 ) - -#define i960_cause_intr( intr ) \ - { register int _intr = (intr); \ - asm volatile( "sysctl %0,%0,%0" : "=d" (_intr) : "0" (_intr) ); \ - } - -/* - * Interrupt Masking Routines - */ - -static inline unsigned int i960_get_fp() -{ register unsigned int _fp=0; - asm volatile( "mov fp,%0" : "=d" (_fp) : "0" (_fp) ); - return ( _fp ); -} - -/* - * The following routine swaps the endian format of an unsigned int. - * It must be static because it is referenced indirectly. - * - * This version is based on code presented in Vol. 4, No. 4 of - * Insight 960. It is certainly something you wouldn't think - * of on your own. - */ - -static inline unsigned int CPU_swap_u32( - unsigned int value -) -{ - register unsigned int to_swap = value; - register unsigned int temp = 0xFF00FF00; - register unsigned int swapped = 0; - - /* to_swap swapped */ - asm volatile ( "rotate 16,%0,%2 ;" /* 0x12345678 0x56781234 */ - "modify %1,%0,%2 ;" /* 0x12345678 0x12785634 */ - "rotate 8,%2,%2" /* 0x12345678 0x78563412 */ - : "=r" (to_swap), "=r" (temp), "=r" (swapped) - : "0" (to_swap), "1" (temp), "2" (swapped) - ); - return( swapped ); -} - -#define CPU_swap_u16( value ) \ - (((value&0xff) << 8) | ((value >> 8)&0xff)) - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif -/* end of include file */ diff --git a/cpukit/score/cpu/i960/rtems/score/types.h b/cpukit/score/cpu/i960/rtems/score/types.h deleted file mode 100644 index 02faa85604..0000000000 --- a/cpukit/score/cpu/i960/rtems/score/types.h +++ /dev/null @@ -1,57 +0,0 @@ -/* i960types.h - * - * This include file contains type definitions pertaining to the Intel - * i960 processor family. - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - -#ifndef __i960_TYPES_h -#define __i960_TYPES_h - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * This section defines the basic types for this processor. - */ - -typedef unsigned char unsigned8; /* unsigned 8-bit integer */ -typedef unsigned short unsigned16; /* unsigned 16-bit integer */ -typedef unsigned int unsigned32; /* unsigned 32-bit integer */ -typedef unsigned long long unsigned64; /* unsigned 64-bit integer */ - -typedef unsigned32 Priority_Bit_map_control; - -typedef signed char signed8; /* 8-bit signed integer */ -typedef signed short signed16; /* 16-bit signed integer */ -typedef signed int signed32; /* 32-bit signed integer */ -typedef signed long long signed64; /* 64 bit signed integer */ - -typedef unsigned32 boolean; /* Boolean value */ - -typedef float single_precision; /* single precision float */ -typedef double double_precision; /* double precision float */ - -typedef void i960_isr; - -typedef void ( *i960_isr_entry )( void ); - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif -/* end of include file */ -- cgit v1.2.3