From 9c2cb68481635fa72b7c08644df70b3df037f430 Mon Sep 17 00:00:00 2001 From: Kinsey Moore Date: Wed, 11 Aug 2021 16:27:32 -0500 Subject: cpukit/aarch64: Use correct interrupt level types All other architectures use uint32_t for interrupt levels and there is no reason not to do so on AArch64. --- cpukit/score/cpu/aarch64/cpu.c | 4 ++-- cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cpukit/score/cpu/aarch64/cpu.c b/cpukit/score/cpu/aarch64/cpu.c index d09403a349..b36f55ae17 100644 --- a/cpukit/score/cpu/aarch64/cpu.c +++ b/cpukit/score/cpu/aarch64/cpu.c @@ -146,7 +146,7 @@ void _CPU_Context_Initialize( } } -void _CPU_ISR_Set_level( uint64_t level ) +void _CPU_ISR_Set_level( uint32_t level ) { /* Set the mask bit if interrupts are disabled */ level = level ? AARCH64_PSTATE_I : 0; @@ -156,7 +156,7 @@ void _CPU_ISR_Set_level( uint64_t level ) ); } -uint64_t _CPU_ISR_Get_level( void ) +uint32_t _CPU_ISR_Get_level( void ) { uint64_t level; diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h index 82f74193a2..ae7e2bdcba 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h @@ -204,9 +204,9 @@ static inline void _AARCH64_Instruction_synchronization_barrier( void ) __asm__ volatile ( "isb" : : : "memory" ); } -void _CPU_ISR_Set_level( uint64_t level ); +void _CPU_ISR_Set_level( uint32_t level ); -uint64_t _CPU_ISR_Get_level( void ); +uint32_t _CPU_ISR_Get_level( void ); #if defined(AARCH64_DISABLE_INLINE_ISR_DISABLE_ENABLE) uint64_t AArch64_interrupt_disable( void ); -- cgit v1.2.3