From 9647f7feac36cc41c25b852eb8ecdd728b5486d1 Mon Sep 17 00:00:00 2001 From: Thomas Doerfler Date: Fri, 27 Feb 2009 11:26:44 +0000 Subject: * README: Added NCS. * Makefile.am, configure.ac, preinstall.am: Added BSP variants. * console/console-config.c, clock/clock-config.c, ssp/ssp.c: Fixed register settings. Cleanup. * include/bsp.h: Added network defines and functions. * include/lpc24xx.h: Added AHB and EMC defines. Fixed Ethernet status sizes. * include/system-clocks.h, misc/system-clocks.c: Added micro seconds delay function that uses Timer 1. Changed PLL setup. * network/network.c, startup/bspreset.c, startup/linkcmds.lpc2478, startup/linkcmds.lpc2478_ncs, startup/linkcmds.lpc2478_ncs_ram: New files. * startup/bspstart.c: Added EMC initialization. Changes for ROM boot. --- ChangeLog | 5 + aclocal/bsp-alias.m4 | 2 + aclocal/check-bsps.m4 | 2 +- c/src/lib/libbsp/arm/ChangeLog | 6 + c/src/lib/libbsp/arm/lpc24xx/ChangeLog | 16 ++ c/src/lib/libbsp/arm/lpc24xx/Makefile.am | 33 ++- c/src/lib/libbsp/arm/lpc24xx/README | 32 +++ c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c | 5 +- c/src/lib/libbsp/arm/lpc24xx/configure.ac | 31 ++- .../libbsp/arm/lpc24xx/console/console-config.c | 5 +- c/src/lib/libbsp/arm/lpc24xx/include/bsp.h | 13 + c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h | 91 ++++++- .../lib/libbsp/arm/lpc24xx/include/system-clocks.h | 2 + c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c | 46 +++- c/src/lib/libbsp/arm/lpc24xx/preinstall.am | 30 ++- c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c | 6 +- c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c | 283 ++++++++++++++++++++- c/src/lib/libbsp/arm/shared/include/start.h | 5 + c/src/lib/libbsp/arm/shared/start/start.S | 111 ++++---- c/src/lib/libbsp/shared/ChangeLog | 5 + c/src/lib/libbsp/shared/include/irq-generic.h | 4 +- c/src/lib/libbsp/shared/include/utility.h | 3 + make/custom/lpc2478.cfg | 23 +- 23 files changed, 635 insertions(+), 124 deletions(-) diff --git a/ChangeLog b/ChangeLog index be8d256be6..7150cde293 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2009-02-27 Sebastian Huber + + * aclocal/bsp-alias.m4, aclocal/check-bsps.m4: Added defines for + LPC2478 BSP variants. + 2009-02-19 Joel Sherrill * aclocal/bsp-alias.m4: Add simsh2e. diff --git a/aclocal/bsp-alias.m4 b/aclocal/bsp-alias.m4 index afebd0110b..10585e95a2 100644 --- a/aclocal/bsp-alias.m4 +++ b/aclocal/bsp-alias.m4 @@ -38,6 +38,8 @@ AC_DEFUN([_RTEMS_BSP_ALIAS], mpc8313erdb) $2=gen83xx ;; # MPC83XX based board rtl22xx_t) $2=rtl22xx ;; # rtl22xx bsp in thumb mode lpc2478) $2=lpc24xx ;; # LPC2478 (QVGA Base Board from Embedded Artists) + lpc2478_ncs) $2=lpc24xx ;; # LPC2478 (NCS) + lpc2478_ncs_ram) $2=lpc24xx ;; # LPC2478 (NCS, code and data in external RAM) simcpu32) $2=sim68000 ;; # BSVC CPU32 variant simsh1) $2=shsim ;; # SH1 simulator in GDB simsh2) $2=shsim ;; # SH2 simulator in GDB diff --git a/aclocal/check-bsps.m4 b/aclocal/check-bsps.m4 index 894bf39a1a..925609d19c 100644 --- a/aclocal/check-bsps.m4 +++ b/aclocal/check-bsps.m4 @@ -35,7 +35,7 @@ AC_MSG_CHECKING([for available BSPs]) pc386) bsps="pc386 pc386dx pc486 pc586 pc686";; erc32) bsps="erc32 sis";; rtl22xx) bsps="rtl22xx rtl22xx_t";; - lpc24xx) bsps="lpc2478";; + lpc24xx) bsps="lpc2478 lpc2478_ncs lpc2478_ncs_ram";; sim68000) bsps="sim68000 simcpu32";; shsim) bsps="simsh1 simsh2 simsh4";; m32cbsp) bsps="m32csim";; diff --git a/c/src/lib/libbsp/arm/ChangeLog b/c/src/lib/libbsp/arm/ChangeLog index 9aa96d3892..afc0a624f7 100644 --- a/c/src/lib/libbsp/arm/ChangeLog +++ b/c/src/lib/libbsp/arm/ChangeLog @@ -1,3 +1,9 @@ +2009-02-27 Sebastian Huber + + * shared/startup/linkcmds.rom: New file + * shared/include/start.h: Added declaration of start(). + * shared/start/start.S: Fixed vector table for ROM boot. + 2008-09-23 Joel Sherrill * acinclude.m4: New BSP -- lpc24xx. diff --git a/c/src/lib/libbsp/arm/lpc24xx/ChangeLog b/c/src/lib/libbsp/arm/lpc24xx/ChangeLog index 6434881212..25fc4834a4 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/ChangeLog +++ b/c/src/lib/libbsp/arm/lpc24xx/ChangeLog @@ -1,3 +1,19 @@ +2009-02-27 Sebastian Huber + + * README: Added NCS. + * Makefile.am, configure.ac, preinstall.am: Added BSP variants. + * console/console-config.c, clock/clock-config.c, ssp/ssp.c: Fixed + register settings. Cleanup. + * include/bsp.h: Added network defines and functions. + * include/lpc24xx.h: Added AHB and EMC defines. Fixed Ethernet status + sizes. + * include/system-clocks.h, misc/system-clocks.c: Added micro seconds + delay function that uses Timer 1. Changed PLL setup. + * network/network.c, startup/bspreset.c, startup/linkcmds.lpc2478, + startup/linkcmds.lpc2478_ncs, startup/linkcmds.lpc2478_ncs_ram: New + files. + * startup/bspstart.c: Added EMC initialization. Changes for ROM boot. + 2009-02-17 Ralf Corsépius * Makefile.am: Fix breakage introduced in 2009-02-13 changes. diff --git a/c/src/lib/libbsp/arm/lpc24xx/Makefile.am b/c/src/lib/libbsp/arm/lpc24xx/Makefile.am index c15e602995..0c3e6e0ee4 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/Makefile.am +++ b/c/src/lib/libbsp/arm/lpc24xx/Makefile.am @@ -21,14 +21,15 @@ dist_project_lib_DATA = bsp_specs include_HEADERS = include/bsp.h -nodist_include_HEADERS = include/bspopts.h +nodist_include_HEADERS = ../../shared/include/coverhd.h \ + include/bspopts.h nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h -nodist_include_HEADERS += ../../shared/include/coverhd.h include_bsp_HEADERS = include_bsp_HEADERS += ../../shared/include/utility.h include_bsp_HEADERS += ../../shared/include/irq-generic.h +include_bsp_HEADERS += ../../shared/include/irq-info.h include_bsp_HEADERS += ../../shared/tod.h include_bsp_HEADERS += ../shared/include/linker-symbols.h include_bsp_HEADERS += ../shared/include/start.h @@ -38,6 +39,7 @@ include_bsp_HEADERS += include/lpc24xx.h include_bsp_HEADERS += include/system-clocks.h include_bsp_HEADERS += include/ssp.h include_bsp_HEADERS += include/dma.h + include_HEADERS += ../../shared/include/tm27.h ############################################################################### @@ -51,7 +53,10 @@ libbspstart_a_SOURCES = ../shared/start/start.S project_lib_DATA = start.$(OBJEXT) dist_project_lib_DATA += ../shared/startup/linkcmds.base \ - startup/linkcmds + ../shared/startup/linkcmds.rom \ + startup/linkcmds.lpc2478 \ + startup/linkcmds.lpc2478_ncs \ + startup/linkcmds.lpc2478_ncs_ram ############################################################################### # LibBSP # @@ -64,7 +69,6 @@ libbsp_a_SOURCES = # Shared libbsp_a_SOURCES += ../../shared/bootcard.c \ ../../shared/bspclean.c \ - ../../shared/bspreset.c \ ../../shared/bspgetworkarea.c \ ../../shared/bsplibc.c \ ../../shared/bsppost.c \ @@ -75,11 +79,14 @@ libbsp_a_SOURCES += ../../shared/bootcard.c \ ../shared/abort/simple_abort.c # Startup -libbsp_a_SOURCES += startup/bspstart.c +libbsp_a_SOURCES += startup/bspstart.c \ + startup/bspreset.c # IRQ libbsp_a_SOURCES += ../../shared/src/irq-generic.c \ ../../shared/src/irq-legacy.c \ + ../../shared/src/irq-info.c \ + ../../shared/src/irq-shell.c \ ../shared/irq/irq_asm.S \ irq/irq.c @@ -104,6 +111,22 @@ libbsp_a_SOURCES += misc/system-clocks.c \ # SSP libbsp_a_SOURCES += ssp/ssp.c +############################################################################### +# Network # +############################################################################### + +if HAS_NETWORKING + +noinst_PROGRAMS = network.rel + +network_rel_SOURCES = network/network.c +network_rel_CPPFLAGS = $(AM_CPPFLAGS) -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE +network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) + +libbsp_a_LIBADD = network.rel + +endif + ############################################################################### # Special Rules # ############################################################################### diff --git a/c/src/lib/libbsp/arm/lpc24xx/README b/c/src/lib/libbsp/arm/lpc24xx/README index 1f58b9dfd4..6a98e5996f 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/README +++ b/c/src/lib/libbsp/arm/lpc24xx/README @@ -7,7 +7,39 @@ Development Board: QVGA Base Board from Embedded Artists http://www.embeddedartists.com/products/uclinux/oem_lpc2478.php Drivers: + o Console o Clock o RTC o SSP (SPI mode): This driver is in active development. Use with care. + o Network + +Howto setup QVGA Base Board? + + o Unpack board. + o Connect board via USB to your PC. + o Verify that demo application runs. + o Disconnect board. + o Change jumpers to enable ISP. + o Connect board. + o Load U-Boot image 'u-boot_v1.1.6_lpc2468oem_v1_8_16bit.hex' + (available from the EA support page) into the flash (flash tool + FlashMagic is availabe from NXP). + o Change jumbers back to disable ISP. + o Use a terminal program to change the U-Boot settings via the console. + o U-Boot settings: + set ethaddr '00:1a:f1:X:X:X' + set serverip 'X.X.X.X' + set ipaddr 'X.X.X.X' + set rtems 'tftp a1000000 lpc2478.img;bootm' + set bootcmd 'echo Booting RTEMS ...;run rtems' + saveenv + +Application Board: NCS (Nurse Control Station) + + Board: NextGenNCS + Processor: NXP LPC2478 + SDRAM: 8MByte, 16 bit wide + Ext. Flash: 1MByte, 16 bit wide + Console: UART, 115200 Baud + Network: 100Base-T diff --git a/c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c b/c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c index d233cc2b0c..26ac30d72c 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c +++ b/c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c @@ -57,7 +57,8 @@ static void lpc24xx_clock_initialize( void) /* Set timer pclk to cclk */ rtems_interrupt_disable( level); - SET_PCLKSEL0_PCLK_TIMER0( PCLKSEL0, 1); + PCONP = SET_FLAGS( PCONP, 0x02); + PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x04); rtems_interrupt_enable( level); /* Reset timer */ @@ -106,7 +107,7 @@ static void lpc24xx_clock_cleanup( void) static uint32_t lpc24xx_clock_nanoseconds_since_last_tick( void) { - uint64_t clock = lpc24xx_cclk(); + uint64_t clock = LPC24XX_CCLK; uint32_t clicks = T0TC; uint64_t ns = ((uint64_t) clicks * 1000000000) / clock; diff --git a/c/src/lib/libbsp/arm/lpc24xx/configure.ac b/c/src/lib/libbsp/arm/lpc24xx/configure.ac index 12beb0156d..1020a6c79b 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/configure.ac +++ b/c/src/lib/libbsp/arm/lpc24xx/configure.ac @@ -23,15 +23,28 @@ RTEMS_PROG_CCAS RTEMS_CHECK_NETWORKING AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") -RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[lpc2478], -[12000000U]) -RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN], -[Main oscillator frequency in Hz]) - -RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[lpc2478], -[32768]) -RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC], -[RTC oscillator frequency in Hz]) +RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U]) +RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[Main oscillator frequency in Hz]) + +RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768]) +RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz]) + +RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000]) +RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz]) + +RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200]) +RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[Baud for UARTs]) + +RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478],[1]) +RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478_ncs_ram],[1]) +RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[Enable U-Boot startup]) + +RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs],[1]) +RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs_ram],[1]) +RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[Enable RMII for Ethernet]) + +RTEMS_BSPOPTS_SET([LPC24XX_EMC_MICRON],[lpc2478_ncs],[1]) +RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[Enable RMII for Ethernet]) BSP_BOOTCARD_OPTIONS diff --git a/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c b/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c index 53be3eeb2b..0c298421da 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c +++ b/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c @@ -21,6 +21,7 @@ #include #include +#include #include #include @@ -55,7 +56,7 @@ console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = { .pDeviceFlow = NULL, .ulMargin = 16, .ulHysteresis = 8, - .pDeviceParams = (void *) 38400, + .pDeviceParams = (void *) LPC24XX_UART_BAUD, .ulCtrlPort1 = UART0_BASE_ADDR, .ulCtrlPort2 = 0, .ulDataPort = UART0_BASE_ADDR, @@ -63,7 +64,7 @@ console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = { .setRegister = lpc24xx_uart_set_register, .getData = NULL, .setData = NULL, - .ulClock = 57600000, + .ulClock = LPC24XX_CCLK, .ulIntVector = LPC24XX_IRQ_UART_0 } }; diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h index 6a1410ee31..942bfd7ea2 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h +++ b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h @@ -35,6 +35,19 @@ extern "C" { #ifndef ASM +/* Network driver configuration */ + +struct rtems_bsdnet_ifconfig; + +int lpc24xx_eth_attach_detach( + struct rtems_bsdnet_ifconfig *config, + int attaching +); + +#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc24xx_eth_attach_detach + +#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" + #endif /* ASM */ #ifdef __cplusplus diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h b/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h index 4719d30c3e..bb538cb487 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h +++ b/c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h @@ -1854,14 +1854,13 @@ typedef struct { typedef struct { uint32_t status; uint32_t hash_crc; -} lpc24xx_eth_transfer_status; +} lpc24xx_eth_receive_info; #define ETH_TRANSFER_DESCRIPTOR_SIZE 8 -#define ETH_TRANSFER_STATUS_SIZE 8 +#define ETH_RECEIVE_INFO_SIZE 8 -#define ETH_TRANSFER_CTRL_SIZE \ - (ETH_TRANSFER_DESCRIPTOR_SIZE + ETH_TRANSFER_STATUS_SIZE) +#define ETH_TRANSMIT_STATUS_SIZE 4 /* ETH_RX_CTRL */ @@ -2023,4 +2022,88 @@ typedef struct { #define ETH_CMD_FULL_DUPLEX 0x00000400U +/* AHBCFG */ + +#define AHBCFG_SCHEDULER_UNIFORM 0x00000001U + +#define AHBCFG_BREAK_BURST_MASK 0x00000006U + +#define GET_AHBCFG_BREAK_BURST( reg) \ + GET_FIELD( reg, AHBCFG_BREAK_BURST_MASK, 1) + +#define SET_AHBCFG_BREAK_BURST( reg, val) \ + SET_FIELD( reg, val, AHBCFG_BREAK_BURST_MASK, 1) + +#define AHBCFG_QUANTUM_BUS_CYCLE 0x00000008U + +#define AHBCFG_QUANTUM_SIZE_MASK 0x000000f0U + +#define GET_AHBCFG_QUANTUM_SIZE( reg) \ + GET_FIELD( reg, AHBCFG_QUANTUM_SIZE_MASK, 4) + +#define SET_AHBCFG_QUANTUM_SIZE( reg, val) \ + SET_FIELD( reg, val, AHBCFG_QUANTUM_SIZE_MASK, 4) + +#define AHBCFG_DEFAULT_MASTER_MASK 0x00000700U + +#define GET_AHBCFG_DEFAULT_MASTER( reg) \ + GET_FIELD( reg, AHBCFG_DEFAULT_MASTER_MASK, 8) + +#define SET_AHBCFG_DEFAULT_MASTER( reg, val) \ + SET_FIELD( reg, val, AHBCFG_DEFAULT_MASTER_MASK, 8) + +#define AHBCFG_EP1_MASK 0x00007000U + +#define GET_AHBCFG_EP1( reg) \ + GET_FIELD( reg, AHBCFG_EP1_MASK, 12) + +#define SET_AHBCFG_EP1( reg, val) \ + SET_FIELD( reg, val, AHBCFG_EP1_MASK, 12) + +#define AHBCFG_EP2_MASK 0x00070000U + +#define GET_AHBCFG_EP2( reg) \ + GET_FIELD( reg, AHBCFG_EP2_MASK, 16) + +#define SET_AHBCFG_EP2( reg, val) \ + SET_FIELD( reg, val, AHBCFG_EP2_MASK, 16) + +#define AHBCFG_EP3_MASK 0x00700000U + +#define GET_AHBCFG_EP3( reg) \ + GET_FIELD( reg, AHBCFG_EP3_MASK, 20) + +#define SET_AHBCFG_EP3( reg, val) \ + SET_FIELD( reg, val, AHBCFG_EP3_MASK, 20) + +#define AHBCFG_EP4_MASK 0x07000000U + +#define GET_AHBCFG_EP4( reg) \ + GET_FIELD( reg, AHBCFG_EP4_MASK, 24) + +#define SET_AHBCFG_EP4( reg, val) \ + SET_FIELD( reg, val, AHBCFG_EP4_MASK, 24) + +#define AHBCFG_EP5_MASK 0x70000000U + +#define GET_AHBCFG_EP5( reg) \ + GET_FIELD( reg, AHBCFG_EP5_MASK, 28) + +#define SET_AHBCFG_EP5( reg, val) \ + SET_FIELD( reg, val, AHBCFG_EP5_MASK, 28) + +/* EMC */ + +#define EMC_DYN_CTRL_CE 0x00000001U + +#define EMC_DYN_CTRL_CS 0x00000002U + +#define EMC_DYN_CTRL_CMD_NORMAL 0x00000000U + +#define EMC_DYN_CTRL_CMD_MODE 0x00000080U + +#define EMC_DYN_CTRL_CMD_PALL 0x00000100U + +#define EMC_DYN_CTRL_CMD_NOP 0x00000180U + #endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h b/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h index 6bd8690ad6..ea2fa46699 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h +++ b/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h @@ -25,6 +25,8 @@ extern "C" { #endif /* __cplusplus */ +void lpc24xx_micro_seconds_delay( unsigned us); + unsigned lpc24xx_cclk( void); void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, unsigned cclksel); diff --git a/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c b/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c index 8ff367c27e..6de7dd7d8d 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c +++ b/c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c @@ -28,16 +28,49 @@ */ #define LPC24XX_OSCILLATOR_INTERNAL 4000000U -#if !defined(LPC24XX_OSCILLATOR_MAIN) -#error unknown main oscillator frequency +#ifndef LPC24XX_OSCILLATOR_MAIN + #error "unknown main oscillator frequency" #endif -#if !defined(LPC24XX_OSCILLATOR_RTC) -#error unknown rtc oscillator frequency +#ifndef LPC24XX_OSCILLATOR_RTC + #error "unknown RTC oscillator frequency" #endif +/** + * @brief Delay for @a us micro seconds. + * + * @note Uses Timer 1. + */ +void lpc24xx_micro_seconds_delay( unsigned us) +{ + /* Stop and reset timer */ + T1TCR = 0x02; + + /* Set prescaler to zero */ + T1PR = 0x00; + + /* Set match value */ + T1MR0 = (uint32_t) ((uint64_t) 4000000 * (uint64_t) us / (uint64_t) lpc24xx_cclk()) + 1; + + /* Reset all interrupt flags */ + T1IR = 0xff; + + /* Stop timer on match */ + T1MCR = 0x04; + + /* Start timer */ + T1TCR = 0x01; + + /* Wait until delay time has elapsed */ + while ((T1TCR & 0x01) != 0) { + /* Wait */ + } +} + /** * @brief Returns the CPU clock frequency in [Hz]. + * + * Return zero in case of an unexpected PLL input frequency. */ unsigned lpc24xx_cclk( void) { @@ -58,9 +91,6 @@ unsigned lpc24xx_cclk( void) pllinclk = LPC24XX_OSCILLATOR_RTC; break; default: - while (1) { - /* Spin forever */ - } return 0; } @@ -116,7 +146,7 @@ void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, unsigned cc } /* Set CPU clock divider to a reasonable save value */ - CCLKCFG = SET_CCLKCFG_CCLKSEL( 0, 1); + CCLKCFG = 0; /* Disable PLL if necessary */ if (pll_enabled) { diff --git a/c/src/lib/libbsp/arm/lpc24xx/preinstall.am b/c/src/lib/libbsp/arm/lpc24xx/preinstall.am index 72fd499888..8cacac4686 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/preinstall.am +++ b/c/src/lib/libbsp/arm/lpc24xx/preinstall.am @@ -41,6 +41,10 @@ $(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h +$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h + $(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h @@ -49,10 +53,6 @@ $(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INC $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h -$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h - $(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h @@ -61,6 +61,10 @@ $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJE $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h +$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h + $(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h @@ -109,7 +113,19 @@ $(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(d $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base -$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds -PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds +$(PROJECT_LIB)/linkcmds.rom: ../shared/startup/linkcmds.rom $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.rom +PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.rom + +$(PROJECT_LIB)/linkcmds.lpc2478: startup/linkcmds.lpc2478 $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.lpc2478 +PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.lpc2478 + +$(PROJECT_LIB)/linkcmds.lpc2478_ncs: startup/linkcmds.lpc2478_ncs $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.lpc2478_ncs +PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.lpc2478_ncs + +$(PROJECT_LIB)/linkcmds.lpc2478_ncs_ram: startup/linkcmds.lpc2478_ncs_ram $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.lpc2478_ncs_ram +PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.lpc2478_ncs_ram diff --git a/c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c b/c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c index f78f176c61..e2f4e4ed12 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c +++ b/c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c @@ -217,14 +217,14 @@ static rtems_status_code lpc24xx_ssp_init( rtems_libi2c_bus_t *bus) switch ((uintptr_t) regs) { case SSP0_BASE_ADDR: rtems_interrupt_disable( level); - SET_PCLKSEL1_PCLK_SSP0( PCLKSEL1, 1); + PCLKSEL1 = SET_PCLKSEL1_PCLK_SSP0( PCLKSEL1, 1); rtems_interrupt_enable( level); vector = LPC24XX_IRQ_SPI_SSP_0; break; case SSP1_BASE_ADDR: rtems_interrupt_disable( level); - SET_PCLKSEL0_PCLK_SSP1( PCLKSEL0, 1); + PCLKSEL0 = SET_PCLKSEL0_PCLK_SSP1( PCLKSEL0, 1); rtems_interrupt_enable( level); vector = LPC24XX_IRQ_SSP_1; @@ -402,7 +402,7 @@ static int lpc24xx_ssp_read_write( } /* Disable DMA on SSP */ - regs->dmacr = SSP_DMACR_RXDMAE | SSP_DMACR_TXDMAE; + regs->dmacr = 0; if (in == NULL) { dr = 0; diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c index 893ea589e5..50483d49d9 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c @@ -29,27 +29,290 @@ #include #include -void bsp_start_hook_0( void) +static void lpc24xx_fatal_error( void) { - /* Re-map interrupt vectors to internal RAM */ - SET_MEMMAP_MAP( MEMMAP, 2); + while (true) { + /* Spin forever */ + } +} + +static void lpc24xx_ram_test_32( void) +{ + volatile unsigned *out = (volatile unsigned *) bsp_ram_ext_start; + + while (out < (volatile unsigned *) bsp_ram_ext_end) { + *out = (unsigned) out; + ++out; + } + + out = (volatile unsigned *) bsp_ram_ext_start; + while (out < (volatile unsigned *) bsp_ram_ext_end) { + if (*out != (unsigned) out) { + lpc24xx_fatal_error(); + } + ++out; + } } -void bsp_start_hook_1( void) +/** + * @brief EMC initialization. + * + * Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT + */ +static void lpc24xx_init_emc( void) +{ + #ifdef LPC24XX_EMC_MICRON + int i = 0; + uint32_t mode = 0; + + /* Enable power */ + PCONP = SET_FLAGS( PCONP, 0x0800); + + /* Set PIN selects */ + PINSEL5 = SET_FLAGS( PINSEL5, 0x05050555); + PINSEL6 = SET_FLAGS( PINSEL6, 0x55555555); + PINSEL8 = SET_FLAGS( PINSEL8, 0x55555555); + PINSEL9 = SET_FLAGS( PINSEL9, 0x50555555); + + /* Enable module, normal memory map and normal power mode */ + EMC_CTRL = 1; + + /* Use little-endian mode and 1:1 clock ratio */ + EMC_CONFIG = 0; + + /* Global dynamic settings */ + + /* FIXME */ + EMC_DYN_APR = 2; + + /* Data-in to active command period tWR + tRP */ + EMC_DYN_DAL = 4; + + /* Load mode register to active or refresh command period 2 tCK */ + EMC_DYN_MRD = 1; + + /* Active to precharge command period 44 ns */ + EMC_DYN_RAS = 3; + + /* Active to active command period 66 ns */ + EMC_DYN_RC = 4; + + /* Use command delayed strategy */ + EMC_DYN_RD_CFG = 1; + + /* Auto refresh period 66 ns */ + EMC_DYN_RFC = 4; + + /* Precharge command period 20 ns */ + EMC_DYN_RP = 1; + + /* Active bank a to active bank b command period 15 ns */ + EMC_DYN_RRD = 1; + + /* FIXME */ + EMC_DYN_SREX = 5; + + /* Write recovery time 15 ns */ + EMC_DYN_WR = 1; + + /* Exit self refresh to active command period 75 ns */ + EMC_DYN_XSR = 5; + + /* Dynamic Memory 0 settings */ + + /* + * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected writes + */ + EMC_DYN_CFG0 = 0x0280; + + /* CAS and RAS latency */ + EMC_DYN_RASCAS0 = 0x0202; + + /* Wait 50 micro seconds */ + lpc24xx_micro_seconds_delay( 50); + + /* Send command: NOP */ + EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_NOP; + + /* Wait 50 micro seconds */ + lpc24xx_micro_seconds_delay( 50); + + /* Send command: PRECHARGE ALL */ + EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_PALL; + + /* Shortest possible refresh period */ + EMC_DYN_RFSH = 0x01; + + /* Wait at least 128 ABH clock cycles */ + for (i = 0; i < 128; ++i) { + asm volatile (" nop"); + } + + /* Wait 1 micro second */ + lpc24xx_micro_seconds_delay( 1); + + /* Set refresh period */ + EMC_DYN_RFSH = 0x46; + + /* Send command: MODE */ + EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_MODE; + + /* Set mode registerin SDRAM */ + mode = *((volatile uint32_t *) (0xa0000000 | (0x23 << (1 + 2 + 8)))); + + /* Send command: NORMAL */ + EMC_DYN_CTRL = 0; + + /* Enable buffer */ + EMC_DYN_CFG0 |= 0x00080000; + + /* Static Memory 0 settings */ + EMC_STA_WAITWEN0 = 0x02; + EMC_STA_WAITOEN0 = 0x02; + EMC_STA_WAITRD0 = 0x1f; + EMC_STA_WAITPAGE0 = 0x1f; + EMC_STA_WAITWR0 = 0x1f; + EMC_STA_WAITTURN0 = 0x0f; + EMC_STA_CFG0 = 0x81; + + /* Static Memory 1 settings */ + EMC_STA_WAITWEN1 = 0x02; + EMC_STA_WAITOEN1 = 0x02; + EMC_STA_WAITRD1 = 0x08; + EMC_STA_WAITPAGE1 = 0x1f; + EMC_STA_WAITWR1 = 0x08; + EMC_STA_WAITTURN1 = 0x0f; + EMC_STA_CFG1 = 0x80; + + /* RAM test */ + lpc24xx_ram_test_32(); + #endif /* LPC24XX_EMC_MICRON */ +} + +static void lpc24xx_init_pll( void) +{ + #ifndef LPC24XX_HAS_UBOOT + /* Enable main oscillator */ + SCS = SET_FLAGS( SCS, 0x20); + while (IS_FLAG_CLEARED( SCS, 0x40)) { + /* Wait */ + } + + /* Set PLL */ + lpc24xx_set_pll( 1, 0, 11, 3); + #endif /* LPC24XX_HAS_UBOOT */ +} + +void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_0( void) +{ + /* Initialize PLL */ + lpc24xx_init_pll(); + + #ifndef LPC24XX_HAS_UBOOT + /* Set pin functions */ + PINSEL0 = 0; + PINSEL1 = 0; + PINSEL2 = 0; + PINSEL3 = 0; + PINSEL4 = 0; + PINSEL5 = 0; + PINSEL6 = 0; + PINSEL7 = 0; + PINSEL8 = 0; + PINSEL9 = 0; + PINSEL10 = 0; + + /* Set periperal clocks */ + PCLKSEL0 = 0; + PCLKSEL1 = 0; + + /* Disable power for all modules */ + PCONP = 0; + + /* Set memory accelerator module (MAM) */ + MAMCR = 0; + MAMTIM = 4; + + /* Set general purpose IO */ + IODIR0 = 0; + IODIR1 = 0; + IOSET0 = 0xffffffff; + IOSET1 = 0xffffffff; + + /* Set fast IO */ + FIO0DIR = 0; + FIO1DIR = 0; + FIO2DIR = 0; + FIO3DIR = 0; + FIO4DIR = 0; + FIO0SET = 0xffffffff; + FIO1SET = 0xffffffff; + FIO2SET = 0xffffffff; + FIO3SET = 0xffffffff; + FIO4SET = 0xffffffff; + + /* Initialize UART 0 */ + PCONP = SET_FLAGS( PCONP, 0x08); + PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x40); + PINSEL0 = SET_FLAGS( PINSEL0, 0x50); + U0LCR = 0; + U0IER = 0; + U0LCR = 0x80; + U0DLL = lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD; + U0DLM = 0; + U0LCR = 0x03; + U0FCR = 0x07; + + /* Initialize Timer 1 */ + PCONP = SET_FLAGS( PCONP, 0x04); + PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x10); + #endif /* LPC24XX_HAS_UBOOT */ +} + +static void lpc24xx_copy_data( void) +{ + #ifndef LPC24XX_HAS_UBOOT + unsigned *in = bsp_section_text_end; + unsigned *out = bsp_section_data_start; + + /* Copy data */ + while (out < bsp_section_data_end) { + *out = *in; + ++out; + ++in; + } + #endif /* LPC24XX_HAS_UBOOT */ +} + +static void lpc24xx_clear_bss( void) { - unsigned zero = 0; unsigned *out = bsp_section_bss_start; /* Clear BSS */ while (out < bsp_section_bss_end) { - *out = zero; + *out = 0; ++out; } } +void /* __attribute__ ((section (".entry"))) */ bsp_start_hook_1( void) +{ + /* Re-map interrupt vectors to internal RAM */ + MEMMAP = SET_MEMMAP_MAP( MEMMAP, 2); + + /* Initialize External Memory Controller (EMC) */ + lpc24xx_init_emc(); + + /* Copy data */ + lpc24xx_copy_data(); + + /* Clear BSS */ + lpc24xx_clear_bss(); +} + void bsp_start( void) { - printk( "CPU Clock: %u\n", lpc24xx_cclk()); + printk( "CPU clock (CCLK): %u\n", lpc24xx_cclk()); /* Exceptions */ rtems_exception_init_mngt(); @@ -57,10 +320,8 @@ void bsp_start( void) /* Interrupts */ if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) { /* FIXME */ - printk( "Cannot intitialize interrupt support\n"); - while (1) { - /* Spin forever */ - } + printk( "cannot intitialize interrupt support\n"); + lpc24xx_fatal_error(); } /* DMA */ diff --git a/c/src/lib/libbsp/arm/shared/include/start.h b/c/src/lib/libbsp/arm/shared/include/start.h index 1ad8f0e797..5326365ff0 100644 --- a/c/src/lib/libbsp/arm/shared/include/start.h +++ b/c/src/lib/libbsp/arm/shared/include/start.h @@ -21,6 +21,11 @@ #ifndef ASM + /** + * @brief System start entry. + */ + void start( void); + /** * @brief Start entry hook 0. * diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S index 2677222ffc..26e5c72747 100644 --- a/c/src/lib/libbsp/arm/shared/start/start.S +++ b/c/src/lib/libbsp/arm/shared/start/start.S @@ -27,14 +27,7 @@ /* Global symbols */ .globl start - -.globl Reset_Handler -.globl Undefined_Handler .globl SWI_Handler -.globl Prefetch_Handler -.globl Abort_Handler -.globl IRQ_Handler -.globl FIQ_Handler /* Program Status Register definitions */ @@ -49,9 +42,61 @@ .equ PSR_F, 0x40 .equ PSR_T, 0x20 +.section ".entry" + +/* + * This is the exception vector table and the pointers to the default + * exceptions handlers. + */ + +vector_block: + + ldr pc, handler_addr_reset + ldr pc, handler_addr_undef + ldr pc, handler_addr_swi + ldr pc, handler_addr_prefetch + ldr pc, handler_addr_abort + + /* Program signature checked by boot loader */ + .word 0xb8a06f58 + + ldr pc, handler_addr_irq + ldr pc, handler_addr_fiq + +handler_addr_reset: + + .word start + +handler_addr_undef: + + .word twiddle + +handler_addr_swi: + + .word twiddle + +handler_addr_prefetch: + + .word twiddle + +handler_addr_abort: + + .word twiddle + +handler_addr_reserved: + + .word twiddle + +handler_addr_irq: + + .word twiddle + +handler_addr_fiq: + + .word twiddle + /* Start entry */ -.section ".entry" start: /* @@ -112,7 +157,7 @@ start: * vectors and the pointers to the default exception handlers. */ - mov r0, #0 + ldr r0, =bsp_section_vector_start adr r1, vector_block ldmia r1!, {r2-r9} stmia r0!, {r2-r9} @@ -131,52 +176,8 @@ start: /* Spin forever */ -twiddle: - - b twiddle - -/* - * This is the exception vector table and the pointers to the default - * exceptions handlers. - */ - -vector_block: - - ldr pc, Reset_Handler - ldr pc, Undefined_Handler - ldr pc, SWI_Handler - ldr pc, Prefetch_Handler - ldr pc, Abort_Handler - nop - ldr pc, IRQ_Handler - ldr pc, FIQ_Handler - -Reset_Handler: - - b bsp_reset - -Undefined_Handler: - - b Undefined_Handler - SWI_Handler: - b SWI_Handler - -Prefetch_Handler: - - b Prefetch_Handler - -Abort_Handler: - - b Abort_Handler - - nop - -IRQ_Handler: - - b IRQ_Handler - -FIQ_Handler: +twiddle: - b FIQ_Handler + b twiddle diff --git a/c/src/lib/libbsp/shared/ChangeLog b/c/src/lib/libbsp/shared/ChangeLog index 5c339e069a..5edba1f3f4 100644 --- a/c/src/lib/libbsp/shared/ChangeLog +++ b/c/src/lib/libbsp/shared/ChangeLog @@ -1,3 +1,8 @@ +2009-02-27 Sebastian Huber + + * include/utility.h: Added define. + * include/irq-generic.h: Added missing prototypes. + 2009-02-11 Joel Sherrill * tod.c: Use rtems_clock_get_tod(). diff --git a/c/src/lib/libbsp/shared/include/irq-generic.h b/c/src/lib/libbsp/shared/include/irq-generic.h index 71ff88fe84..686c28fa74 100644 --- a/c/src/lib/libbsp/shared/include/irq-generic.h +++ b/c/src/lib/libbsp/shared/include/irq-generic.h @@ -146,7 +146,7 @@ static inline bool bsp_interrupt_is_valid_vector( rtems_vector_number vector) */ void bsp_interrupt_handler_default( rtems_vector_number vector); -rtems_status_code bsp_interrupt_initialize(); +rtems_status_code bsp_interrupt_initialize( void); /** * @brief BSP specific initialization. @@ -163,7 +163,7 @@ rtems_status_code bsp_interrupt_initialize(); * * @return On success RTEMS_SUCCESSFUL shall be returned. */ -rtems_status_code bsp_interrupt_facility_initialize(); +rtems_status_code bsp_interrupt_facility_initialize( void); /** * @brief Enables the interrupt vector with number @a vector. diff --git a/c/src/lib/libbsp/shared/include/utility.h b/c/src/lib/libbsp/shared/include/utility.h index 8f9d26be67..1c5f0c7894 100644 --- a/c/src/lib/libbsp/shared/include/utility.h +++ b/c/src/lib/libbsp/shared/include/utility.h @@ -41,6 +41,9 @@ extern "C" { #define ARE_FLAGS_SET( val, flags) \ (((val) & (flags)) == (flags)) +#define IS_ANY_FLAG_SET( val, flags) \ + (((val) & (flags)) != 0) + #define ARE_FLAGS_CLEARED( val, flags) \ (((val) & (flags)) == 0) diff --git a/make/custom/lpc2478.cfg b/make/custom/lpc2478.cfg index ceb6d28ede..7db495c51b 100644 --- a/make/custom/lpc2478.cfg +++ b/make/custom/lpc2478.cfg @@ -4,20 +4,13 @@ # $Id$ # -include $(RTEMS_ROOT)/make/custom/default.cfg +LPC24XX_LINKCMDS = linkcmds.lpc2478 -RTEMS_CPU = arm -RTEMS_BSP_FAMILY = lpc24xx +include $(RTEMS_ROOT)/make/custom/lpc24xx.cfg -CPU_CFLAGS = -mcpu=arm7tdmi -mstructure-size-boundary=8 -mapcs-frame - -CFLAGS_OPTIMIZE_V = -Os -g - -define bsp-post-link - $(OBJCOPY) -O binary '$@' '$(basename $@).bin' - gzip -f -9 '$(basename $@).bin' - # mkimage -A arm -O rtems -T kernel -C gzip \ - # -a a0000000 -e a0000000 -name '$(notdir $@)' \ - # -d '$(basename $@).bin.gz' '$(basename $@).img' - $(default-bsp-post-link) -endef +# define bsp-post-link +# $(OBJCOPY) -O binary '$@' '$(basename $@).bin' +# gzip -f -9 '$(basename $@).bin' +# mkimage -A arm -O rtems -T kernel -C gzip -a a0000000 -e a0000040 -name '$(notdir $@)' -d '$(basename $@).bin.gz' '$(basename $@).img' +# $(default-bsp-post-link) +# endef -- cgit v1.2.3