From 85e87f16b6d6f03d2b6287a4295283bb78037fd0 Mon Sep 17 00:00:00 2001 From: Thomas Doerfler Date: Tue, 9 Sep 2008 13:20:04 +0000 Subject: added printk support added port init, added phy support init mmu --- c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog | 12 + c/src/lib/libbsp/powerpc/tqm8xx/console/console.c | 45 ++- c/src/lib/libbsp/powerpc/tqm8xx/include/coverhd.h | 248 +----------- c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h | 204 ---------- c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S | 433 --------------------- c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c | 185 --------- .../libbsp/powerpc/tqm8xx/network/network_fec.c | 352 ++++++++++++++++- c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c | 5 +- 8 files changed, 380 insertions(+), 1104 deletions(-) delete mode 100644 c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h delete mode 100644 c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S delete mode 100644 c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog b/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog index 8bf38c2751..461e229386 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog +++ b/c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog @@ -1,3 +1,15 @@ +2008-09-09 Thomas Doerfler + + * console/console.c: added printk support + + * network/network_fec.c: added port init, added phy support + + * irq/irq_init.c, irq/irq_asm.S, irq/irq.h: remove obsolete files + + * startup/cpuinit.c, startup/bspstart.c: initialize mmu + + * include/coverhd.h: update values + 2008-09-08 Joel Sherrill * .cvsignore, include/.cvsignore: New files. diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c b/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c index 00e08e79b3..32cc0d5a21 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c +++ b/c/src/lib/libbsp/powerpc/tqm8xx/console/console.c @@ -100,6 +100,7 @@ int m8xx_clock_rate = 0; #define CONS_CHN_SCC4 3 #define CONS_CHN_SMC1 4 #define CONS_CHN_SMC2 5 +#define CONS_CHN_NONE -1 /* * possible identifiers for bspopts.h: CONS_SxCy_MODE @@ -115,12 +116,6 @@ int m8xx_clock_rate = 0; #define MAX_IDL_DEFAULT 10 #define DEVICEPREFIX "tty" -/* - * printk basic support - */ -static void _BSP_null_char( char c ) {return;} -BSP_output_char_function_type BSP_output_char = _BSP_null_char; - /* * Interrupt-driven callback */ @@ -818,11 +813,11 @@ sccInterruptWrite (int minor, const char *buf, int len) static int sccPollWrite (int minor, const char *buf, int len) { + static char txBuf[CONS_CHN_CNT][SCC_TXBD_CNT]; int chan = minor; int bd_used; - + while (len--) { - static char txBuf[CONS_CHN_CNT][SCC_TXBD_CNT]; while (sccPrepTxBd[chan]->status & M8xx_BD_READY) continue; bd_used = sccPrepTxBd[chan]-sccFrstTxBd[chan]; @@ -845,6 +840,30 @@ sccPollWrite (int minor, const char *buf, int len) return 0; } +/* + * printk basic support + */ +int BSP_output_chan = CONS_CHN_NONE; /* channel used for printk operation */ + +static void console_debug_putc_onlcr(const char c) +{ + rtems_interrupt_level irq_level; + static char cr_chr = '\r'; + + if (BSP_output_chan != CONS_CHN_NONE) { + rtems_interrupt_disable(irq_level); + + if (c == '\n') { + sccPollWrite (BSP_output_chan,&cr_chr,1); + } + sccPollWrite (BSP_output_chan,&c,1); + rtems_interrupt_enable(irq_level); + } +} + +BSP_output_char_function_type BSP_output_char = console_debug_putc_onlcr; + + /* *************** * BOILERPLATE * @@ -930,8 +949,10 @@ rtems_device_driver console_initialize(rtems_device_major_number major, rtems_fatal_error_occurred (status); } /* - * FIXME: enable printk support + * enable printk support */ + BSP_output_chan = PRINTK_CHN; + return RTEMS_SUCCESSFUL; } @@ -1028,8 +1049,6 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor, rtems_status_code rc = RTEMS_SUCCESSFUL; con360_io_trm_char_t *trm_char_info = ioa->buffer; - printf("ioctl called: maxidl=%d\n",trm_char_info->max_idl); - printf("ioctl called: char_cnt=%d\n",trm_char_info->char_cnt); /* * check, that parameter is non-NULL */ @@ -1042,7 +1061,6 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor, */ if (rc == RTEMS_SUCCESSFUL) { if (trm_char_info->max_idl >= 0x10000) { - printf("ioctl called: invalid number for maxidl\n"); rc = RTEMS_INVALID_NUMBER; } else if (trm_char_info->max_idl > 0) { @@ -1057,7 +1075,6 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor, */ if (rc == RTEMS_SUCCESSFUL) { if (trm_char_info->char_cnt > CON8XX_TRM_CHAR_CNT) { - printf("ioctl called: invalid number for char_cnt\n"); rc = RTEMS_TOO_MANY; } else if (trm_char_info->char_cnt >= 0) { @@ -1066,7 +1083,6 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor, */ if ((rc == RTEMS_SUCCESSFUL) && !m8xx_console_chan_desc[minor].is_scc) { - printf("ioctl called: not an scc:%d\n",minor); rc = RTEMS_UNSATISFIED; } else { @@ -1083,7 +1099,6 @@ static int scc_io_set_trm_char(rtems_device_minor_number minor, } } - printf("ioctl called: return code: %d\n",rc); return rc; } #endif diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/include/coverhd.h b/c/src/lib/libbsp/powerpc/tqm8xx/include/coverhd.h index 543accb2e5..5b472f05c7 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/include/coverhd.h +++ b/c/src/lib/libbsp/powerpc/tqm8xx/include/coverhd.h @@ -31,10 +31,8 @@ extern "C" { #endif -#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) ) -#if defined( INSTRUCTION_CACHE_ENABLE ) /* - * 50 MHz processor, cache enabled. + * 133 MHz processor, cache enabled. */ #define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0 #define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0 @@ -111,250 +109,6 @@ extern "C" { #define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0 #define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0 -#else -/* - * 50 MHz processor, cache disabled. - */ -#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 4 -#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 4 -#define CALLING_OVERHEAD_TASK_CREATE 7 -#define CALLING_OVERHEAD_TASK_IDENT 6 -#define CALLING_OVERHEAD_TASK_START 5 -#define CALLING_OVERHEAD_TASK_RESTART 5 -#define CALLING_OVERHEAD_TASK_DELETE 4 -#define CALLING_OVERHEAD_TASK_SUSPEND 4 -#define CALLING_OVERHEAD_TASK_RESUME 4 -#define CALLING_OVERHEAD_TASK_SET_PRIORITY 5 -#define CALLING_OVERHEAD_TASK_MODE 5 -#define CALLING_OVERHEAD_TASK_GET_NOTE 5 -#define CALLING_OVERHEAD_TASK_SET_NOTE 5 -#define CALLING_OVERHEAD_TASK_WAKE_WHEN 19 -#define CALLING_OVERHEAD_TASK_WAKE_AFTER 4 -#define CALLING_OVERHEAD_INTERRUPT_CATCH 5 -#define CALLING_OVERHEAD_CLOCK_GET 20 -#define CALLING_OVERHEAD_CLOCK_SET 19 -#define CALLING_OVERHEAD_CLOCK_TICK 3 - -#define CALLING_OVERHEAD_TIMER_CREATE 5 -#define CALLING_OVERHEAD_TIMER_IDENT 4 -#define CALLING_OVERHEAD_TIMER_DELETE 5 -#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 6 -#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 21 -#define CALLING_OVERHEAD_TIMER_RESET 4 -#define CALLING_OVERHEAD_TIMER_CANCEL 4 -#define CALLING_OVERHEAD_SEMAPHORE_CREATE 6 -#define CALLING_OVERHEAD_SEMAPHORE_IDENT 4 -#define CALLING_OVERHEAD_SEMAPHORE_DELETE 6 -#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 5 -#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 4 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 6 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 6 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 4 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 6 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 5 - -#define CALLING_OVERHEAD_EVENT_SEND 5 -#define CALLING_OVERHEAD_EVENT_RECEIVE 5 -#define CALLING_OVERHEAD_SIGNAL_CATCH 4 -#define CALLING_OVERHEAD_SIGNAL_SEND 5 -#define CALLING_OVERHEAD_PARTITION_CREATE 7 -#define CALLING_OVERHEAD_PARTITION_IDENT 6 -#define CALLING_OVERHEAD_PARTITION_DELETE 4 -#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 5 -#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 5 -#define CALLING_OVERHEAD_REGION_CREATE 7 -#define CALLING_OVERHEAD_REGION_IDENT 5 -#define CALLING_OVERHEAD_REGION_DELETE 4 -#define CALLING_OVERHEAD_REGION_GET_SEGMENT 6 -#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 5 -#define CALLING_OVERHEAD_PORT_CREATE 6 -#define CALLING_OVERHEAD_PORT_IDENT 5 -#define CALLING_OVERHEAD_PORT_DELETE 4 -#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 6 -#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 6 - -#define CALLING_OVERHEAD_IO_INITIALIZE 6 -#define CALLING_OVERHEAD_IO_OPEN 6 -#define CALLING_OVERHEAD_IO_CLOSE 6 -#define CALLING_OVERHEAD_IO_READ 6 -#define CALLING_OVERHEAD_IO_WRITE 6 -#define CALLING_OVERHEAD_IO_CONTROL 6 -#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 4 -#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 5 -#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 5 -#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 4 -#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 4 -#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 5 -#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 3 - -#endif /* defined( INSTRUCTION_CACHE_ENABLE ) */ - -#else -#if defined( INSTRUCTION_CACHE_ENABLE ) -/* - * 40 MHz processor, cache enabled. - */ -#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0 -#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 1 -#define CALLING_OVERHEAD_TASK_CREATE 1 -#define CALLING_OVERHEAD_TASK_IDENT 0 -#define CALLING_OVERHEAD_TASK_START 0 -#define CALLING_OVERHEAD_TASK_RESTART 0 -#define CALLING_OVERHEAD_TASK_DELETE 0 -#define CALLING_OVERHEAD_TASK_SUSPEND 0 -#define CALLING_OVERHEAD_TASK_RESUME 0 -#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0 -#define CALLING_OVERHEAD_TASK_MODE 0 -#define CALLING_OVERHEAD_TASK_GET_NOTE 0 -#define CALLING_OVERHEAD_TASK_SET_NOTE 0 -#define CALLING_OVERHEAD_TASK_WAKE_WHEN 1 -#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0 -#define CALLING_OVERHEAD_INTERRUPT_CATCH 0 -#define CALLING_OVERHEAD_CLOCK_GET 1 -#define CALLING_OVERHEAD_CLOCK_SET 1 -#define CALLING_OVERHEAD_CLOCK_TICK 0 - -#define CALLING_OVERHEAD_TIMER_CREATE 0 -#define CALLING_OVERHEAD_TIMER_IDENT 0 -#define CALLING_OVERHEAD_TIMER_DELETE 0 -#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0 -#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 1 -#define CALLING_OVERHEAD_TIMER_RESET 0 -#define CALLING_OVERHEAD_TIMER_CANCEL 0 -#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0 -#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0 -#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0 -#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0 -#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0 - -#define CALLING_OVERHEAD_EVENT_SEND 0 -#define CALLING_OVERHEAD_EVENT_RECEIVE 0 -#define CALLING_OVERHEAD_SIGNAL_CATCH 0 -#define CALLING_OVERHEAD_SIGNAL_SEND 0 -#define CALLING_OVERHEAD_PARTITION_CREATE 1 -#define CALLING_OVERHEAD_PARTITION_IDENT 0 -#define CALLING_OVERHEAD_PARTITION_DELETE 0 -#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0 -#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0 -#define CALLING_OVERHEAD_REGION_CREATE 1 -#define CALLING_OVERHEAD_REGION_IDENT 0 -#define CALLING_OVERHEAD_REGION_DELETE 0 -#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0 -#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0 -#define CALLING_OVERHEAD_PORT_CREATE 2 -#define CALLING_OVERHEAD_PORT_IDENT 0 -#define CALLING_OVERHEAD_PORT_DELETE 0 -#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0 -#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0 - -#define CALLING_OVERHEAD_IO_INITIALIZE 0 -#define CALLING_OVERHEAD_IO_OPEN 0 -#define CALLING_OVERHEAD_IO_CLOSE 0 -#define CALLING_OVERHEAD_IO_READ 0 -#define CALLING_OVERHEAD_IO_WRITE 0 -#define CALLING_OVERHEAD_IO_CONTROL 0 -#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0 -#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0 -#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0 -#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0 -#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0 -#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0 -#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0 - -#else -/* - * 40 MHz processor, cache disabled. - */ -#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 4 -#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 3 -#define CALLING_OVERHEAD_TASK_CREATE 6 -#define CALLING_OVERHEAD_TASK_IDENT 5 -#define CALLING_OVERHEAD_TASK_START 5 -#define CALLING_OVERHEAD_TASK_RESTART 4 -#define CALLING_OVERHEAD_TASK_DELETE 4 -#define CALLING_OVERHEAD_TASK_SUSPEND 4 -#define CALLING_OVERHEAD_TASK_RESUME 4 -#define CALLING_OVERHEAD_TASK_SET_PRIORITY 5 -#define CALLING_OVERHEAD_TASK_MODE 4 -#define CALLING_OVERHEAD_TASK_GET_NOTE 5 -#define CALLING_OVERHEAD_TASK_SET_NOTE 5 -#define CALLING_OVERHEAD_TASK_WAKE_WHEN 17 -#define CALLING_OVERHEAD_TASK_WAKE_AFTER 3 -#define CALLING_OVERHEAD_INTERRUPT_CATCH 5 -#define CALLING_OVERHEAD_CLOCK_GET 17 -#define CALLING_OVERHEAD_CLOCK_SET 17 -#define CALLING_OVERHEAD_CLOCK_TICK 3 - -#define CALLING_OVERHEAD_TIMER_CREATE 4 -#define CALLING_OVERHEAD_TIMER_IDENT 4 -#define CALLING_OVERHEAD_TIMER_DELETE 5 -#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 5 -#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 19 -#define CALLING_OVERHEAD_TIMER_RESET 4 -#define CALLING_OVERHEAD_TIMER_CANCEL 4 -#define CALLING_OVERHEAD_SEMAPHORE_CREATE 6 -#define CALLING_OVERHEAD_SEMAPHORE_IDENT 4 -#define CALLING_OVERHEAD_SEMAPHORE_DELETE 5 -#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 5 -#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 4 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 4 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 4 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 4 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 5 -#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 4 - -#define CALLING_OVERHEAD_EVENT_SEND 5 -#define CALLING_OVERHEAD_EVENT_RECEIVE 5 -#define CALLING_OVERHEAD_SIGNAL_CATCH 4 -#define CALLING_OVERHEAD_SIGNAL_SEND 4 -#define CALLING_OVERHEAD_PARTITION_CREATE 6 -#define CALLING_OVERHEAD_PARTITION_IDENT 5 -#define CALLING_OVERHEAD_PARTITION_DELETE 4 -#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 5 -#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 5 -#define CALLING_OVERHEAD_REGION_CREATE 6 -#define CALLING_OVERHEAD_REGION_IDENT 5 -#define CALLING_OVERHEAD_REGION_DELETE 4 -#define CALLING_OVERHEAD_REGION_GET_SEGMENT 6 -#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 5 -#define CALLING_OVERHEAD_PORT_CREATE 6 -#define CALLING_OVERHEAD_PORT_IDENT 5 -#define CALLING_OVERHEAD_PORT_DELETE 4 -#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 5 -#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 5 - -#define CALLING_OVERHEAD_IO_INITIALIZE 5 -#define CALLING_OVERHEAD_IO_OPEN 5 -#define CALLING_OVERHEAD_IO_CLOSE 5 -#define CALLING_OVERHEAD_IO_READ 5 -#define CALLING_OVERHEAD_IO_WRITE 5 -#define CALLING_OVERHEAD_IO_CONTROL 5 -#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 3 -#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 4 -#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 5 -#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 4 -#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 4 -#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 4 -#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 3 - -#endif /* defined( INSTRUCTION_CACHE_ENABLE ) */ - -#endif - #ifdef __cplusplus } #endif diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h deleted file mode 100644 index f590317c63..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h +++ /dev/null @@ -1,204 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS TQM8xx BSP | -+-----------------------------------------------------------------+ -| This file has been adapted to MPC8xx by | -| Thomas Doerfler | -| Copyright (c) 2008 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -| | -| See the other copyright notice below for the original parts. | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.com/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains the console driver | -\*===============================================================*/ -/* derived from: generic MPC83xx BSP */ -/* irq.h - * - * This include file describe the data structure and the functions implemented - * by rtems to write interrupt handlers. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * This code is heavilly inspired by the public specification of STREAM V2 - * that can be found at : - * - * by following - * the STREAM API Specification Document link. - * - * The license and distribution terms for this file may be - * found in found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ - -#ifndef LIBBSP_POWERPC_TQM8XX_IRQ_IRQ_H -#define LIBBSP_POWERPC_TQM8XX_IRQ_IRQ_H - -#include - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -extern volatile unsigned int ppc_cached_irq_mask; - -/* - * Symblolic IRQ names and related definitions. - */ - - /* - * SIU IRQ handler related definitions - */ -#define BSP_SIU_IRQ_NUMBER 16 /* 16 reserved but in the future... */ -#define BSP_SIU_IRQ_LOWEST_OFFSET 0 -#define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER - 1) - /* - * CPM IRQ handlers related definitions - * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE - */ -#define BSP_CPM_IRQ_NUMBER 32 -#define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_NUMBER + BSP_SIU_IRQ_LOWEST_OFFSET) -#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1) - /* - * PowerPc exceptions handled as interrupt where a rtems managed interrupt - * handler might be connected - */ -#define BSP_PROCESSOR_IRQ_NUMBER 1 -#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1) -#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) - /* - * Summary - */ -#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) -#define BSP_LOWEST_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET) -#define BSP_MAX_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET) - /* - * Some SIU IRQ symbolic name definition. Please note that - * INT IRQ are defined but a single one will be used to - * redirect all CPM interrupt. - */ -#define BSP_SIU_EXT_IRQ_0 0 -#define BSP_SIU_INT_IRQ_0 1 - -#define BSP_SIU_EXT_IRQ_1 2 -#define BSP_SIU_INT_IRQ_1 3 - -#define BSP_SIU_EXT_IRQ_2 4 -#define BSP_SIU_INT_IRQ_2 5 - -#define BSP_SIU_EXT_IRQ_3 6 -#define BSP_SIU_INT_IRQ_3 7 - -#define BSP_SIU_EXT_IRQ_4 8 -#define BSP_SIU_INT_IRQ_4 9 - -#define BSP_SIU_EXT_IRQ_5 10 -#define BSP_SIU_INT_IRQ_5 11 - -#define BSP_SIU_EXT_IRQ_6 12 -#define BSP_SIU_INT_IRQ_6 13 - -#define BSP_SIU_EXT_IRQ_7 14 -#define BSP_SIU_INT_IRQ_7 15 - /* - * Symbolic name for CPM interrupt on SIU Internal level 2 - */ -#define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2 -#define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6 -#define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3 - /* - * Some CPM IRQ symbolic name definition - */ -#define BSP_CPM_IRQ_ERROR BSP_CPM_IRQ_LOWEST_OFFSET -#define BSP_CPM_IRQ_PARALLEL_IO_PC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 1) -#define BSP_CPM_IRQ_PARALLEL_IO_PC5 (BSP_CPM_IRQ_LOWEST_OFFSET + 2) -#define BSP_CPM_IRQ_SMC2_OR_PIP (BSP_CPM_IRQ_LOWEST_OFFSET + 3) -#define BSP_CPM_IRQ_SMC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 4) -#define BSP_CPM_IRQ_SPI (BSP_CPM_IRQ_LOWEST_OFFSET + 5) -#define BSP_CPM_IRQ_PARALLEL_IO_PC6 (BSP_CPM_IRQ_LOWEST_OFFSET + 6) -#define BSP_CPM_IRQ_TIMER_4 (BSP_CPM_IRQ_LOWEST_OFFSET + 7) - -#define BSP_CPM_IRQ_PARALLEL_IO_PC7 (BSP_CPM_IRQ_LOWEST_OFFSET + 9) -#define BSP_CPM_IRQ_PARALLEL_IO_PC8 (BSP_CPM_IRQ_LOWEST_OFFSET + 10) -#define BSP_CPM_IRQ_PARALLEL_IO_PC9 (BSP_CPM_IRQ_LOWEST_OFFSET + 11) -#define BSP_CPM_IRQ_TIMER_3 (BSP_CPM_IRQ_LOWEST_OFFSET + 12) - -#define BSP_CPM_IRQ_PARALLEL_IO_PC10 (BSP_CPM_IRQ_LOWEST_OFFSET + 14) -#define BSP_CPM_IRQ_PARALLEL_IO_PC11 (BSP_CPM_IRQ_LOWEST_OFFSET + 15) -#define BSP_CPM_I2C (BSP_CPM_IRQ_LOWEST_OFFSET + 16) -#define BSP_CPM_RISC_TIMER_TABLE (BSP_CPM_IRQ_LOWEST_OFFSET + 17) -#define BSP_CPM_IRQ_TIMER_2 (BSP_CPM_IRQ_LOWEST_OFFSET + 18) - -#define BSP_CPM_IDMA2 (BSP_CPM_IRQ_LOWEST_OFFSET + 20) -#define BSP_CPM_IDMA1 (BSP_CPM_IRQ_LOWEST_OFFSET + 21) -#define BSP_CPM_SDMA_CHANNEL_BUS_ERR (BSP_CPM_IRQ_LOWEST_OFFSET + 22) -#define BSP_CPM_IRQ_PARALLEL_IO_PC12 (BSP_CPM_IRQ_LOWEST_OFFSET + 23) -#define BSP_CPM_IRQ_PARALLEL_IO_PC13 (BSP_CPM_IRQ_LOWEST_OFFSET + 24) -#define BSP_CPM_IRQ_TIMER_1 (BSP_CPM_IRQ_LOWEST_OFFSET + 25) -#define BSP_CPM_IRQ_PARALLEL_IO_PC14 (BSP_CPM_IRQ_LOWEST_OFFSET + 26) -#define BSP_CPM_IRQ_SCC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 27) -#define BSP_CPM_IRQ_SCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 28) -#define BSP_CPM_IRQ_SCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 29) -#define BSP_CPM_IRQ_SCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 30) -#define BSP_CPM_IRQ_PARALLEL_IO_PC15 (BSP_CPM_IRQ_LOWEST_OFFSET + 31) - /* - * Some Processor exception handled as rtems IRQ symbolic name definition - */ -#define BSP_DECREMENTER BSP_PROCESSOR_IRQ_LOWEST_OFFSET - - -#define CPM_INTERRUPT - -/*-------------------------------------------------------------------------+ -| Function Prototypes. -+--------------------------------------------------------------------------*/ -/* - * ------------------------ PPC SIU Mngt Routines ------- - */ - -/* - * function to disable a particular irq at 8259 level. After calling - * this function, even if the device asserts the interrupt line it will - * not be propagated further to the processor - */ -int BSP_irq_disable_at_siu (const rtems_irq_number irqLine); -/* - * function to enable a particular irq at 8259 level. After calling - * this function, if the device asserts the interrupt line it will - * be propagated further to the processor - */ -int BSP_irq_enable_at_siu (const rtems_irq_number irqLine); -/* - * function to acknoledge a particular irq at 8259 level. After calling - * this function, if a device asserts an enabled interrupt line it will - * be propagated further to the processor. Mainly usefull for people - * writting raw handlers as this is automagically done for rtems managed - * handlers. - */ -int BSP_irq_ack_at_siu (const rtems_irq_number irqLine); -/* - * function to check if a particular irq is enabled at 8259 level. After calling - */ -int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine); - -extern void BSP_rtems_irq_mng_init(unsigned cpuId); - -#ifdef __cplusplus -} -#endif - -#endif - -#endif diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S deleted file mode 100644 index 1a67196b0a..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S +++ /dev/null @@ -1,433 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS TQM8xx BSP | -+-----------------------------------------------------------------+ -| This file has been adapted to MPC8xx by | -| Thomas Doerfler | -| Copyright (c) 2008 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -| | -| See the other copyright notice below for the original parts. | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.com/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains the console driver | -\*===============================================================*/ -/* derived from: generic MPC83xx BSP */ -/* - * This file contains the assembly code for the PowerPC - * IRQ veneers for RTEMS. - * - * The license and distribution terms for this file may be - * found in found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * Modified to support the MCP750. - * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * Till Straumann , 2003/7: - * - store isr nesting level in _ISR_Nest_level rather than - * SPRG0 - RTEMS relies on that variable. - * Till Straumann , 2005/4: - * - DONT enable FP across user ISR since fpregs are never saved!! - * - * $Id$ - */ - -#include -#include -#include -#include - -#define SYNC \ - sync; \ - isync - - .text - .p2align 5 - - PUBLIC_VAR(decrementer_exception_vector_prolog_code) - -SYM (decrementer_exception_vector_prolog_code): - /* - * let room for exception frame - */ - stwu r1, - (EXCEPTION_FRAME_END)(r1) - stw r4, GPR4_OFFSET(r1) -#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - /* - * save link register - */ - mflr r4 - stw r4, EXC_LR_OFFSET(r1) - /* - * make link register contain shared_raw_irq_code_entry - * address - */ - lis r4,shared_raw_irq_code_entry@h - ori r4,r4,shared_raw_irq_code_entry@l - mtlr r4 - - li r4, ASM_DEC_VECTOR - blr -#else - li r4, ASM_DEC_VECTOR - ba shared_raw_irq_code_entry -#endif - - PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - - decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code - - PUBLIC_VAR(external_exception_vector_prolog_code) - -SYM (external_exception_vector_prolog_code): - /* - * let room for exception frame - */ - stwu r1, - (EXCEPTION_FRAME_END)(r1) - stw r4, GPR4_OFFSET(r1) -#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - /* - * save link register - */ - mflr r4 - stw r4, EXC_LR_OFFSET(r1) - /* - * make link register contain shared_raw_irq_code_entry - * address - */ - lis r4,shared_raw_irq_code_entry@h - ori r4,r4,shared_raw_irq_code_entry@l - mtlr r4 - - li r4, ASM_EXT_VECTOR - blr -#else - li r4, ASM_EXT_VECTOR - ba shared_raw_irq_code_entry -#endif - - PUBLIC_VAR (external_exception_vector_prolog_code_size) - - external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code - - PUBLIC_VAR(shared_raw_irq_code_entry) - PUBLIC_VAR(C_dispatch_irq_handler) - - .p2align 5 -SYM (shared_raw_irq_code_entry): - /* - * Entry conditions : - * Registers already saved : R1, R4 - * R1 : points to a location with enough room for the - * interrupt frame - * R4 : vector number - */ - /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed - * to reenable exception processing - */ - stw r0, GPR0_OFFSET(r1) - stw r2, GPR2_OFFSET(r1) - stw r3, GPR3_OFFSET(r1) - - mfsrr0 r0 - mfsrr1 r2 - mfmsr r3 - - stw r0, SRR0_FRAME_OFFSET(r1) - stw r2, SRR1_FRAME_OFFSET(r1) - /* - * Enable data and instruction address translation, exception recovery - * - * also, on CPUs with FP, enable FP so that FP context can be - * saved and restored (using FP instructions) - */ - ori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Push C scratch registers on the current stack. It may - * actually be the thread stack or the interrupt stack. - * Anyway we have to make it in order to be able to call C/C++ - * functions. Depending on the nesting interrupt level, we will - * switch to the right stack later. - */ - stw r5, GPR5_OFFSET(r1) - stw r6, GPR6_OFFSET(r1) - stw r7, GPR7_OFFSET(r1) - stw r8, GPR8_OFFSET(r1) - stw r9, GPR9_OFFSET(r1) - stw r10, GPR10_OFFSET(r1) - stw r11, GPR11_OFFSET(r1) - stw r12, GPR12_OFFSET(r1) - stw r13, GPR13_OFFSET(r1) - - mfcr r5 - mfctr r6 - mfxer r7 -#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - mflr r8 -#endif - - stw r5, EXC_CR_OFFSET(r1) - stw r6, EXC_CTR_OFFSET(r1) - stw r7, EXC_XER_OFFSET(r1) -#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - stw r8, EXC_LR_OFFSET(r1) -#endif - - /* - * Add some non volatile registers to store information - * that will be used when returning from C handler - */ - stw r14, GPR14_OFFSET(r1) - stw r15, GPR15_OFFSET(r1) - /* - * save current stack pointer location in R14 - */ - addi r14, r1, 0 - /* - * store part of _Thread_Dispatch_disable_level address in R15 - */ - addis r15,0, _Thread_Dispatch_disable_level@ha -#if BROKEN_ISR_NEST_LEVEL - /* - * Get current nesting level in R2 - */ - mfspr r2, SPRG0 -#else - /* - * Retrieve current nesting level from _ISR_Nest_level - */ - lis r7, _ISR_Nest_level@ha - lwz r2, _ISR_Nest_level@l(r7) -#endif - /* - * Check if stack switch is necessary - */ - cmpwi r2,0 - bne nested - mfspr r1, SPRG1 - -nested: - /* - * Start Incrementing nesting level in R2 - */ - addi r2,r2,1 - /* - * Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level - */ - lwz r6,_Thread_Dispatch_disable_level@l(r15) -#if BROKEN_ISR_NEST_LEVEL - /* - * Store new nesting level in SPRG0 - */ - mtspr SPRG0, r2 -#else - /* store new nesting level in _ISR_Nest_level */ - stw r2, _ISR_Nest_level@l(r7) -#endif - - addi r6, r6, 1 - mfmsr r5 - /* - * store new _Thread_Dispatch_disable_level value - */ - stw r6, _Thread_Dispatch_disable_level@l(r15) - /* - * We are now running on the interrupt stack. External and decrementer - * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. - */ - /* - * Call C exception handler for decrementer Interrupt frame is passed just - * in case... - */ - addi r3, r14, 0x8 - bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ - /* - * start decrementing nesting level. Note : do not test result against 0 - * value as an easy exit condition because if interrupt nesting level > 1 - * then _Thread_Dispatch_disable_level > 1 - */ -#if BROKEN_ISR_NEST_LEVEL - mfspr r2, SPRG0 -#else - lis r7, _ISR_Nest_level@ha - lwz r2, _ISR_Nest_level@l(r7) -#endif - /* - * start decrementing _Thread_Dispatch_disable_level - */ - lwz r3,_Thread_Dispatch_disable_level@l(r15) - addi r2, r2, -1 /* Continue decrementing nesting level */ - addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */ -#if BROKEN_ISR_NEST_LEVEL - mtspr SPRG0, r2 /* End decrementing nesting level */ -#else - stw r2, _ISR_Nest_level@l(r7) /* End decrementing nesting level */ -#endif - stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ - cmpwi r3, 0 - /* - * switch back to original stack (done here just optimize registers - * contention. Could have been done before...) - */ - addi r1, r14, 0 - bne easy_exit /* if (_Thread_Dispatch_disable_level != 0) goto easy_exit */ - /* - * Here we are running again on the thread system stack. - * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to - * do something with the current thread... - */ - addis r4, 0, _Context_Switch_necessary@ha - lwz r5, _Context_Switch_necessary@l(r4) - cmpwi r5, 0 - bne switch - - addis r6, 0, _ISR_Signals_to_thread_executing@ha - lwz r7, _ISR_Signals_to_thread_executing@l(r6) - cmpwi r7, 0 - li r8, 0 - beq easy_exit - stw r8, _ISR_Signals_to_thread_executing@l(r6) - /* - * going to call _ThreadProcessSignalsFromIrq - * Push a complete exception like frame... - */ - stmw r16, GPR16_OFFSET(r1) - addi r3, r1, 0x8 - /* - * compute SP at exception entry - */ - addi r2, r1, EXCEPTION_FRAME_END - /* - * store it at the right place - */ - stw r2, GPR1_OFFSET(r1) - /* - * Call High Level signal handling code - */ - bl _ThreadProcessSignalsFromIrq - /* - * start restoring exception like frame - */ - lwz r31, EXC_CTR_OFFSET(r1) - lwz r30, EXC_XER_OFFSET(r1) - lwz r29, EXC_CR_OFFSET(r1) - lwz r28, EXC_LR_OFFSET(r1) - - mtctr r31 - mtxer r30 - mtcr r29 - mtlr r28 - - lmw r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) - - /* - * Disable data and instruction translation. Make path non recoverable... - */ - mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Restore rfi related settings - */ - - lwz r3, SRR1_FRAME_OFFSET(r1) - mtsrr1 r3 - lwz r3, SRR0_FRAME_OFFSET(r1) - mtsrr0 r3 - - lwz r3, GPR3_OFFSET(r1) - addi r1,r1, EXCEPTION_FRAME_END - SYNC - rfi - -switch: -#if ( PPC_HAS_FPU != 0 ) -#if ! defined( CPU_USE_DEFERRED_FP_SWITCH ) -#error missing include file??? -#endif - mfmsr r4 -#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) - /* if the executing thread has FP enabled propagate - * this now so _Thread_Dispatch can save/restore the FPREGS - * NOTE: it is *crucial* to disable the FPU across the - * user ISR [independent of using the 'deferred' - * strategy or not]. We don't save FP regs across - * the user ISR and hence we prefer an exception to - * be raised rather than experiencing corruption. - */ - lwz r3, SRR1_FRAME_OFFSET(r1) - rlwimi r4, r3, 0, 18, 18 /* MSR_FP */ -#else - ori r4, r4, MSR_FP -#endif - mtmsr r4 -#endif - bl SYM (_Thread_Dispatch) - -easy_exit: - /* - * start restoring interrupt frame - */ - lwz r3, EXC_CTR_OFFSET(r1) - lwz r4, EXC_XER_OFFSET(r1) - lwz r5, EXC_CR_OFFSET(r1) - lwz r6, EXC_LR_OFFSET(r1) - - mtctr r3 - mtxer r4 - mtcr r5 - mtlr r6 - - lwz r15, GPR15_OFFSET(r1) - lwz r14, GPR14_OFFSET(r1) - lwz r13, GPR13_OFFSET(r1) - lwz r12, GPR12_OFFSET(r1) - lwz r11, GPR11_OFFSET(r1) - lwz r10, GPR10_OFFSET(r1) - lwz r9, GPR9_OFFSET(r1) - lwz r8, GPR8_OFFSET(r1) - lwz r7, GPR7_OFFSET(r1) - lwz r6, GPR6_OFFSET(r1) - lwz r5, GPR5_OFFSET(r1) - - /* - * Disable nested exception processing, data and instruction - * translation. - */ - mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Restore rfi related settings - */ - - lwz r4, SRR1_FRAME_OFFSET(r1) - lwz r2, SRR0_FRAME_OFFSET(r1) - lwz r3, GPR3_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) - - mtsrr1 r4 - mtsrr0 r2 - lwz r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) - addi r1,r1, EXCEPTION_FRAME_END - SYNC - rfi diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c deleted file mode 100644 index 6ed06ccfeb..0000000000 --- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c +++ /dev/null @@ -1,185 +0,0 @@ -/*===============================================================*\ -| Project: RTEMS TQM8xx BSP | -+-----------------------------------------------------------------+ -| This file has been adapted to MPC8xx by | -| Thomas Doerfler | -| Copyright (c) 2008 | -| Embedded Brains GmbH | -| Obere Lagerstr. 30 | -| D-82178 Puchheim | -| Germany | -| rtems@embedded-brains.de | -| | -| See the other copyright notice below for the original parts. | -+-----------------------------------------------------------------+ -| The license and distribution terms for this file may be | -| found in the file LICENSE in this distribution or at | -| | -| http://www.rtems.com/license/LICENSE. | -| | -+-----------------------------------------------------------------+ -| this file contains the console driver | -\*===============================================================*/ -/* derived from: generic MPC83xx BSP */ -/* irq_init.c - * - * This file contains the implementation of rtems initialization - * related to interrupt handling. - * - * CopyRight (C) 2001 valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ -#include -#include -#include -#include -#include - -extern unsigned int external_exception_vector_prolog_code_size; -extern void external_exception_vector_prolog_code(); -extern unsigned int decrementer_exception_vector_prolog_code_size; -extern void decrementer_exception_vector_prolog_code(); - -volatile unsigned int ppc_cached_irq_mask; - -/* - * default on/off function - */ -static void nop_func1(void *unused){} -static void nop_func2(){} - -/* - * default isOn function - */ -static int not_connected() {return 0;} -/* - * default possible isOn function - */ -static int connected() {return 1;} - -static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; -static rtems_irq_global_settings initial_config; -static rtems_irq_connect_data defaultIrq = { - /* vectorIdex, hdl , handle , on , off , isOn */ - 0, nop_func1 , 0 , nop_func2 , nop_func2 , not_connected -}; -static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={ - /* - * actual rpiorities for interrupt : - * 0 means that only current interrupt is masked - * 255 means all other interrupts are masked - */ - /* - * SIU interrupts. - */ - 7,7, 6,6, 5,5, 4,4, 3,3, 2,2, 1,1, 0,0, - /* - * CPM Interrupts - */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, - /* - * Processor exceptions handled as interrupts - */ - 0 -}; - -void BSP_SIU_irq_init() -{ - /* - * In theory we should initialize two registers at least : - * SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But - * we should take care that a monitor may have restoreed to another value. - * If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT - * please feel free to add it here. - */ - ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0; - ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000; - ppc_cached_irq_mask = 0; - ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel; -} - -/* - * Initialize CPM interrupt management - */ -void -BSP_CPM_irq_init(void) -{ - /* - * Initialize the CPM interrupt controller. - */ - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr = -#ifdef mpc860 - (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#else - (CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#endif - ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; - - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN; -} - -void BSP_rtems_irq_mng_init(unsigned cpuId) -{ - rtems_raw_except_connect_data vectorDesc; - int i; - - BSP_SIU_irq_init(); - BSP_CPM_irq_init(); - /* - * Initialize Rtems management interrupt table - */ - /* - * re-init the rtemsIrq table - */ - for (i = 0; i < BSP_IRQ_NUMBER; i++) { - rtemsIrq[i] = defaultIrq; - rtemsIrq[i].name = i; - } - /* - * Init initial Interrupt management config - */ - initial_config.irqNb = BSP_IRQ_NUMBER; - initial_config.defaultEntry = defaultIrq; - initial_config.irqHdlTbl = rtemsIrq; - initial_config.irqBase = BSP_LOWEST_OFFSET; - initial_config.irqPrioTbl = irqPrioTable; - - if (!BSP_rtems_irq_mngt_set(&initial_config)) { - /* - * put something here that will show the failure... - */ - BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); - } - - /* - * We must connect the raw irq handler for the two - * expected interrupt sources : decrementer and external interrupts. - */ - vectorDesc.exceptIndex = ASM_DEC_VECTOR; - vectorDesc.hdl.vector = ASM_DEC_VECTOR; - vectorDesc.hdl.raw_hdl = decrementer_exception_vector_prolog_code; - vectorDesc.hdl.raw_hdl_size = (unsigned) &decrementer_exception_vector_prolog_code_size; - vectorDesc.on = nop_func2; - vectorDesc.off = nop_func2; - vectorDesc.isOn = connected; - if (!ppc_set_exception (&vectorDesc)) { - BSP_panic("Unable to initialize RTEMS decrementer raw exception\n"); - } - vectorDesc.exceptIndex = ASM_EXT_VECTOR; - vectorDesc.hdl.vector = ASM_EXT_VECTOR; - vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code; - vectorDesc.hdl.raw_hdl_size = (unsigned) &external_exception_vector_prolog_code_size; - if (!ppc_set_exception (&vectorDesc)) { - BSP_panic("Unable to initialize RTEMS external raw exception\n"); - } -#ifdef TRACE_IRQ_INIT - printk("RTEMS IRQ management is now operationnal\n"); -#endif -} diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c b/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c index c48d475ebf..29d1c497a7 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c +++ b/c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c @@ -54,6 +54,7 @@ #include #include #include +#include #include #include @@ -110,6 +111,7 @@ # error "Driver must have MCLBYTES > RBUF_SIZE" #endif +#define FEC_WATCHDOG_TIMEOUT 5 /* check media every 5 seconds */ /* * Per-device data */ @@ -128,6 +130,12 @@ struct m8xx_fec_enet_struct { rtems_id rxDaemonTid; rtems_id txDaemonTid; + /* + * MDIO/Phy info + */ + struct rtems_mdio_info mdio_info; + int phy_default; + int media_state; /* (last detected) state of media */ /* * Statistics */ @@ -152,6 +160,167 @@ struct m8xx_fec_enet_struct { }; static struct m8xx_fec_enet_struct enet_driver[NIFACES]; +/* declare ioctl function for internal use */ +static int fec_ioctl (struct ifnet *ifp, + ioctl_command_t command, caddr_t data); +/***************************************************************************\ +| MII Management access functions | +\***************************************************************************/ + +/*=========================================================================*\ +| Function: | +\*-------------------------------------------------------------------------*/ +static void fec_mdio_init +( +/*-------------------------------------------------------------------------*\ +| Purpose: | +| initialize the MII interface | ++---------------------------------------------------------------------------+ +| Input Parameters: | +\*-------------------------------------------------------------------------*/ + struct m8xx_fec_enet_struct *sc /* control structure */ +) +/*-------------------------------------------------------------------------*\ +| Return Value: | +| | +\*=========================================================================*/ +{ + + /* Set FEC registers for MDIO communication */ + /* + * set clock divider + */ + m8xx.fec.mii_speed = BSP_bus_frequency / 25000000 / 2 + 1; +} + +/*=========================================================================*\ +| Function: | +\*-------------------------------------------------------------------------*/ +int fec_mdio_read +( +/*-------------------------------------------------------------------------*\ +| Purpose: | +| read register of a phy | ++---------------------------------------------------------------------------+ +| Input Parameters: | +\*-------------------------------------------------------------------------*/ + int phy, /* PHY number to access or -1 */ + void *uarg, /* unit argument */ + unsigned reg, /* register address */ + uint32_t *pval /* ptr to read buffer */ + ) +/*-------------------------------------------------------------------------*\ +| Return Value: | +| 0, if ok, else error | +\*=========================================================================*/ +{ + struct m8xx_fec_enet_struct *sc = uarg;/* control structure */ + + /* + * make sure we work with a valid phy + */ + if (phy == -1) { + /* + * set default phy number: 0 + */ + phy = sc->phy_default; + } + if ( (phy < 0) || (phy > 31)) { + /* + * invalid phy number + */ + return EINVAL; + } + /* + * clear MII transfer event bit + */ + m8xx.fec.ievent = M8xx_FEC_IEVENT_MII; + /* + * set access command, data, start transfer + */ + m8xx.fec.mii_data = (M8xx_FEC_MII_DATA_ST | + M8xx_FEC_MII_DATA_OP_RD | + M8xx_FEC_MII_DATA_PHYAD(phy) | + M8xx_FEC_MII_DATA_PHYRA(reg) | + M8xx_FEC_MII_DATA_WDATA(0)); + + /* + * wait for cycle to terminate + */ + do { + rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); + } while (0 == (m8xx.fec.ievent & M8xx_FEC_IEVENT_MII)); + + /* + * fetch read data, if available + */ + if (pval != NULL) { + *pval = M8xx_FEC_MII_DATA_RDATA(m8xx.fec.mii_data); + } + return 0; +} + +/*=========================================================================*\ +| Function: | +\*-------------------------------------------------------------------------*/ +int fec_mdio_write +( +/*-------------------------------------------------------------------------*\ +| Purpose: | +| write register of a phy | ++---------------------------------------------------------------------------+ +| Input Parameters: | +\*-------------------------------------------------------------------------*/ + int phy, /* PHY number to access or -1 */ + void *uarg, /* unit argument */ + unsigned reg, /* register address */ + uint32_t val /* write value */ + ) +/*-------------------------------------------------------------------------*\ +| Return Value: | +| 0, if ok, else error | +\*=========================================================================*/ +{ + struct m8xx_fec_enet_struct *sc = uarg;/* control structure */ + + /* + * make sure we work with a valid phy + */ + if (phy == -1) { + /* + * set default phy number: 0 + */ + phy = sc->phy_default; + } + if ( (phy < 0) || (phy > 31)) { + /* + * invalid phy number + */ + return EINVAL; + } + /* + * clear MII transfer event bit + */ + m8xx.fec.ievent = M8xx_FEC_IEVENT_MII; + /* + * set access command, data, start transfer + */ + m8xx.fec.mii_data = (M8xx_FEC_MII_DATA_ST | + M8xx_FEC_MII_DATA_OP_WR | + M8xx_FEC_MII_DATA_PHYAD(phy) | + M8xx_FEC_MII_DATA_PHYRA(reg) | + M8xx_FEC_MII_DATA_WDATA(val)); + + /* + * wait for cycle to terminate + */ + do { + rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); + } while (0 == (m8xx.fec.ievent & M8xx_FEC_IEVENT_MII)); + + return 0; +} + /* * FEC interrupt handler */ @@ -286,10 +455,10 @@ m8xx_fec_initialize_hardware (struct m8xx_fec_enet_struct *sc) /* * Set up Transmit Control Register: - * Half duplex + * Full duplex * No heartbeat */ - m8xx.fec.x_cntrl = 0x00000000; + m8xx.fec.x_cntrl = M8xx_FEC_X_CNTRL_FDEN; /* * Set up DMA function code: @@ -307,12 +476,6 @@ m8xx_fec_initialize_hardware (struct m8xx_fec_enet_struct *sc) */ m8xx.sdcr = 1; - /* - * Set MII speed to 2.5 MHz for 25 Mhz system clock - */ - m8xx.fec.mii_speed = 0x0a; - m8xx.fec.mii_data = 0x58021000; - /* * Set up receive buffer descriptors */ @@ -516,11 +679,6 @@ m8xx_fec_Enet_retire_tx_bd (struct m8xx_fec_enet_struct *sc) if (status & M8xx_BD_UNDERRUN) enet_driver[0].txUnderrun++; - /* - * Restart the transmitter - */ - /* FIXME: this should get executed only if using the SCC */ - m8xx_cp_execute_cmd (M8xx_CR_OP_RESTART_TX | M8xx_CR_CHAN_SCC1); } if (status & M8xx_BD_DEFER) enet_driver[0].txDeferred++; @@ -715,10 +873,15 @@ static void fec_init (void *arg) if (sc->txDaemonTid == 0) { /* - * Set up SCC hardware + * Set up FEC hardware */ m8xx_fec_initialize_hardware (sc); + /* + * init access to phy + */ + fec_mdio_init(sc); + /* * Start driver tasks */ @@ -735,6 +898,11 @@ static void fec_init (void *arg) else m8xx.fec.r_cntrl &= ~0x8; + /* + * init timer so the "watchdog function gets called periodically + */ + ifp->if_timer = 1; + /* * Tell the world that we're running. */ @@ -775,6 +943,21 @@ static void fec_stop (struct m8xx_fec_enet_struct *sc) */ static void fec_enet_stats (struct m8xx_fec_enet_struct *sc) { + int media; + int result; + /* + * fetch/print media info + */ + media = IFM_MAKEWORD(0,0,0,sc->phy_default); /* fetch from default phy */ + + result = fec_ioctl(&(sc->arpcom.ac_if), + SIOCGIFMEDIA, + (caddr_t)&media); + if (result == 0) { + rtems_ifmedia2str(media,NULL,0); + printf ("\n"); + } + printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); printf (" Not First:%-8lu", sc->rxNotFirst); printf (" Not Last:%-8lu\n", sc->rxNotLast); @@ -784,7 +967,6 @@ static void fec_enet_stats (struct m8xx_fec_enet_struct *sc) printf (" Bad CRC:%-8lu", sc->rxBadCRC); printf (" Overrun:%-8lu", sc->rxOverrun); printf (" Collision:%-8lu\n", sc->rxCollision); - printf (" Discarded:%-8lu\n", (unsigned long)m8xx.scc1p.un.ethernet.disfc); printf (" Tx Interrupts:%-8lu", sc->txInterrupts); printf (" Deferred:%-8lu", sc->txDeferred); @@ -803,6 +985,13 @@ static int fec_ioctl (struct ifnet *ifp, int error = 0; switch (command) { + /* + * access PHY via MII + */ + case SIOCGIFMEDIA: + case SIOCSIFMEDIA: + rtems_mii_ioctl (&(sc->mdio_info),sc,command,(void *)data); + break; case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); @@ -841,6 +1030,115 @@ static int fec_ioctl (struct ifnet *ifp, } return error; } + +/*=========================================================================*\ +| Function: | +\*-------------------------------------------------------------------------*/ +int fec_mode_adapt +( +/*-------------------------------------------------------------------------*\ +| Purpose: | +| init the PHY and adapt FEC settings | ++---------------------------------------------------------------------------+ +| Input Parameters: | +\*-------------------------------------------------------------------------*/ + struct ifnet *ifp +) +/*-------------------------------------------------------------------------*\ +| Return Value: | +| 0, if success | +\*=========================================================================*/ +{ + int result = 0; + struct m8xx_fec_enet_struct *sc = ifp->if_softc; + int media = IFM_MAKEWORD( 0, 0, 0, sc->phy_default); + +#ifdef DEBUG + printf("c"); +#endif + /* + * fetch media status + */ + result = fec_ioctl(ifp,SIOCGIFMEDIA,(caddr_t)&media); + if (result != 0) { + return result; + } +#ifdef DEBUG + printf("C"); +#endif + /* + * status is unchanged? then do nothing + */ + if (media == sc->media_state) { + return 0; + } + /* + * otherwise: for the first call, try to negotiate mode + */ + if (sc->media_state == 0) { + /* + * set media status: set auto negotiation -> start auto-negotiation + */ + media = IFM_MAKEWORD(0,IFM_AUTO,0,sc->phy_default); + result = fec_ioctl(ifp,SIOCSIFMEDIA,(caddr_t)&media); + if (result != 0) { + return result; + } + /* + * wait for auto-negotiation to terminate + */ + do { + media = IFM_MAKEWORD(0,0,0,sc->phy_default); + result = fec_ioctl(ifp,SIOCGIFMEDIA,(caddr_t)&media); + if (result != 0) { + return result; + } + } while (IFM_NONE == IFM_SUBTYPE(media)); + } + + /* + * now set HW according to media results: + */ + /* + * if we are half duplex then switch to half duplex + */ + if (0 == (IFM_FDX & IFM_OPTIONS(media))) { + m8xx.fec.x_cntrl &= ~M8xx_FEC_X_CNTRL_FDEN; + } + else { + m8xx.fec.x_cntrl |= M8xx_FEC_X_CNTRL_FDEN; + } + /* + * store current media state for future compares + */ + sc->media_state = media; + + return 0; +} + +/*=========================================================================*\ +| Function: | +\*-------------------------------------------------------------------------*/ +static void fec_watchdog +( +/*-------------------------------------------------------------------------*\ +| Purpose: | +| periodically poll the PHY. if mode has changed, | +| then adjust the FEC settings | ++---------------------------------------------------------------------------+ +| Input Parameters: | +\*-------------------------------------------------------------------------*/ + struct ifnet *ifp +) +/*-------------------------------------------------------------------------*\ +| Return Value: | +| 1, if success | +\*=========================================================================*/ +{ + fec_mode_adapt(ifp); + ifp->if_timer = FEC_WATCHDOG_TIMEOUT; +} + int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) { struct m8xx_fec_enet_struct *sc; @@ -860,13 +1158,13 @@ int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) * Is driver free? */ if ((unitNumber <= 0) || (unitNumber > NIFACES)) { - printf ("Bad SCC unit number.\n"); + printk ("Bad FEC unit number.\n"); return 0; } sc = &enet_driver[unitNumber - 1]; ifp = &sc->arpcom.ac_if; if (ifp->if_softc != NULL) { - printf ("Driver already in use.\n"); + printk ("Driver already in use.\n"); return 0; } @@ -898,6 +1196,17 @@ int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; + /* + * setup info about mdio interface + */ + sc->mdio_info.mdio_r = fec_mdio_read; + sc->mdio_info.mdio_w = fec_mdio_write; + sc->mdio_info.has_gmii = 0; /* we do not support gigabit IF */ + /* + * assume: IF 1 -> PHY 0 + */ + sc->phy_default = unitNumber-1; + /* * Set up network interface values */ @@ -909,6 +1218,7 @@ int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_ioctl = fec_ioctl; ifp->if_start = m8xx_fec_enet_start; ifp->if_output = ether_output; + ifp->if_watchdog = fec_watchdog; /* XXX: timer is set in "init" */ ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; @@ -924,5 +1234,13 @@ int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) int rtems_fec_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching) { + /* + * enable FEC functionality at hardware pins* + * PD[3-15] are FEC pins + */ + if (attaching) { + m8xx.pdpar |= 0x1fff; + m8xx.pddir |= 0x1fff; + } return rtems_fec_driver_attach(config); } diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c index e99e9d9a6a..23311ee2aa 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c @@ -128,7 +128,6 @@ void _InitTQM8xx (void) */ void cpu_init(void) { - /* - * none up to now - */ + /* mmu initialization */ + mmu_init(); } -- cgit v1.2.3