From 80933ab316dcaf09ff682681668acacd91241526 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 9 Oct 2017 07:38:15 +0200 Subject: bsps/powerpc: Fix robust thread dispatch again Use the saved MSR to account for FPU and AltiVec settings. Update #2811. --- c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c index 5c6754d00f..ce1f326438 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c @@ -102,13 +102,11 @@ void ppc_exc_wrapup(BSP_Exception_frame *frame) } while (cpu_self->dispatch_necessary) { - uint32_t msr; rtems_interrupt_level level; cpu_self->isr_dispatch_disable = 1; cpu_self->thread_dispatch_disable_level = 1; - msr = ppc_machine_state_register(); - _Thread_Do_dispatch(cpu_self, msr | MSR_EE); + _Thread_Do_dispatch(cpu_self, frame->EXC_SRR1); rtems_interrupt_local_disable(level); (void) level; cpu_self = _Per_CPU_Get(); -- cgit v1.2.3