From 73cdeb6a514de2310ab01d71ef2cff3155035c52 Mon Sep 17 00:00:00 2001 From: Thomas Doerfler Date: Wed, 4 Jul 2007 12:25:49 +0000 Subject: merged individual exception handler code to a common one. --- ChangeLog | 4 + README.configure | 1 + c/src/lib/libbsp/powerpc/ChangeLog | 14 ++ c/src/lib/libbsp/powerpc/acinclude.m4 | 2 + .../libbsp/powerpc/motorola_powerpc/Makefile.am | 4 +- c/src/lib/libbsp/powerpc/shared/irq/irq.c | 4 +- c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S | 51 +++++- c/src/lib/libbsp/powerpc/shared/vectors/vectors.S | 81 +++++++-- c/src/lib/libbsp/powerpc/shared/vectors/vectors.h | 33 +++- .../libbsp/powerpc/shared/vectors/vectors_init.c | 30 ++-- c/src/lib/libcpu/powerpc/ChangeLog | 15 ++ c/src/lib/libcpu/powerpc/Makefile.am | 52 +++--- c/src/lib/libcpu/powerpc/ppc403/clock/clock.c | 197 +++++++++++++++++---- .../lib/libcpu/powerpc/ppc403/console/console405.c | 16 +- c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c | 16 +- c/src/lib/libcpu/powerpc/preinstall.am | 27 +-- c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h | 23 ++- c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c | 6 +- c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h | 1 + make/ChangeLog | 5 + 20 files changed, 443 insertions(+), 139 deletions(-) diff --git a/ChangeLog b/ChangeLog index 493a9fcd5a..4e4de4e817 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,7 @@ +2007-07-02 Thomas Doerfler + + * :README.configure: Add virtex BSP + 2007-06-20 Joel Sherrill * aclocal/bsp-alias.m4, README.configure: Add ep5200, IceCube, 5200Lite. diff --git a/README.configure b/README.configure index 42b446b7f0..8aa150fa81 100644 --- a/README.configure +++ b/README.configure @@ -203,6 +203,7 @@ powerpc : psim score603e mcp750 mvme2100 mvme2307 mpc8260ads ss555 mvme5500 ep1a pm520_cr825 pm520_ze30 gen405 helas403 mbx821_001 mbx821_002 mbx821_002b mbx860_001b mbx860_002 mbx860_005b mtx603e brs5l gen5200 ep5200 + virtex NOTE: The "motorola_powerpc" BSP is a single BSP which can be conditionally compiled to support most Motorola diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog index ab2d44b60a..9f8dc5807b 100644 --- a/c/src/lib/libbsp/powerpc/ChangeLog +++ b/c/src/lib/libbsp/powerpc/ChangeLog @@ -1,3 +1,17 @@ +2007-07-02 Thomas Doerfler + + * acinclude.m4, shared/irq/irq_asm.S, shared/irq/irq.c, + * shared/vectors/vectors_entry.S, shared/vectors/vectors.h, + * shared/vectors/vectors_init.c, shared/vectors/vectors.S: + converted various BSP specific implementations into a more general + "shared" one + +2007-07-02 Thomas Doerfler + + * vitex/: + integrated "virtex" BSP to support PPC core implemented in a + Xilinx virtex FPGA + 2007-06-20 Joel Sherrill * shared/uboot_dump_bdinfo.c: New file. diff --git a/c/src/lib/libbsp/powerpc/acinclude.m4 b/c/src/lib/libbsp/powerpc/acinclude.m4 index 03f267607d..7461b62eb2 100644 --- a/c/src/lib/libbsp/powerpc/acinclude.m4 +++ b/c/src/lib/libbsp/powerpc/acinclude.m4 @@ -24,6 +24,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR], AC_CONFIG_SUBDIRS([score603e]);; ss555 ) AC_CONFIG_SUBDIRS([ss555]);; + virtex ) + AC_CONFIG_SUBDIRS([virtex]);; *) AC_MSG_ERROR([Invalid BSP]);; esac diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am index 8bdfcfc474..f8b1c23d8b 100644 --- a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am +++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am @@ -128,6 +128,7 @@ include_bsp_HEADERS += ../../powerpc/shared/vectors/vectors.h noinst_PROGRAMS += vectors.rel vectors_rel_SOURCES = ../../powerpc/shared/vectors/vectors.h \ ../../powerpc/shared/vectors/vectors_init.c \ + ../../powerpc/shared/vectors/vectors_entry.S \ ../../powerpc/shared/vectors/vectors.S vectors_rel_CPPFLAGS = $(AM_CPPFLAGS) vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) @@ -161,11 +162,12 @@ libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \ ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \ - ../../../libcpu/@RTEMS_CPU@/mpc6xx/exceptions.rel \ + ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel EXTRA_DIST += BOOTING README.mtx603e README.MVME2100 README.MVME2300 \ + README.MVME2400 \ README.OTHERBOARDS README.mcp750 README.MVME2307 README.dec21140 EXTRA_DIST += times.mcp750 times.mvme2307 diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq.c b/c/src/lib/libbsp/powerpc/shared/irq/irq.c index be57fcb09f..e8c3803f64 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq.c @@ -333,14 +333,14 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config) vectorDesc.on = nop_func; vectorDesc.off = nop_func; vectorDesc.isOn = connected; - if (!mpc60x_set_exception (&vectorDesc)) { + if (!ppc_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS decrementer raw exception\n"); } vectorDesc.exceptIndex = ASM_EXT_VECTOR; vectorDesc.hdl.vector = ASM_EXT_VECTOR; vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code; vectorDesc.hdl.raw_hdl_size = (unsigned) external_exception_vector_prolog_code_size; - if (!mpc60x_set_exception (&vectorDesc)) { + if (!ppc_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } return 1; diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S index 4836c2a659..412a8e2214 100644 --- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S @@ -30,7 +30,7 @@ .text .p2align 5 - +#if defined(ASM_DEC_VECTOR) PUBLIC_VAR(decrementer_exception_vector_prolog_code) SYM (decrementer_exception_vector_prolog_code): @@ -45,9 +45,45 @@ SYM (decrementer_exception_vector_prolog_code): PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code +#endif + +#if defined(ASM_PIT_VECTOR) + PUBLIC_VAR(pit_exception_vector_prolog_code) + +SYM (pit_exception_vector_prolog_code): + /* + * let room for exception frame + */ + stwu r1, - (EXCEPTION_FRAME_END)(r1) + stw r4, GPR4_OFFSET(r1) + li r4, ASM_PIT_VECTOR + ba shared_raw_irq_code_entry + + PUBLIC_VAR (pit_exception_vector_prolog_code_size) + + pit_exception_vector_prolog_code_size = . - pit_exception_vector_prolog_code +#endif + +#if defined(ASM_FIT_VECTOR) + PUBLIC_VAR(fit_exception_vector_prolog_code) +SYM (fit_exception_vector_prolog_code): + /* + * let room for exception frame + */ + stwu r1, - (EXCEPTION_FRAME_END)(r1) + stw r4, GPR4_OFFSET(r1) + li r4, ASM_FIT_VECTOR + ba shared_raw_irq_code_entry + + PUBLIC_VAR (fit_exception_vector_prolog_code_size) + + fit_exception_vector_prolog_code_size = . - fit_exception_vector_prolog_code +#endif + PUBLIC_VAR(external_exception_vector_prolog_code) +#if defined(ASM_EXT_VECTOR) SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -60,6 +96,7 @@ SYM (external_exception_vector_prolog_code): PUBLIC_VAR (external_exception_vector_prolog_code_size) external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code +#endif PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) @@ -90,12 +127,14 @@ SYM (shared_raw_irq_code_entry): stw r0, SRR0_FRAME_OFFSET(r1) stw r3, SRR1_FRAME_OFFSET(r1) +#if defined(PPC_MSR_EXC_BITS) mfmsr r3 /* * Enable data and instruction address translation, exception recovery */ - ori r3, r3, MSR_RI | MSR_IR | MSR_DR + ori r3, r3, PPC_MSR_EXC_BITS mtmsr r3 +#endif SYNC /* * Push C scratch registers on the current stack. It may @@ -280,10 +319,12 @@ nested: /* * Disable data and instruction translation. Make path non recoverable... */ +#if defined(PPC_MSR_EXC_BITS) mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR + xori r3, r3, PPC_MSR_EXC_BITS mtmsr r3 SYNC +#endif /* * Restore rfi related settings */ @@ -331,10 +372,12 @@ easy_exit: * Disable nested exception processing, data and instruction * translation. */ +#if defined(PPC_MSR_EXC_BITS) mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR + xori r3, r3, PPC_MSR_EXC_BITS mtmsr r3 SYNC +#endif /* * Restore rfi related settings */ diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S index 97d7c6eea6..9901cb1595 100644 --- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S @@ -12,22 +12,11 @@ #include #include #include - + #define SYNC \ sync; \ isync - PUBLIC_VAR (__rtems_start) - .section .entry_point_section,"awx",@progbits -/* - * Entry point information used by bootloader code - */ -SYM (__rtems_start): - .long __rtems_entry_point - - /* - * end of special Entry point section - */ .text /* 603e shadows GPR0..GPR3 for certain exceptions. We must switch * that off before we can use the stack pointer. Note that this is @@ -72,9 +61,16 @@ SYM (push_normalized_frame): * r3 = exception vector entry point * (256 * vector number) + few instructions */ + /* + * FIXME: vectors should distingish + * all bits in mask 0x00003ff0 + * and keep in mind that the LR/R3 contains the + * address BEHIND the entry code + */ mflr r3 /* mask upper bits in case vectors are in the high area (psim) */ rlwinm r3, r3, 32-5, 20, 31 +#if defined(ASM_VEC_VECTOR) /* * Remap altivec unavaliable (0xf20) to its vector number... */ @@ -82,6 +78,7 @@ SYM (push_normalized_frame): bne 1f li r3,ASM_VEC_VECTOR<<3 1: +#endif /* * r3 = r3 >> 8 = vector # */ @@ -92,10 +89,27 @@ SYM (push_normalized_frame): * save it nevertheless.. */ stw r2, GPR2_OFFSET(r1) +#if defined(ASM_VECTORS_CRITICAL) + lis r0,ASM_VECTORS_CRITICAL@h + ori r0,r0,ASM_VECTORS_CRITICAL@l + rlwnm. r0,r0,r3,0,0 + beq 1f + /* + * NOTE: srr2/3 are stored in slots SRR0/1 + * for critical exceptions + */ + mfsrr2 r3 + stw r3, SRR0_FRAME_OFFSET(r1) + mfsrr3 r3 + stw r3, SRR1_FRAME_OFFSET(r1) + b 2f +1: +#endif mfsrr0 r3 stw r3, SRR0_FRAME_OFFSET(r1) mfsrr1 r3 stw r3, SRR1_FRAME_OFFSET(r1) +2: /* * Save general purpose registers * Already saved in prolog : R1, R3, LR. @@ -123,14 +137,16 @@ SYM (push_normalized_frame): * store it at the right place */ stw r3, GPR1_OFFSET(r1) + +#if defined(PPC_MSR_EXC_BITS) /* * Enable data and instruction address translation, exception nesting */ mfmsr r3 - ori r3,r3, MSR_RI | MSR_IR | MSR_DR + ori r3,r3, PPC_MSR_EXC_BITS mtmsr r3 SYNC - +#endif /* * Call C exception handler */ @@ -161,15 +177,45 @@ SYM (push_normalized_frame): lmw r4, GPR4_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) /* - * Disable data and instruction translation. Make path non recoverable... + * Disable data and instruction translation. Mark path non recoverable */ +#if defined(PPC_MSR_EXC_BITS) mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR + xori r3, r3, PPC_MSR_EXC_BITS mtmsr r3 SYNC +#endif +#if defined(ASM_VECTORS_CRITICAL) + /* + * determine, whether to restore from + * srr0/1 or srr2/3 + */ + lis r0,ASM_VECTORS_CRITICAL@h + lwz r3,EXCEPTION_NUMBER_OFFSET(r1) + ori r0,r0,ASM_VECTORS_CRITICAL@l + rlwnm. r0,r0,r3,0,0 + beq 1f + /* + * NOTE: srr2/3 are stored in slots SRR0/1 + * for critical exceptions + */ + lwz r3, SRR1_FRAME_OFFSET(r1) + mtsrr3 r3 + lwz r3, SRR0_FRAME_OFFSET(r1) + mtsrr2 r3 + lwz r3, GPR3_OFFSET(r1) + lwz r0, GPR0_OFFSET(r1) + /* DONT add back the frame size but reload the value + * stored in the frame -- maybe the exception handler + * changed it with good reason (e.g., gdb pushed a dummy frame) + */ + lwz r1, GPR1_OFFSET(r1) + SYNC + rfci +1: +#endif /* * Restore rfi related settings */ @@ -180,6 +226,7 @@ SYM (push_normalized_frame): mtsrr0 r3 lwz r3, GPR3_OFFSET(r1) + lwz r0, GPR0_OFFSET(r1) /* DONT add back the frame size but reload the value * stored in the frame -- maybe the exception handler * changed it with good reason (e.g., gdb pushed a dummy frame) diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h index 55823893ce..e931db260b 100644 --- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h +++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h @@ -12,8 +12,9 @@ * * $Id$ */ -#ifndef LIBBSP_POWERPC_MCP750_VECTORS_H -#define LIBBSP_POWERPC_MCP750_VECTORS_H +#ifndef LIBBSP_POWERPC_SHARED_VECTORS_H +#define LIBBSP_POWERPC_SHARED_VECTORS_H +#include /* * The callee (high level exception code written in C) @@ -72,16 +73,26 @@ #ifndef ASM /* * default raw exception handlers + * The "*_size" symbol is generated by the linker; prevent it from + * being accessed in one of the short data areas by declaring + * it as an array */ extern void default_exception_vector_code_prolog(); +extern unsigned int default_exception_vector_code_prolog_size[]; extern void tgpr_clr_exception_vector_code_prolog(); -/* This symbol is generated by the linker; prevent it from - * being accessed in one of the short data areas by declaring - * it as an array +extern unsigned int tgpr_clr_exception_vector_code_prolog_size[]; +/* + * FIXME: these should move to a "irq_asm.h" */ -extern int default_exception_vector_code_prolog_size[]; -extern int tgpr_clr_exception_vector_code_prolog_size[]; +extern void external_exception_vector_prolog_code(); +extern unsigned int external_exception_vector_prolog_code_size[]; +extern void decrementer_exception_vector_prolog_code(); +extern unsigned int decrementer_exception_vector_prolog_code_size[]; +extern void pit_exception_vector_prolog_code(); +extern unsigned int pit_exception_vector_prolog_code_size[]; +extern void fit_exception_vector_prolog_code(); +extern unsigned int fit_exception_vector_prolog_code_size[]; /* codemove is like memmove, but it also gets the cache line size * as 4th parameter to synchronize them. If this last parameter is @@ -91,6 +102,8 @@ extern int tgpr_clr_exception_vector_code_prolog_size[]; * next mutiple of 4. */ extern void * codemove(void *, const void *, unsigned int, unsigned long); +extern void exception_nop_enable(const rtems_raw_except_connect_data* ptr); +extern int exception_always_enabled(const rtems_raw_except_connect_data* ptr); extern void initialize_exceptions(); typedef struct { @@ -145,6 +158,12 @@ extern exception_handler_t globalExceptHdl; typedef BSP_Exception_frame CPU_Exception_frame; typedef exception_handler_t cpuExcHandlerType; +/* + * dummy functions for exception interface + */ +void exception_nop_enable(const rtems_raw_except_connect_data* ptr); +int exception_always_enabled(const rtems_raw_except_connect_data* ptr); + #endif /* ASM */ #endif /* LIBBSP_POWERPC_MCP750_VECTORS_H */ diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c index 75f57898c3..ffe295ff03 100644 --- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c +++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c @@ -25,7 +25,6 @@ static rtems_raw_except_global_settings exception_config; static rtems_raw_except_connect_data exception_table[LAST_VALID_EXC + 1]; -extern exception_handler_t globalExceptHdl; exception_handler_t globalExceptHdl; /* T. Straumann: provide a stack trace @@ -115,6 +114,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr) printk("\t CTR = %x\n", excPtr->EXC_CTR); printk("\t XER = %x\n", excPtr->EXC_XER); printk("\t LR = %x\n", excPtr->EXC_LR); + printk("\t MSR = %x\n", excPtr->EXC_MSR); printk("\t DAR = %x\n", excPtr->EXC_DAR); BSP_printStackTrace(excPtr); @@ -133,16 +133,20 @@ void C_exception_handler(BSP_Exception_frame* excPtr) } } -void nop_except_enable(const rtems_raw_except_connect_data* ptr) +/*********************************************************** + * dummy functions for on/off/isOn calls + * these functions just do nothing fulfill the semantic + * requirements to enable/disable a certain exception + */ +void exception_nop_enable(const rtems_raw_except_connect_data* ptr) { } -int except_always_enabled(const rtems_raw_except_connect_data* ptr) + +int exception_always_enabled(const rtems_raw_except_connect_data* ptr) { return 1; } -int mpc60x_vector_is_valid(rtems_vector vector); - void initialize_exceptions() { int i; @@ -174,10 +178,11 @@ void initialize_exceptions() default: break; } for (i=0; i <= exception_config.exceptSize; i++) { - if (!mpc60x_vector_is_valid (i)) { + if (!ppc_vector_is_valid (i)) { continue; } exception_table[i].exceptIndex = i; +#if defined(PPC_HAS_60X_VECTORS) if ( has_shadowed_gprs && ( ASM_IMISS_VECTOR == i || ASM_DLMISS_VECTOR == i @@ -185,14 +190,17 @@ void initialize_exceptions() exception_table[i].hdl.raw_hdl = tgpr_clr_exception_vector_code_prolog; exception_table[i].hdl.raw_hdl_size = (unsigned)tgpr_clr_exception_vector_code_prolog_size; } else { - exception_table[i].hdl = exception_config.defaultRawEntry.hdl; + exception_table[i].hdl = exception_config.defaultRawEntry.hdl; } +#else + exception_table[i].hdl = exception_config.defaultRawEntry.hdl; +#endif exception_table[i].hdl.vector = i; - exception_table[i].on = nop_except_enable; - exception_table[i].off = nop_except_enable; - exception_table[i].isOn = except_always_enabled; + exception_table[i].on = exception_nop_enable; + exception_table[i].off = exception_nop_enable; + exception_table[i].isOn = exception_always_enabled; } - if (!mpc60x_init_exceptions(&exception_config)) { + if (!ppc_init_exceptions(&exception_config)) { BSP_panic("Exception handling initialization failed\n"); } #ifdef RTEMS_DEBUG diff --git a/c/src/lib/libcpu/powerpc/ChangeLog b/c/src/lib/libcpu/powerpc/ChangeLog index 99bbaa1fc7..8e840537c1 100644 --- a/c/src/lib/libcpu/powerpc/ChangeLog +++ b/c/src/lib/libcpu/powerpc/ChangeLog @@ -1,3 +1,18 @@ +2007-07-02 Thomas Doerfler + + * ppc403/clock/clock.c, ppc403/console/console405.c, + * ppc403/irq/ictrl.c, ppc403/irq/ictrl.h, ppc403/tty_drv/tty_drv.c: + Adapted from old to new exception handling to prepare the "virtex" BSP + +2007-07-02 Thomas Doerfler + + * Makefile.am, preinstall.am, new-exceptions/asm_utils.S, + * new-exceptions/raw_exception.c, new-exceptions/raw_exception.h, + * rtems/powerpc/powerpc.h, shared/include/cpuIdent.c shared/include/cpuIdent.h: + Created a shared implementation of the PowerPC exception + code. These files are a "superset" version of the various + implementations that was available up to now. + 2007-05-21 Joel Sherrill * mpc6xx/clock/c_clock.c: Tinker with math so it does not overflow on diff --git a/c/src/lib/libcpu/powerpc/Makefile.am b/c/src/lib/libcpu/powerpc/Makefile.am index b1493f9f46..0edf6f0a00 100644 --- a/c/src/lib/libcpu/powerpc/Makefile.am +++ b/c/src/lib/libcpu/powerpc/Makefile.am @@ -32,6 +32,15 @@ new_exceptions_rtems_cpu_rel_SOURCES = new-exceptions/cpu.c \ new-exceptions/cpu_asm.S new_exceptions_rtems_cpu_rel_CPPFLAGS = $(AM_CPPFLAGS) new_exceptions_rtems_cpu_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) + + +include_libcpu_HEADERS += new-exceptions/raw_exception.h +noinst_PROGRAMS += new-exceptions/raw_exception.rel +new_exceptions_raw_exception_rel_SOURCES = new-exceptions/raw_exception.c \ + new-exceptions/asm_utils.S +new_exceptions_raw_exception_rel_CPPFLAGS = $(AM_CPPFLAGS) +new_exceptions_raw_exception_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) + endif ## shared/include @@ -84,13 +93,27 @@ endif ppc403_console_rel_CPPFLAGS = $(AM_CPPFLAGS) ppc403_console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) +if OLD_EXCEPTIONS ## ppc403/ictrl include_HEADERS = ppc403/ictrl/ictrl.h +else +include_HEADERS = +include_libcpu_HEADERS += shared/include/spr.h + +noinst_PROGRAMS += shared/cpuIdent.rel +shared_cpuIdent_rel_SOURCES = shared/include/cpuIdent.c shared/include/cpuIdent.h +shared_cpuIdent_rel_CPPFLAGS = $(AM_CPPFLAGS) +shared_cpuIdent_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) +include_libcpu_HEADERS += shared/include/cpuIdent.h +endif + +if OLD_EXCEPTIONS noinst_PROGRAMS += ppc403/ictrl.rel ppc403_ictrl_rel_SOURCES = ppc403/ictrl/ictrl.c ppc403/ictrl/ictrl.h ppc403_ictrl_rel_CPPFLAGS = $(AM_CPPFLAGS) ppc403_ictrl_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) +endif ## ppc403/timer noinst_PROGRAMS += ppc403/timer.rel @@ -108,12 +131,14 @@ ppc403_tty_drv_rel_CPPFLAGS = $(AM_CPPFLAGS) ppc403_tty_drv_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) endif +if OLD_EXCEPTIONS ## ppc403/vectors noinst_PROGRAMS += ppc403/vectors.rel ppc403_vectors_rel_SOURCES = ppc403/vectors/vectors.S ppc403/vectors/align_h.S ppc403_vectors_rel_CPPFLAGS = $(AM_CPPFLAGS) ppc403_vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) endif +endif EXTRA_DIST += mpc5xx/README if mpc5xx @@ -189,14 +214,6 @@ mpc505_vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) endif if mpc6xx -include_libcpu_HEADERS += mpc6xx/exceptions/raw_exception.h - -## mpc6xx/exceptions -noinst_PROGRAMS += mpc6xx/exceptions.rel -mpc6xx_exceptions_rel_SOURCES = mpc6xx/exceptions/raw_exception.c \ - mpc6xx/exceptions/asm_utils.S -mpc6xx_exceptions_rel_CPPFLAGS = $(AM_CPPFLAGS) -mpc6xx_exceptions_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) ## mpc6xx/mmu include_libcpu_HEADERS += mpc6xx/mmu/bat.h mpc6xx/mmu/pte121.h @@ -251,15 +268,6 @@ mpc8xx_cpm_rel_SOURCES = mpc8xx/cpm/cp.c mpc8xx/cpm/dpram.c mpc8xx_cpm_rel_CPPFLAGS = $(AM_CPPFLAGS) mpc8xx_cpm_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -## mpc8xx/exceptions -include_libcpu_HEADERS += mpc8xx/exceptions/raw_exception.h - -noinst_PROGRAMS += mpc8xx/exceptions.rel -mpc8xx_exceptions_rel_SOURCES = mpc8xx/exceptions/raw_exception.c \ - mpc8xx/exceptions/asm_utils.S -mpc8xx_exceptions_rel_CPPFLAGS = $(AM_CPPFLAGS) -mpc8xx_exceptions_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) - ## mpc8xx/mmu include_mpc8xx_HEADERS += mpc8xx/include/mmu.h @@ -305,16 +313,6 @@ mpc8260_cpm_rel_SOURCES = mpc8260/cpm/cp.c mpc8260/cpm/dpram.c mpc8260/cpm/brg.c mpc8260_cpm_rel_CPPFLAGS = $(AM_CPPFLAGS) mpc8260_cpm_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -## mpc8260/exceptions -include_libcpu_HEADERS += mpc8260/exceptions/raw_exception.h - -noinst_PROGRAMS += mpc8260/exceptions.rel -mpc8260_exceptions_rel_SOURCES = mpc8260/exceptions/raw_exception.c \ - mpc8260/exceptions/asm_utils.S \ - mpc8260/exceptions/raw_exception.h -mpc8260_exceptions_rel_CPPFLAGS = $(AM_CPPFLAGS) -mpc8260_exceptions_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) - ## mpc8260/mmu include_mpc8260_HEADERS += mpc8260/include/mmu.h diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c index 1de3db615b..b0df41f5f1 100644 --- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c +++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c @@ -40,8 +40,17 @@ #include #include #include - #include /* for atexit() */ +#include +/* + * check, which exception handling code is present + */ +#if !defined(ppc405) +#define PPC_HAS_CLASSIC_EXCEPTIONS TRUE +#else +#define PPC_HAS_CLASSIC_EXCEPTIONS FALSE +#include +#endif volatile uint32_t Clock_driver_ticks; static uint32_t pit_value, tick_time; @@ -78,11 +87,14 @@ static inline uint32_t get_itimer(void) /* * ISR Handler */ - -rtems_isr -Clock_isr(rtems_vector_number vector) + +#if PPC_HAS_CLASSIC_EXCEPTIONS +rtems_isr Clock_isr(rtems_vector_number vector) +#else +void Clock_isr(void* handle) +#endif { - uint32_t clicks_til_next_interrupt; + uint32_t clicks_til_next_interrupt; if (!auto_restart) { uint32_t itimer_value; @@ -138,9 +150,42 @@ Clock_isr(rtems_vector_number vector) rtems_clock_tick(); } -void Install_clock(rtems_isr_entry clock_isr) +#if !PPC_HAS_CLASSIC_EXCEPTIONS +int ClockIsOn(const rtems_irq_connect_data* unused) +{ + register uint32_t tcr; + + asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ + + return (tcr & 0x04000000) != 0; +} +#endif + +void ClockOff( +#if PPC_HAS_CLASSIC_EXCEPTIONS + void +#else + const rtems_irq_connect_data* unused +#endif + ) +{ + register uint32_t tcr; + + asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ + + tcr &= ~ 0x04400000; + + asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ +} + +void ClockOn( +#if PPC_HAS_CLASSIC_EXCEPTIONS + void +#else + const rtems_irq_connect_data* unused +#endif + ) { - rtems_isr_entry previous_isr; uint32_t iocr; register uint32_t tcr; #ifdef ppc403 @@ -193,16 +238,6 @@ void Install_clock(rtems_isr_entry clock_isr) pit_value = rtems_configuration_get_microseconds_per_tick() * rtems_cpu_configuration_get_clicks_per_usec(); - /* - * initialize the interval here - * First tick is set to right amount of time in the future - * Future ticks will be incremented over last value set - * in order to provide consistent clicks in the face of - * interrupt overhead - */ - - rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr); - /* * Set PIT value */ @@ -214,24 +249,107 @@ void Install_clock(rtems_isr_entry clock_isr) * Enable PIT interrupt, bit TCR->PIE = 1 0x4000000 */ tick_time = get_itimer() + pit_value; + asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000); +#if 1 asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ +#endif - atexit(Clock_exit); } -void -ReInstall_clock(rtems_isr_entry new_clock_isr) + + +void Install_clock( +#if PPC_HAS_CLASSIC_EXCEPTIONS + rtems_isr_entry clock_isr +#else + void (*clock_isr)(void *) +#endif + ) { +#ifdef ppc403 + uint32_t pvr; +#endif /* ppc403 */ + + Clock_driver_ticks = 0; + + /* + * initialize the interval here + * First tick is set to right amount of time in the future + * Future ticks will be incremented over last value set + * in order to provide consistent clicks in the face of + * interrupt overhead + */ + +#if PPC_HAS_CLASSIC_EXCEPTIONS + { rtems_isr_entry previous_isr; - uint32_t isrlevel = 0; + rtems_interrupt_catch(clock_isr, PPC_IRQ_PIT, &previous_isr); + ClockOn(); + } +#else + { + rtems_irq_connect_data clockIrqConnData; + clockIrqConnData.on = ClockOn; + clockIrqConnData.off = ClockOff; + clockIrqConnData.isOn = ClockIsOn; + clockIrqConnData.name = BSP_PIT; + clockIrqConnData.hdl = clock_isr; + if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) { + printk("Unable to connect Clock Irq handler\n"); + rtems_fatal_error_occurred(1); + } + } +#endif + atexit(Clock_exit); +} - rtems_interrupt_disable(isrlevel); +void +ReInstall_clock( +#if PPC_HAS_CLASSIC_EXCEPTIONS + rtems_isr_entry new_clock_isr +#else + void (*new_clock_isr)(void *) +#endif +) +{ + uint32_t isrlevel = 0; + + rtems_interrupt_disable(isrlevel); + +#if PPC_HAS_CLASSIC_EXCEPTIONS + { + rtems_isr_entry previous_isr; + rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr); + ClockOn(); + } +#else + { + rtems_irq_connect_data clockIrqConnData; + + clockIrqConnData.name = BSP_PIT; + if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) { + printk("Unable to stop system clock\n"); + rtems_fatal_error_occurred(1); + } - rtems_interrupt_catch(new_clock_isr, PPC_IRQ_PIT, &previous_isr); + BSP_remove_rtems_irq_handler (&clockIrqConnData); + + clockIrqConnData.on = ClockOn; + clockIrqConnData.off = ClockOff; + clockIrqConnData.isOn = ClockIsOn; + clockIrqConnData.name = BSP_PIT; + clockIrqConnData.hdl = new_clock_isr; - rtems_interrupt_enable(isrlevel); + if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) { + printk("Unable to connect Clock Irq handler\n"); + rtems_fatal_error_occurred(1); + } + } +#endif + + rtems_interrupt_enable(isrlevel); } @@ -243,18 +361,25 @@ ReInstall_clock(rtems_isr_entry new_clock_isr) * when bit's are set in TCR they can only be unset by a reset */ -void -Clock_exit(void) +void Clock_exit(void) { - register uint32_t tcr; +#if PPC_HAS_CLASSIC_EXCEPTIONS + ClockOff(); - asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ - - tcr &= ~ 0x04400000; - - asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ - - (void) set_vector(0, PPC_IRQ_PIT, 1); + (void) set_vector(0, PPC_IRQ_PIT, 1); +#else + { + rtems_irq_connect_data clockIrqConnData; + + clockIrqConnData.name = BSP_PIT; + if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) { + printk("Unable to stop system clock\n"); + rtems_fatal_error_occurred(1); + } + + BSP_remove_rtems_irq_handler (&clockIrqConnData); + } +#endif } rtems_device_driver Clock_initialize( @@ -293,7 +418,11 @@ rtems_device_driver Clock_control( if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { +#if PPC_HAS_CLASSIC_EXCEPTIONS Clock_isr(PPC_IRQ_PIT); +#else + Clock_isr(NULL); +#endif } else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) { diff --git a/c/src/lib/libcpu/powerpc/ppc403/console/console405.c b/c/src/lib/libcpu/powerpc/ppc403/console/console405.c index 2f76809eb5..15fc1888b6 100644 --- a/c/src/lib/libcpu/powerpc/ppc403/console/console405.c +++ b/c/src/lib/libcpu/powerpc/ppc403/console/console405.c @@ -159,14 +159,14 @@ struct async { | Modem status Register. +---------------------------------------------------------------------------*/ unsigned char MSR; /* 0x06 */ - #define MSR_DCTS 0x01 - #define MSR_DDSR 0x02 - #define MSR_TERI 0x04 - #define MSR_DDCD 0x08 - #define MSR_CTS 0x10 - #define MSR_DSR 0x20 - #define MSR_RI 0x40 - #define MSR_CD 0x80 + #define UART_MSR_DCTS 0x01 + #define UART_MSR_DDSR 0x02 + #define UART_MSR_TERI 0x04 + #define UART_MSR_DDCD 0x08 + #define UART_MSR_CTS 0x10 + #define UART_MSR_DSR 0x20 + #define UART_MSR_RI 0x40 + #define UART_MSR_CD 0x80 /*---------------------------------------------------------------------------+ | Scratch pad Register. diff --git a/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c b/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c index 319548d8fc..10f0483916 100644 --- a/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c +++ b/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c @@ -117,14 +117,14 @@ struct ttyasync { | Modem status Register. +---------------------------------------------------------------------------*/ unsigned char MSR; /* 0x06 */ - #define MSR_DCTS 0x01 - #define MSR_DDSR 0x02 - #define MSR_TERI 0x04 - #define MSR_DDCD 0x08 - #define MSR_CTS 0x10 - #define MSR_DSR 0x20 - #define MSR_RI 0x40 - #define MSR_CD 0x80 + #define UART_MSR_DCTS 0x01 + #define UART_MSR_DDSR 0x02 + #define UART_MSR_TERI 0x04 + #define UART_MSR_DDCD 0x08 + #define UART_MSR_CTS 0x10 + #define UART_MSR_DSR 0x20 + #define UART_MSR_RI 0x40 + #define UART_MSR_CD 0x80 /*---------------------------------------------------------------------------+ | Scratch pad Register. diff --git a/c/src/lib/libcpu/powerpc/preinstall.am b/c/src/lib/libcpu/powerpc/preinstall.am index 1ba764e916..12b46f62f5 100644 --- a/c/src/lib/libcpu/powerpc/preinstall.am +++ b/c/src/lib/libcpu/powerpc/preinstall.am @@ -49,6 +49,11 @@ if OLD_EXCEPTIONS $(PROJECT_INCLUDE)/rtems/score/ppc_offs.h: old-exceptions/rtems/score/ppc_offs.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/ppc_offs.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/ppc_offs.h + +else +$(PROJECT_INCLUDE)/libcpu/raw_exception.h: new-exceptions/raw_exception.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/raw_exception.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/raw_exception.h endif if shared $(PROJECT_INCLUDE)/libcpu/io.h: shared/include/io.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) @@ -88,10 +93,20 @@ $(PROJECT_INCLUDE)/libcpu/stackTrace.h: shared/src/stackTrace.h $(PROJECT_INCLUD PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/stackTrace.h endif if ppc403 +if OLD_EXCEPTIONS $(PROJECT_INCLUDE)/ictrl.h: ppc403/ictrl/ictrl.h $(PROJECT_INCLUDE)/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/ictrl.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/ictrl.h +else +$(PROJECT_INCLUDE)/libcpu/spr.h: shared/include/spr.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/spr.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/spr.h + +$(PROJECT_INCLUDE)/libcpu/cpuIdent.h: shared/include/cpuIdent.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/cpuIdent.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/cpuIdent.h +endif if ppc405 $(PROJECT_INCLUDE)/tty_drv.h: ppc403/tty_drv/tty_drv.h $(PROJECT_INCLUDE)/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tty_drv.h @@ -130,10 +145,6 @@ $(PROJECT_INCLUDE)/ictrl.h: mpc505/ictrl/ictrl.h $(PROJECT_INCLUDE)/$(dirstamp) PREINSTALL_FILES += $(PROJECT_INCLUDE)/ictrl.h endif if mpc6xx -$(PROJECT_INCLUDE)/libcpu/raw_exception.h: mpc6xx/exceptions/raw_exception.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/raw_exception.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/raw_exception.h - $(PROJECT_INCLUDE)/libcpu/bat.h: mpc6xx/mmu/bat.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/bat.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/bat.h @@ -164,10 +175,6 @@ $(PROJECT_INCLUDE)/mpc8xx/cpm.h: mpc8xx/include/cpm.h $(PROJECT_INCLUDE)/mpc8xx/ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8xx/cpm.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8xx/cpm.h -$(PROJECT_INCLUDE)/libcpu/raw_exception.h: mpc8xx/exceptions/raw_exception.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/raw_exception.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/raw_exception.h - $(PROJECT_INCLUDE)/mpc8xx/mmu.h: mpc8xx/include/mmu.h $(PROJECT_INCLUDE)/mpc8xx/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8xx/mmu.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8xx/mmu.h @@ -190,10 +197,6 @@ $(PROJECT_INCLUDE)/mpc8260/cpm.h: mpc8260/include/cpm.h $(PROJECT_INCLUDE)/mpc82 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8260/cpm.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8260/cpm.h -$(PROJECT_INCLUDE)/libcpu/raw_exception.h: mpc8260/exceptions/raw_exception.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) - $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/raw_exception.h -PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/raw_exception.h - $(PROJECT_INCLUDE)/mpc8260/mmu.h: mpc8260/include/mmu.h $(PROJECT_INCLUDE)/mpc8260/$(dirstamp) $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc8260/mmu.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc8260/mmu.h diff --git a/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h b/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h index 753fc14931..fc9a66647c 100644 --- a/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h +++ b/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h @@ -108,6 +108,7 @@ extern "C" { #define CPU_MODEL_NAME "PowerPC 405" #endif #define PPC_CACHE_ALIGNMENT 16 +#define PPC_HAS_RI 0 #define PPC_HAS_RFCI 1 #define PPC_USE_MULTIPLE 1 #define PPC_I_CACHE 2048 @@ -362,6 +363,14 @@ extern "C" { #ifndef PPC_HAS_EXCEPTION_PREFIX #define PPC_HAS_EXCEPTION_PREFIX 1 #endif +/* + * Unless otherwise specified, assume the model has an RI bit to + * identify non-recoverable interrupts + */ + +#ifndef PPC_HAS_RI +#define PPC_HAS_RI 1 +#endif /* * Unless otherwise specified, assume the model does NOT have @@ -657,15 +666,17 @@ extern "C" { * Machine Status Register (MSR) Constants Used by RTEMS */ -/* - * Some PPC model manuals refer to the Exception Prefix (EP) bit as - * IP for no apparent reason. - */ - +#if PPC_HAS_RI #define PPC_MSR_RI 0x000000002 /* bit 30 - recoverable exception */ +#endif + #define PPC_MSR_DR 0x000000010 /* bit 27 - data address translation */ #define PPC_MSR_IR 0x000000020 /* bit 26 - instruction addr translation*/ +/* + * Some PPC model manuals refer to the Exception Prefix (EP) bit as + * IP for no apparent reason. + */ #if (PPC_HAS_EXCEPTION_PREFIX) #define PPC_MSR_EP 0x000000040 /* bit 25 - exception prefix */ #else @@ -708,4 +719,4 @@ extern "C" { } #endif -#endif /* _RTEMS_SCORE_POWERPC_H */ +#endif /* _RTEMS_POWERPC_POWERPC_H */ diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c index cd7a88026d..03e710192b 100644 --- a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c +++ b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.c @@ -29,6 +29,7 @@ ppc_cpu_revision_t current_ppc_revision = 0xff; char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu) { switch (cpu) { + case PPC_405: return "PPC405"; case PPC_601: return "MPC601"; case PPC_5XX: return "MPC5XX"; case PPC_603: return "MPC603"; @@ -37,7 +38,7 @@ char *get_ppc_cpu_type_name(ppc_cpu_id_t cpu) case PPC_750: return "MPC750"; case PPC_7400: return "MPC7400"; case PPC_7455: return "MPC7455"; - case PPC_7457: return "MPC7457"; + case PPC_7457: return "MPC7457"; case PPC_603le: return "MPC603le"; case PPC_604e: return "MPC604e"; case PPC_604r: return "MPC604r"; @@ -58,6 +59,7 @@ ppc_cpu_id_t get_ppc_cpu_type() unsigned int pvr = (_read_PVR() >> 16); current_ppc_cpu = (ppc_cpu_id_t) pvr; switch (pvr) { + case PPC_405: case PPC_601: case PPC_5XX: case PPC_603: @@ -68,7 +70,7 @@ ppc_cpu_id_t get_ppc_cpu_type() case PPC_750: case PPC_7400: case PPC_7455: - case PPC_7457: + case PPC_7457: case PPC_604e: case PPC_620: case PPC_860: diff --git a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h index 90733a85c0..c7887a061f 100644 --- a/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h +++ b/c/src/lib/libcpu/powerpc/shared/include/cpuIdent.h @@ -29,6 +29,7 @@ typedef enum PPC_604e = 0x9, PPC_604r = 0xA, PPC_7400 = 0xC, + PPC_405 = 0x2001, PPC_7455 = 0x8001, /* Kate Feng */ PPC_7457 = 0x8002, PPC_620 = 0x16, diff --git a/make/ChangeLog b/make/ChangeLog index 046a1a6af7..44eb06aa2d 100644 --- a/make/ChangeLog +++ b/make/ChangeLog @@ -1,3 +1,8 @@ +2007-07-02 Thomas Doerfler + + * custom/vitex.cfg: added file to support PPC core in a xilinx + virtex FPGA + 2007-06-21 Joel Sherrill * custom/Linux-posix.cfg: Merge patch from Till Straumann which would -- cgit v1.2.3