From 72b397aafa21dab06ca24f57c8afb31eba8ef7bb Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 24 Mar 1998 17:10:44 +0000 Subject: Corrected register constraints per suggestion from Thomas Doerfler, IMD . --- c/src/exec/score/cpu/powerpc/cpu.c | 6 +++--- c/src/exec/score/cpu/powerpc/cpu.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/c/src/exec/score/cpu/powerpc/cpu.c b/c/src/exec/score/cpu/powerpc/cpu.c index 2a8abb04c2..072405425c 100644 --- a/c/src/exec/score/cpu/powerpc/cpu.c +++ b/c/src/exec/score/cpu/powerpc/cpu.c @@ -106,12 +106,12 @@ void _CPU_Initialize( { unsigned32 tmp; - asm volatile ("mfmsr %0" : "=r" (tmp)); + asm volatile ("mfmsr %0" : "=&r" (tmp)); msr = tmp; #ifdef ppc403 - asm volatile ("mfspr %0, 0x3d6" : "=r" (tmp)); /* EVPR */ + asm volatile ("mfspr %0, 0x3d6" : "=&r" (tmp)); /* EVPR */ evpr = tmp; - asm volatile ("mfdcr %0, 0x42" : "=r" (tmp)); /* EXIER */ + asm volatile ("mfdcr %0, 0x42" : "=&r" (tmp)); /* EXIER */ exier = tmp; asm volatile ("mtspr 0x3d6, %0" :: "r" (0)); /* EVPR */ #endif diff --git a/c/src/exec/score/cpu/powerpc/cpu.h b/c/src/exec/score/cpu/powerpc/cpu.h index 750066c7e5..3f6cb0f000 100644 --- a/c/src/exec/score/cpu/powerpc/cpu.h +++ b/c/src/exec/score/cpu/powerpc/cpu.h @@ -618,7 +618,7 @@ SCORE_EXTERN struct { { \ asm volatile ( \ "mfmsr %0; andc %1,%0,%1; mtmsr %1" : \ - "=r" ((_isr_cookie)) : "r" ((PPC_MSR_DISABLE_MASK)) \ + "=&r" ((_isr_cookie)) : "r" ((PPC_MSR_DISABLE_MASK)) \ ); \ } @@ -631,7 +631,7 @@ SCORE_EXTERN struct { #define _CPU_ISR_Enable( _isr_cookie ) \ { \ asm volatile ( "mtmsr %0" : \ - "=r" ((_isr_cookie)) : "0" ((_isr_cookie))); \ + "=&r" ((_isr_cookie)) : "0" ((_isr_cookie))); \ } /* @@ -1015,7 +1015,7 @@ static inline unsigned int CPU_swap_u32( "rlwimi %0,%1,24,16,23;" "rlwimi %0,%1,8,8,15;" "rlwimi %0,%1,24,0,7;" : - "=r" ((swapped)) : "r" ((value))); + "=&r" ((swapped)) : "r" ((value))); return( swapped ); } -- cgit v1.2.3