From 64a04ac3c71c55020b18f22be754ddb3ea23b9fa Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 12 May 2014 08:53:11 +0200 Subject: bsps: Use standard file name for BSP support --- c/src/lib/libbsp/powerpc/qoriq/Makefile.am | 2 +- c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c | 179 +++++++++++++++++++++ c/src/lib/libbsp/powerpc/qoriq/startup/smp.c | 179 --------------------- c/src/lib/libbsp/shared/bspsmp.c | 31 ++++ .../lib/libbsp/shared/bspsmpgetcurrentprocessor.c | 15 ++ c/src/lib/libbsp/shared/smp/getcpuid.c | 15 -- c/src/lib/libbsp/shared/smp/smp_stub.c | 31 ---- c/src/lib/libbsp/sparc/erc32/Makefile.am | 3 +- c/src/lib/libbsp/sparc/leon2/Makefile.am | 3 +- c/src/lib/libbsp/sparc/leon3/Makefile.am | 3 +- c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c | 23 --- c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c | 72 --------- c/src/lib/libbsp/sparc/leon3/startup/bspsmp.c | 79 +++++++++ 13 files changed, 310 insertions(+), 325 deletions(-) create mode 100644 c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c delete mode 100644 c/src/lib/libbsp/powerpc/qoriq/startup/smp.c create mode 100644 c/src/lib/libbsp/shared/bspsmp.c create mode 100644 c/src/lib/libbsp/shared/bspsmpgetcurrentprocessor.c delete mode 100644 c/src/lib/libbsp/shared/smp/getcpuid.c delete mode 100644 c/src/lib/libbsp/shared/smp/smp_stub.c delete mode 100644 c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c delete mode 100644 c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c create mode 100644 c/src/lib/libbsp/sparc/leon3/startup/bspsmp.c diff --git a/c/src/lib/libbsp/powerpc/qoriq/Makefile.am b/c/src/lib/libbsp/powerpc/qoriq/Makefile.am index 4a541af910..24da4d23f4 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/Makefile.am +++ b/c/src/lib/libbsp/powerpc/qoriq/Makefile.am @@ -126,7 +126,7 @@ libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/tsec.rel endif if HAS_SMP -libbsp_a_SOURCES += startup/smp.c +libbsp_a_SOURCES += startup/bspsmp.c endif include $(srcdir)/preinstall.am diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c b/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c new file mode 100644 index 0000000000..5b4c12a2db --- /dev/null +++ b/c/src/lib/libbsp/powerpc/qoriq/startup/bspsmp.c @@ -0,0 +1,179 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include + +#include + +#include + +#include +#include +#include +#include +#include +#include + +LINKER_SYMBOL(bsp_exc_vector_base); + +void _start_core_1(void); + +#define CORE_COUNT 2 + +#define ONE_CORE(core) (1 << (core)) + +#define ALL_CORES ((1 << CORE_COUNT) - 1) + +#define IPI_INDEX 0 + +#define TLB_BEGIN 8 + +#define TLB_END 16 + +#define TLB_COUNT (TLB_END - TLB_BEGIN) + +/* + * These values can be obtained with the debugger or a look into the + * U-Boot sources (arch/powerpc/cpu/mpc85xx/release.S). + */ +#if 1 + #define BOOT_BEGIN 0x1fff0000 + #define BOOT_LAST 0x1fffffff + #define SPIN_TABLE (BOOT_BEGIN + 0xf2a0) +#else + #define BOOT_BEGIN 0x3fff0000 + #define BOOT_LAST 0x3fffffff + #define SPIN_TABLE (BOOT_BEGIN + 0xf240) +#endif + +#define TLB_BEGIN 8 + +#define TLB_END 16 + +#define TLB_COUNT (TLB_END - TLB_BEGIN) + +typedef struct { + uint32_t addr_upper; + uint32_t addr_lower; + uint32_t r3_upper; + uint32_t r3_lower; + uint32_t reserved; + uint32_t pir; + uint32_t r6_upper; + uint32_t r6_lower; +} uboot_spin_table; + +static uint32_t initial_core_1_stack[4096 / sizeof(uint32_t)]; + +static void mmu_config_undo(void) +{ + int i = 0; + + for (i = TLB_BEGIN; i < TLB_END; ++i) { + qoriq_tlb1_invalidate(i); + } +} + +static void release_core_1(void) +{ + const Per_CPU_Control *second_cpu = _Per_CPU_Get_by_index(1); + uboot_spin_table *spin_table = (uboot_spin_table *) SPIN_TABLE; + qoriq_mmu_context mmu_context; + + qoriq_mmu_context_init(&mmu_context); + qoriq_mmu_add(&mmu_context, BOOT_BEGIN, BOOT_LAST, 0, 0, FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW); + qoriq_mmu_partition(&mmu_context, TLB_COUNT); + qoriq_mmu_write_to_tlb1(&mmu_context, TLB_BEGIN); + + spin_table->pir = 1; + spin_table->r3_lower = (uint32_t) second_cpu->interrupt_stack_high; + spin_table->addr_upper = 0; + rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table)); + ppc_synchronize_data(); + spin_table->addr_lower = (uint32_t) _start_core_1; + rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table)); + + mmu_config_undo(); +} + +void qoriq_secondary_cpu_initialize(void) +{ + const Per_CPU_Control *second_cpu = _Per_CPU_Get_by_index(1); + + /* Disable decrementer */ + PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(BOOKE_TCR, BOOKE_TCR_DIE); + + /* Initialize exception handler */ + ppc_exc_initialize_with_vector_base( + (uintptr_t) second_cpu->interrupt_stack_low, + rtems_configuration_get_interrupt_stack_size(), + bsp_exc_vector_base + ); + + /* Now it is possible to make the code execute only */ + qoriq_mmu_change_perm( + FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SX, + FSL_EIS_MAS3_SX, + FSL_EIS_MAS3_SR + ); + + /* Initialize interrupt support */ + bsp_interrupt_facility_initialize(); + + bsp_interrupt_vector_enable(QORIQ_IRQ_IPI_0); + + _SMP_Start_multitasking_on_secondary_processor(); +} + +static void bsp_inter_processor_interrupt(void *arg) +{ + _SMP_Inter_processor_interrupt_handler(); +} + +uint32_t _CPU_SMP_Initialize(void) +{ + return CORE_COUNT; +} + +bool _CPU_SMP_Start_processor(uint32_t cpu_index) +{ + (void) cpu_index; + + release_core_1(); + + return true; +} + +void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) +{ + if (cpu_count > 1) { + rtems_status_code sc; + + sc = rtems_interrupt_handler_install( + QORIQ_IRQ_IPI_0, + "IPI", + RTEMS_INTERRUPT_UNIQUE, + bsp_inter_processor_interrupt, + NULL + ); + assert(sc == RTEMS_SUCCESSFUL); + } +} + +void _CPU_SMP_Send_interrupt(uint32_t target_processor_index) +{ + uint32_t self = ppc_processor_id(); + qoriq.pic.per_cpu [self].ipidr [IPI_INDEX].reg = + ONE_CORE(target_processor_index); +} diff --git a/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c b/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c deleted file mode 100644 index 5b4c12a2db..0000000000 --- a/c/src/lib/libbsp/powerpc/qoriq/startup/smp.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include - -#include - -#include - -#include -#include -#include -#include -#include -#include - -LINKER_SYMBOL(bsp_exc_vector_base); - -void _start_core_1(void); - -#define CORE_COUNT 2 - -#define ONE_CORE(core) (1 << (core)) - -#define ALL_CORES ((1 << CORE_COUNT) - 1) - -#define IPI_INDEX 0 - -#define TLB_BEGIN 8 - -#define TLB_END 16 - -#define TLB_COUNT (TLB_END - TLB_BEGIN) - -/* - * These values can be obtained with the debugger or a look into the - * U-Boot sources (arch/powerpc/cpu/mpc85xx/release.S). - */ -#if 1 - #define BOOT_BEGIN 0x1fff0000 - #define BOOT_LAST 0x1fffffff - #define SPIN_TABLE (BOOT_BEGIN + 0xf2a0) -#else - #define BOOT_BEGIN 0x3fff0000 - #define BOOT_LAST 0x3fffffff - #define SPIN_TABLE (BOOT_BEGIN + 0xf240) -#endif - -#define TLB_BEGIN 8 - -#define TLB_END 16 - -#define TLB_COUNT (TLB_END - TLB_BEGIN) - -typedef struct { - uint32_t addr_upper; - uint32_t addr_lower; - uint32_t r3_upper; - uint32_t r3_lower; - uint32_t reserved; - uint32_t pir; - uint32_t r6_upper; - uint32_t r6_lower; -} uboot_spin_table; - -static uint32_t initial_core_1_stack[4096 / sizeof(uint32_t)]; - -static void mmu_config_undo(void) -{ - int i = 0; - - for (i = TLB_BEGIN; i < TLB_END; ++i) { - qoriq_tlb1_invalidate(i); - } -} - -static void release_core_1(void) -{ - const Per_CPU_Control *second_cpu = _Per_CPU_Get_by_index(1); - uboot_spin_table *spin_table = (uboot_spin_table *) SPIN_TABLE; - qoriq_mmu_context mmu_context; - - qoriq_mmu_context_init(&mmu_context); - qoriq_mmu_add(&mmu_context, BOOT_BEGIN, BOOT_LAST, 0, 0, FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SW); - qoriq_mmu_partition(&mmu_context, TLB_COUNT); - qoriq_mmu_write_to_tlb1(&mmu_context, TLB_BEGIN); - - spin_table->pir = 1; - spin_table->r3_lower = (uint32_t) second_cpu->interrupt_stack_high; - spin_table->addr_upper = 0; - rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table)); - ppc_synchronize_data(); - spin_table->addr_lower = (uint32_t) _start_core_1; - rtems_cache_flush_multiple_data_lines(spin_table, sizeof(*spin_table)); - - mmu_config_undo(); -} - -void qoriq_secondary_cpu_initialize(void) -{ - const Per_CPU_Control *second_cpu = _Per_CPU_Get_by_index(1); - - /* Disable decrementer */ - PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS(BOOKE_TCR, BOOKE_TCR_DIE); - - /* Initialize exception handler */ - ppc_exc_initialize_with_vector_base( - (uintptr_t) second_cpu->interrupt_stack_low, - rtems_configuration_get_interrupt_stack_size(), - bsp_exc_vector_base - ); - - /* Now it is possible to make the code execute only */ - qoriq_mmu_change_perm( - FSL_EIS_MAS3_SR | FSL_EIS_MAS3_SX, - FSL_EIS_MAS3_SX, - FSL_EIS_MAS3_SR - ); - - /* Initialize interrupt support */ - bsp_interrupt_facility_initialize(); - - bsp_interrupt_vector_enable(QORIQ_IRQ_IPI_0); - - _SMP_Start_multitasking_on_secondary_processor(); -} - -static void bsp_inter_processor_interrupt(void *arg) -{ - _SMP_Inter_processor_interrupt_handler(); -} - -uint32_t _CPU_SMP_Initialize(void) -{ - return CORE_COUNT; -} - -bool _CPU_SMP_Start_processor(uint32_t cpu_index) -{ - (void) cpu_index; - - release_core_1(); - - return true; -} - -void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) -{ - if (cpu_count > 1) { - rtems_status_code sc; - - sc = rtems_interrupt_handler_install( - QORIQ_IRQ_IPI_0, - "IPI", - RTEMS_INTERRUPT_UNIQUE, - bsp_inter_processor_interrupt, - NULL - ); - assert(sc == RTEMS_SUCCESSFUL); - } -} - -void _CPU_SMP_Send_interrupt(uint32_t target_processor_index) -{ - uint32_t self = ppc_processor_id(); - qoriq.pic.per_cpu [self].ipidr [IPI_INDEX].reg = - ONE_CORE(target_processor_index); -} diff --git a/c/src/lib/libbsp/shared/bspsmp.c b/c/src/lib/libbsp/shared/bspsmp.c new file mode 100644 index 0000000000..3dc44b1d3a --- /dev/null +++ b/c/src/lib/libbsp/shared/bspsmp.c @@ -0,0 +1,31 @@ +/* + * RTEMS SMP Support for Single Core + * + * COPYRIGHT (c) 1989-2011. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include + +uint32_t _CPU_SMP_Initialize( void ) +{ + /* return the number of CPUs */ + return 1; +} + +bool _CPU_SMP_Start_processor( uint32_t cpu_index ) +{ + return true; +} + +void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) +{ +} + +void _CPU_SMP_Send_interrupt( uint32_t target_processor_index ) +{ +} diff --git a/c/src/lib/libbsp/shared/bspsmpgetcurrentprocessor.c b/c/src/lib/libbsp/shared/bspsmpgetcurrentprocessor.c new file mode 100644 index 0000000000..f62a807331 --- /dev/null +++ b/c/src/lib/libbsp/shared/bspsmpgetcurrentprocessor.c @@ -0,0 +1,15 @@ +/* + * COPYRIGHT (c) 1989-2011. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include + +uint32_t _CPU_SMP_Get_current_processor( void ) +{ + return 0; +} diff --git a/c/src/lib/libbsp/shared/smp/getcpuid.c b/c/src/lib/libbsp/shared/smp/getcpuid.c deleted file mode 100644 index f62a807331..0000000000 --- a/c/src/lib/libbsp/shared/smp/getcpuid.c +++ /dev/null @@ -1,15 +0,0 @@ -/* - * COPYRIGHT (c) 1989-2011. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include - -uint32_t _CPU_SMP_Get_current_processor( void ) -{ - return 0; -} diff --git a/c/src/lib/libbsp/shared/smp/smp_stub.c b/c/src/lib/libbsp/shared/smp/smp_stub.c deleted file mode 100644 index 3dc44b1d3a..0000000000 --- a/c/src/lib/libbsp/shared/smp/smp_stub.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * RTEMS SMP Support for Single Core - * - * COPYRIGHT (c) 1989-2011. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include - -uint32_t _CPU_SMP_Initialize( void ) -{ - /* return the number of CPUs */ - return 1; -} - -bool _CPU_SMP_Start_processor( uint32_t cpu_index ) -{ - return true; -} - -void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) -{ -} - -void _CPU_SMP_Send_interrupt( uint32_t target_processor_index ) -{ -} diff --git a/c/src/lib/libbsp/sparc/erc32/Makefile.am b/c/src/lib/libbsp/sparc/erc32/Makefile.am index 28fe82af41..abf8eca618 100644 --- a/c/src/lib/libbsp/sparc/erc32/Makefile.am +++ b/c/src/lib/libbsp/sparc/erc32/Makefile.am @@ -77,7 +77,8 @@ libbsp_a_SOURCES += \ ../../shared/src/irq-shell.c if HAS_SMP -libbsp_a_SOURCES += ../../shared/smp/getcpuid.c ../../shared/smp/smp_stub.c +libbsp_a_SOURCES += ../../shared/bspsmp.c +libbsp_a_SOURCES += ../../shared/bspsmpgetcurrentprocessor.c endif if HAS_NETWORKING diff --git a/c/src/lib/libbsp/sparc/leon2/Makefile.am b/c/src/lib/libbsp/sparc/leon2/Makefile.am index 70a4784f94..f913462a41 100644 --- a/c/src/lib/libbsp/sparc/leon2/Makefile.am +++ b/c/src/lib/libbsp/sparc/leon2/Makefile.am @@ -129,7 +129,8 @@ libbsp_a_SOURCES += ../../sparc/shared/i2c/i2cmst.c libbsp_a_SOURCES += timer/timer.c if HAS_SMP -libbsp_a_SOURCES += ../../shared/smp/getcpuid.c ../../shared/smp/smp_stub.c +libbsp_a_SOURCES += ../../shared/bspsmp.c +libbsp_a_SOURCES += ../../shared/bspsmpgetcurrentprocessor.c endif if HAS_NETWORKING diff --git a/c/src/lib/libbsp/sparc/leon3/Makefile.am b/c/src/lib/libbsp/sparc/leon3/Makefile.am index a9c14489ed..71d54d5779 100644 --- a/c/src/lib/libbsp/sparc/leon3/Makefile.am +++ b/c/src/lib/libbsp/sparc/leon3/Makefile.am @@ -124,8 +124,7 @@ libbsp_a_SOURCES += include/cache_.h libbsp_a_CPPFLAGS = -I$(srcdir)/include if HAS_SMP -libbsp_a_SOURCES += smp/getcpuid.c -libbsp_a_SOURCES += smp/smp_leon3.c +libbsp_a_SOURCES += startup/bspsmp.c endif if HAS_NETWORKING diff --git a/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c b/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c deleted file mode 100644 index 2ff31ebc8d..0000000000 --- a/c/src/lib/libbsp/sparc/leon3/smp/getcpuid.c +++ /dev/null @@ -1,23 +0,0 @@ -/** - * @file - * @ingroup sparc_leon3 - * @brief LEON3 SMP Obtain CPU Core Number - */ - -/* - * COPYRIGHT (c) 1989-2011. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include - -#if !defined(__leon__) -uint32_t _CPU_SMP_Get_current_processor( void ) -{ - return _LEON3_Get_current_processor(); -} -#endif diff --git a/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c b/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c deleted file mode 100644 index 6681525861..0000000000 --- a/c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c +++ /dev/null @@ -1,72 +0,0 @@ -/** - * @file - * @ingroup sparc_leon3 - * @brief LEON3 SMP BSP Support - */ - -/* - * COPYRIGHT (c) 1989-2011. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include -#include -#include -#include -#include - -static rtems_isr bsp_inter_processor_interrupt( - rtems_vector_number vector -) -{ - _SMP_Inter_processor_interrupt_handler(); -} - -void leon3_secondary_cpu_initialize(uint32_t cpu_index) -{ - leon3_set_cache_control_register(0x80000F); - /* Unmask IPI interrupts at Interrupt controller for this CPU */ - LEON3_IrqCtrl_Regs->mask[cpu_index] |= 1U << LEON3_MP_IRQ; - - _SMP_Start_multitasking_on_secondary_processor(); -} - -uint32_t _CPU_SMP_Initialize( void ) -{ - leon3_set_cache_control_register(0x80000F); - - if ( rtems_configuration_get_maximum_processors() > 1 ) { - LEON_Unmask_interrupt(LEON3_MP_IRQ); - set_vector(bsp_inter_processor_interrupt, LEON_TRAP_TYPE(LEON3_MP_IRQ), 1); - } - - return leon3_get_cpu_count(LEON3_IrqCtrl_Regs); -} - -bool _CPU_SMP_Start_processor( uint32_t cpu_index ) -{ - #if defined(RTEMS_DEBUG) - printk( "Waking CPU %d\n", cpu_index ); - #endif - - LEON3_IrqCtrl_Regs->mpstat = 1U << cpu_index; - - return true; -} - -void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) -{ - (void) cpu_count; - - /* Nothing to do */ -} - -void _CPU_SMP_Send_interrupt(uint32_t target_processor_index) -{ - /* send interrupt to destination CPU */ - LEON3_IrqCtrl_Regs->force[target_processor_index] = 1 << LEON3_MP_IRQ; -} diff --git a/c/src/lib/libbsp/sparc/leon3/startup/bspsmp.c b/c/src/lib/libbsp/sparc/leon3/startup/bspsmp.c new file mode 100644 index 0000000000..bb5313201c --- /dev/null +++ b/c/src/lib/libbsp/sparc/leon3/startup/bspsmp.c @@ -0,0 +1,79 @@ +/** + * @file + * @ingroup sparc_leon3 + * @brief LEON3 SMP BSP Support + */ + +/* + * COPYRIGHT (c) 1989-2011. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include +#include +#include +#include + +#if !defined(__leon__) +uint32_t _CPU_SMP_Get_current_processor( void ) +{ + return _LEON3_Get_current_processor(); +} +#endif + +static rtems_isr bsp_inter_processor_interrupt( + rtems_vector_number vector +) +{ + _SMP_Inter_processor_interrupt_handler(); +} + +void leon3_secondary_cpu_initialize(uint32_t cpu_index) +{ + leon3_set_cache_control_register(0x80000F); + /* Unmask IPI interrupts at Interrupt controller for this CPU */ + LEON3_IrqCtrl_Regs->mask[cpu_index] |= 1U << LEON3_MP_IRQ; + + _SMP_Start_multitasking_on_secondary_processor(); +} + +uint32_t _CPU_SMP_Initialize( void ) +{ + leon3_set_cache_control_register(0x80000F); + + if ( rtems_configuration_get_maximum_processors() > 1 ) { + LEON_Unmask_interrupt(LEON3_MP_IRQ); + set_vector(bsp_inter_processor_interrupt, LEON_TRAP_TYPE(LEON3_MP_IRQ), 1); + } + + return leon3_get_cpu_count(LEON3_IrqCtrl_Regs); +} + +bool _CPU_SMP_Start_processor( uint32_t cpu_index ) +{ + #if defined(RTEMS_DEBUG) + printk( "Waking CPU %d\n", cpu_index ); + #endif + + LEON3_IrqCtrl_Regs->mpstat = 1U << cpu_index; + + return true; +} + +void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) +{ + (void) cpu_count; + + /* Nothing to do */ +} + +void _CPU_SMP_Send_interrupt(uint32_t target_processor_index) +{ + /* send interrupt to destination CPU */ + LEON3_IrqCtrl_Regs->force[target_processor_index] = 1 << LEON3_MP_IRQ; +} -- cgit v1.2.3