From 401b237f9349362b40e3c08f7fd8db38fc51c5d4 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 3 Jul 2020 07:46:24 +0200 Subject: epiphany: Remove support for this target Due to an unmaintained toolchain (internal errors in GCC, no FSF GDB integration) the Epiphany architecture was obsoleted in RTEMS 5.1. Update #3941. --- bsps/epiphany/epiphany_sim/README | 6 - bsps/epiphany/epiphany_sim/btimer/btimer.c | 108 ---- bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg | 10 - bsps/epiphany/epiphany_sim/console/console-io.c | 104 ---- bsps/epiphany/epiphany_sim/headers.am | 10 - bsps/epiphany/epiphany_sim/include/bsp.h | 74 --- bsps/epiphany/epiphany_sim/include/bsp/irq.h | 49 -- bsps/epiphany/epiphany_sim/include/tm27.h | 1 - bsps/epiphany/epiphany_sim/irq/irq.c | 64 --- bsps/epiphany/epiphany_sim/start/bsp_specs | 9 - bsps/epiphany/epiphany_sim/start/linkcmds | 373 ------------- bsps/epiphany/epiphany_sim/start/start.S | 167 ------ bsps/epiphany/headers.am | 5 - bsps/epiphany/include/bsp/linker-symbols.h | 79 --- bsps/epiphany/shared/doxygen.h | 15 - c/src/aclocal/check-networking.m4 | 5 - c/src/aclocal/rtems-cpu-subdirs.m4 | 1 - c/src/lib/libbsp/epiphany/Makefile.am | 7 - c/src/lib/libbsp/epiphany/acinclude.m4 | 10 - c/src/lib/libbsp/epiphany/configure.ac | 20 - c/src/lib/libbsp/epiphany/epiphany_sim/Makefile.am | 66 --- .../lib/libbsp/epiphany/epiphany_sim/configure.ac | 32 -- cpukit/Makefile.am | 13 - cpukit/aclocal/check-networking.m4 | 4 - cpukit/configure.ac | 1 - cpukit/score/cpu/epiphany/cpu.c | 87 --- .../cpu/epiphany/epiphany-context-initialize.c | 66 --- .../score/cpu/epiphany/epiphany-context-switch.S | 215 -------- .../cpu/epiphany/epiphany-exception-handler.S | 304 ---------- cpukit/score/cpu/epiphany/headers.am | 8 - cpukit/score/cpu/epiphany/include/rtems/asm.h | 120 ---- .../score/cpu/epiphany/include/rtems/score/cpu.h | 614 --------------------- .../cpu/epiphany/include/rtems/score/cpu_asm.h | 74 --- .../cpu/epiphany/include/rtems/score/cpuatomic.h | 14 - .../cpu/epiphany/include/rtems/score/cpuimpl.h | 67 --- .../include/rtems/score/epiphany-utility.h | 180 ------ .../cpu/epiphany/include/rtems/score/epiphany.h | 64 --- cpukit/score/cpu/epiphany/setjmp.S | 69 --- 38 files changed, 3115 deletions(-) delete mode 100644 bsps/epiphany/epiphany_sim/README delete mode 100644 bsps/epiphany/epiphany_sim/btimer/btimer.c delete mode 100644 bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg delete mode 100644 bsps/epiphany/epiphany_sim/console/console-io.c delete mode 100644 bsps/epiphany/epiphany_sim/headers.am delete mode 100644 bsps/epiphany/epiphany_sim/include/bsp.h delete mode 100644 bsps/epiphany/epiphany_sim/include/bsp/irq.h delete mode 100644 bsps/epiphany/epiphany_sim/include/tm27.h delete mode 100644 bsps/epiphany/epiphany_sim/irq/irq.c delete mode 100644 bsps/epiphany/epiphany_sim/start/bsp_specs delete mode 100644 bsps/epiphany/epiphany_sim/start/linkcmds delete mode 100644 bsps/epiphany/epiphany_sim/start/start.S delete mode 100644 bsps/epiphany/headers.am delete mode 100644 bsps/epiphany/include/bsp/linker-symbols.h delete mode 100644 bsps/epiphany/shared/doxygen.h delete mode 100644 c/src/lib/libbsp/epiphany/Makefile.am delete mode 100644 c/src/lib/libbsp/epiphany/acinclude.m4 delete mode 100644 c/src/lib/libbsp/epiphany/configure.ac delete mode 100644 c/src/lib/libbsp/epiphany/epiphany_sim/Makefile.am delete mode 100644 c/src/lib/libbsp/epiphany/epiphany_sim/configure.ac delete mode 100644 cpukit/score/cpu/epiphany/cpu.c delete mode 100644 cpukit/score/cpu/epiphany/epiphany-context-initialize.c delete mode 100644 cpukit/score/cpu/epiphany/epiphany-context-switch.S delete mode 100644 cpukit/score/cpu/epiphany/epiphany-exception-handler.S delete mode 100644 cpukit/score/cpu/epiphany/headers.am delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/asm.h delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/score/cpu.h delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/score/cpu_asm.h delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/score/cpuatomic.h delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/score/cpuimpl.h delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h delete mode 100644 cpukit/score/cpu/epiphany/include/rtems/score/epiphany.h delete mode 100644 cpukit/score/cpu/epiphany/setjmp.S diff --git a/bsps/epiphany/epiphany_sim/README b/bsps/epiphany/epiphany_sim/README deleted file mode 100644 index 7127d91a66..0000000000 --- a/bsps/epiphany/epiphany_sim/README +++ /dev/null @@ -1,6 +0,0 @@ -This BSP is intended to run on epiphany-*-run simulator. - -From command line type: - -$ epiphany-rtems4.11-run -e=on --memory-region 0x8e000000,0x2000000 \ - $PATH_TO_RTEMS_EXE diff --git a/bsps/epiphany/epiphany_sim/btimer/btimer.c b/bsps/epiphany/epiphany_sim/btimer/btimer.c deleted file mode 100644 index 9cb8526822..0000000000 --- a/bsps/epiphany/epiphany_sim/btimer/btimer.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include - -extern char bsp_start_vector_table_begin[]; - -bool benchmark_timer_find_average_overhead; - -static void benchmark_timer1_interrupt_handler(void) -{ - unsigned int val = 0xFFFFFFFF; - unsigned int event_type = 0x1; - - /* Embed assembly code for setting timer1 */ - __asm__ __volatile__ ("movts ctimer1, %[val] \t \n" :: [val] "r" (val)); - - __asm__ __volatile__ ("movfs r16, config; \t \n" - "mov r17, %%low(0xfffff0ff);\t \n" - "movt r17, %%high(0xffff0ff);\t \n" - "lsl r18, %[event_type], 0x8; \t \n" - "and r16, r16, r17; \t \n" - "orr r16, r16, r18; \t \n" - "movts config, r16; \t \n" - :: [event_type] "r" (event_type)); -} - -/* Start eCore tiemr 1 usef for profiling and timing analysis */ -void benchmark_timer_initialize( void ) -{ - /* Install interrupt handler for timer 1 */ - - void (**table)(void) = (void (**)(void)) bsp_start_vector_table_begin; - - table[TIMER1] = benchmark_timer1_interrupt_handler; - - benchmark_timer1_interrupt_handler(); -} - -/* - * The following controls the behavior of benchmark_timer_read(). - * - * AVG_OVEREHAD is the overhead for starting and stopping the timer. It - * is usually deducted from the number returned. - * - * LEAST_VALID is the lowest number this routine should trust. Numbers - * below this are "noise" and zero is returned. - */ - -#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */ - /* (Y countdowns) to start/stop the timer. */ - /* This value is in microseconds. */ -#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */ - -benchmark_timer_t benchmark_timer_read( void ) -{ - uint32_t timer_val = 0; - uint32_t total; - - __asm__ __volatile__ ("movfs %[timer_val], ctimer1 \t \n" - :[timer_val] "=r" (timer_val):); - - total = (0xFFFFFFFF - timer_val); - - if ( benchmark_timer_find_average_overhead == true ) - return total; - else { - if ( total < LEAST_VALID ) - return 0; /* below timer resolution */ - /* - * Somehow convert total into microseconds - */ - return (total - AVG_OVERHEAD); - } -} - -void benchmark_timer_disable_subtracting_average_overhead( - bool find_flag -) -{ - benchmark_timer_find_average_overhead = find_flag; -} diff --git a/bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg b/bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg deleted file mode 100644 index 1fef6085d1..0000000000 --- a/bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg +++ /dev/null @@ -1,10 +0,0 @@ -include $(RTEMS_ROOT)/make/custom/default.cfg - -RTEMS_CPU = epiphany - -CPU_CFLAGS = - -CFLAGS_OPTIMIZE_V ?= -O0 -g -CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections - -LDFLAGS = -Wl,--gc-sections diff --git a/bsps/epiphany/epiphany_sim/console/console-io.c b/bsps/epiphany/epiphany_sim/console/console-io.c deleted file mode 100644 index e3da54389f..0000000000 --- a/bsps/epiphany/epiphany_sim/console/console-io.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -static void outbyte_console( char ); -static char inbyte_console( void ); - -void console_initialize_hardware(void) -{ - /* Do nothing */ -} - -/* Epiphany simulator would handle this system call */ -static void outbyte_console(char c) -{ - register int chan asm("r0") = STDOUT_FILENO; - register void* addr asm("r1") = &c; - register int len asm("r2") = 1; - - /* Invoke write system call to be handled by Epiphany simulator */ - __asm__ __volatile__ ("trap 0" : : "r" (chan), "r" (addr), "r" (len)); -} - -static char inbyte_console(void) -{ - char c; - register int chan asm("r0") = STDIN_FILENO; - register void* addr asm("r1") = &c; - register int len asm("r2") = 1; - - /* Invoke read system call to be handled by Epiphany simulator */ - asm ("trap 1" :: "r" (chan), "r" (addr), "r" (len)); - return c; -} - -/* - * console_outbyte_polled - * - * This routine transmits a character using polling. - */ -void console_outbyte_polled( - int port, - char ch -) -{ - outbyte_console( ch ); -} - -/* - * console_inbyte_nonblocking - * - * This routine polls for a character. - */ - -int console_inbyte_nonblocking(int port) -{ - char c; - - c = inbyte_console(); - if (!c) - return -1; - return (int) c; -} - -/* - * To support printk - */ - -#include - -static void Epiphany_output_char(char c) { console_outbyte_polled( 0, c ); } - -BSP_output_char_function_type BSP_output_char = Epiphany_output_char; -BSP_polling_getchar_function_type BSP_poll_char = - (void *)console_inbyte_nonblocking; diff --git a/bsps/epiphany/epiphany_sim/headers.am b/bsps/epiphany/epiphany_sim/headers.am deleted file mode 100644 index bbe2514398..0000000000 --- a/bsps/epiphany/epiphany_sim/headers.am +++ /dev/null @@ -1,10 +0,0 @@ -## This file was generated by "./boostrap -H". - -include_HEADERS = -include_HEADERS += ../../../../../../bsps/epiphany/epiphany_sim/include/bsp.h -include_HEADERS += include/bspopts.h -include_HEADERS += ../../../../../../bsps/epiphany/epiphany_sim/include/tm27.h - -include_bspdir = $(includedir)/bsp -include_bsp_HEADERS = -include_bsp_HEADERS += ../../../../../../bsps/epiphany/epiphany_sim/include/bsp/irq.h diff --git a/bsps/epiphany/epiphany_sim/include/bsp.h b/bsps/epiphany/epiphany_sim/include/bsp.h deleted file mode 100644 index 36b3f1fad0..0000000000 --- a/bsps/epiphany/epiphany_sim/include/bsp.h +++ /dev/null @@ -1,74 +0,0 @@ -/** - * @file - * - * @ingroup RTEMSBSPsEpiphanySim - */ - -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef LIBBSP_EPIPHANY_EPIPHANY_SIM_H -#define LIBBSP_EPIPHANY_EPIPHANY_SIM_H - -/** - * @defgroup RTEMSBSPsEpiphanySim Simulator - * - * @ingroup RTEMSBSPsEpiphany - * - * @brief Simulator Board Support Package. - * - * @{ - */ - -#include - -#include -#include - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @name Constants - * - * @{ - */ -void *clock_driver_sim_idle_body(uintptr_t); -#define BSP_IDLE_TASK_BODY clock_driver_sim_idle_body -/** @} */ - -#ifdef __cplusplus -} -#endif -/** @} */ - -#endif /* LIBBSP_EPIPHANY_EPIPHANY_SIM_H */ diff --git a/bsps/epiphany/epiphany_sim/include/bsp/irq.h b/bsps/epiphany/epiphany_sim/include/bsp/irq.h deleted file mode 100644 index 2b15a4536c..0000000000 --- a/bsps/epiphany/epiphany_sim/include/bsp/irq.h +++ /dev/null @@ -1,49 +0,0 @@ -/** - * @file - * - * @ingroup Epiphany_IRQ - * - * @brief Interrupt definitions. - */ - -/* - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef LIBBSP_GENERIC_EPIPHANY_IRQ_H -#define LIBBSP_GENERIC_EPIPHANY_IRQ_H - -#ifndef ASM - -#include -#include -#include - -#define BSP_INTERRUPT_VECTOR_MIN 0x0 -#define BSP_INTERRUPT_VECTOR_MAX 0x24 - -#endif /* ASM */ -#endif /* LIBBSP_GENERIC_OR1K_IRQ_H */ diff --git a/bsps/epiphany/epiphany_sim/include/tm27.h b/bsps/epiphany/epiphany_sim/include/tm27.h deleted file mode 100644 index 0dfa7bf628..0000000000 --- a/bsps/epiphany/epiphany_sim/include/tm27.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/bsps/epiphany/epiphany_sim/irq/irq.c b/bsps/epiphany/epiphany_sim/irq/irq.c deleted file mode 100644 index 994e25bf0e..0000000000 --- a/bsps/epiphany/epiphany_sim/irq/irq.c +++ /dev/null @@ -1,64 +0,0 @@ -/** - * @file - * - * @ingroup epiphany_interrupt - * - * @brief Interrupt support. - */ - -/* - * Epiphany CPU Dependent Source - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include - -/* Almost all of the jobs that the following functions should - * do are implemented in cpukit - */ - -void bsp_interrupt_handler_default(rtems_vector_number vector) -{ - printk("spurious interrupt: %" PRIdrtems_vector_number "\n", vector); -} - -rtems_status_code bsp_interrupt_facility_initialize() -{ - return 0; -} - -void bsp_interrupt_vector_enable(rtems_vector_number vector) -{ - bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); -} - -void bsp_interrupt_vector_disable(rtems_vector_number vector) -{ - bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); -} diff --git a/bsps/epiphany/epiphany_sim/start/bsp_specs b/bsps/epiphany/epiphany_sim/start/bsp_specs deleted file mode 100644 index 87638cc027..0000000000 --- a/bsps/epiphany/epiphany_sim/start/bsp_specs +++ /dev/null @@ -1,9 +0,0 @@ -%rename endfile old_endfile -%rename startfile old_startfile - -*startfile: -%{!qrtems: %(old_startfile)} \ -%{!nostdlib: %{qrtems: crti.o%s crtbegin.o%s}} - -*endfile: -%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s} diff --git a/bsps/epiphany/epiphany_sim/start/linkcmds b/bsps/epiphany/epiphany_sim/start/linkcmds deleted file mode 100644 index 8ef1b5b89b..0000000000 --- a/bsps/epiphany/epiphany_sim/start/linkcmds +++ /dev/null @@ -1,373 +0,0 @@ -/** - * @file - * - * @ingroup bsp_linker - * - * @brief Memory map - */ - -/* - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -OUTPUT_FORMAT("elf32-epiphany", "elf32-epiphany", "elf32-epiphany") -OUTPUT_ARCH (epiphany) - -ENTRY (_start) -STARTUP (start.o) - -MEMORY -{ - VECTOR_RAM (AIW) : ORIGIN = 0x00000000, LENGTH = 0xB0 - LOCAL_MEM (AIW) : ORIGIN = 0x000000B0, LENGTH = 0x00007FC0 /* 32KiB Local memory */ - RAM : ORIGIN = 0x8E000000, LENGTH = 0x01000000 /* 16MiB external RAM */ -} - -REGION_ALIAS ("REGION_START", LOCAL_MEM); -REGION_ALIAS ("REGION_VECTOR", VECTOR_RAM); -REGION_ALIAS ("REGION_TEXT", RAM); -REGION_ALIAS ("REGION_TEXT_LOAD", RAM); -REGION_ALIAS ("REGION_RODATA", RAM); -REGION_ALIAS ("REGION_RODATA_LOAD", RAM); -REGION_ALIAS ("REGION_DATA", RAM); -REGION_ALIAS ("REGION_DATA_LOAD", RAM); -REGION_ALIAS ("REGION_FAST_DATA", RAM); -REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); -REGION_ALIAS ("REGION_BSS", RAM); -REGION_ALIAS ("REGION_WORK", RAM); -REGION_ALIAS ("REGION_STACK", RAM); - -/* The following address is used for text output */ -bsp_section_outbut_buffer = 0x8F800000; -bsp_section_vector_begin = 0x00000000; - -/* - * Global symbols that may be defined externally - */ -bsp_vector_table_size = DEFINED (bsp_vector_table_size) ? bsp_vector_table_size : 64; - -bsp_section_xbarrier_align = DEFINED (bsp_section_xbarrier_align) ? bsp_section_xbarrier_align : 1; -bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1; -bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1; - -bsp_stack_align = DEFINED (bsp_stack_align) ? bsp_stack_align : 8; - -bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024; -bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align); - -SECTIONS { - - .vector : - { - *(.vector) - . = ALIGN(bsp_vector_table_size); - bsp_section_vector_end = .; - } > REGION_VECTOR AT > REGION_VECTOR - bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_begin; - bsp_vector_table_begin = bsp_section_vector_begin; - bsp_vector_table_end = bsp_vector_table_begin + bsp_vector_table_size; - - .start : - { - . = ALIGN(8); - bsp_section_start_begin = .; - KEEP (*(.bsp_start_text)) - KEEP (*(.bsp_start_data)) - bsp_section_start_end = .; - } > REGION_START AT > REGION_START - bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin; - -.xbarrier : { - . = ALIGN (bsp_section_xbarrier_align); - } > REGION_VECTOR AT > REGION_VECTOR - -.text : { - . = ALIGN(8); - bsp_section_text_begin = .; - *(.text.unlikely .text.*_unlikely) - *(.text .stub .text.* .gnu.linkonce.t.*) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) - } > REGION_TEXT AT > REGION_TEXT_LOAD - .init : { - KEEP (*(.init)) - } > REGION_TEXT AT > REGION_TEXT_LOAD - .fini : { - KEEP (*(.fini)) - . = ALIGN(8); - bsp_section_text_end = .; - } > REGION_TEXT AT > REGION_TEXT_LOAD - bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin; - bsp_section_text_load_begin = LOADADDR (.text); - bsp_section_text_load_end = bsp_section_text_load_begin + bsp_section_text_size; - -.robarrier : { - . = ALIGN (bsp_section_robarrier_align); - } > REGION_RODATA AT > REGION_RODATA - -.rodata : { - . = ALIGN(8); - bsp_section_rodata_begin = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - } > REGION_RODATA AT > REGION_RODATA_LOAD -.eh_frame : { - KEEP (*(.eh_frame)) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .gcc_except_table : { - *(.gcc_except_table .gcc_except_table.*) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .tdata : { - _TLS_Data_begin = .; - *(.tdata .tdata.* .gnu.linkonce.td.*) - _TLS_Data_end = .; - } > REGION_RODATA AT > REGION_RODATA_LOAD - .tbss : { - _TLS_BSS_begin = .; - *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) - _TLS_BSS_end = .; - } > REGION_RODATA AT > REGION_RODATA_LOAD - _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin; - _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin; - _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin; - _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin; - _TLS_Size = _TLS_BSS_end - _TLS_Data_begin; - _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss)); - .preinit_array : { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } > REGION_RODATA AT > REGION_RODATA_LOAD - .init_array : { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - } > REGION_RODATA AT > REGION_RODATA_LOAD - .fini_array : { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } > REGION_RODATA AT > REGION_RODATA_LOAD - .ctors : { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .dtors : { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .data.rel.ro : { - *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) - *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .jcr : { - KEEP (*(.jcr)) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .interp : { - *(.interp) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .note.gnu.build-id : { - *(.note.gnu.build-id) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .hash : { - *(.hash) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .gnu.hash : { - *(.gnu.hash) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .dynsym : { - *(.dynsym) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .dynstr : { - *(.dynstr) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .gnu.version : { - *(.gnu.version) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .gnu.version_d : { - *(.gnu.version_d) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .gnu.version_r : { - *(.gnu.version_r) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .rel.dyn : { - *(.rel.init) - *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) - *(.rel.fini) - *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) - *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) - *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) - *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) - *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) - *(.rel.ctors) - *(.rel.dtors) - *(.rel.got) - *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) - PROVIDE_HIDDEN (__rel_iplt_start = .); - *(.rel.iplt) - PROVIDE_HIDDEN (__rel_iplt_end = .); - PROVIDE_HIDDEN (__rela_iplt_start = .); - PROVIDE_HIDDEN (__rela_iplt_end = .); - } > REGION_RODATA AT > REGION_RODATA_LOAD - .rela.dyn : { - *(.rela.init) - *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) - *(.rela.fini) - *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) - *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) - *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) - *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) - *(.rela.ctors) - *(.rela.dtors) - *(.rela.got) - *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) - PROVIDE_HIDDEN (__rel_iplt_start = .); - PROVIDE_HIDDEN (__rel_iplt_end = .); - PROVIDE_HIDDEN (__rela_iplt_start = .); - *(.rela.iplt) - PROVIDE_HIDDEN (__rela_iplt_end = .); - } > REGION_RODATA AT > REGION_RODATA_LOAD - .rel.plt : { - *(.rel.plt) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .rela.plt : { - *(.rela.plt) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .plt : { - *(.plt) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .iplt : { - *(.iplt) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .dynamic : { - *(.dynamic) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .got : { - *(.got.plt) *(.igot.plt) *(.got) *(.igot) - } > REGION_RODATA AT > REGION_RODATA_LOAD - .rtemsroset : { - /* Special FreeBSD linker set sections */ - __start_set_sysctl_set = .; - *(set_sysctl_*); - __stop_set_sysctl_set = .; - *(set_domain_*); - *(set_pseudo_*); - - KEEP (*(SORT(.rtemsroset.*))) - . = ALIGN(8); - bsp_section_rodata_end = .; - } > REGION_RODATA AT > REGION_RODATA_LOAD - bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin; - bsp_section_rodata_load_begin = LOADADDR (.rodata); - bsp_section_rodata_load_end = bsp_section_rodata_load_begin + bsp_section_rodata_size; - - .rwbarrier : { - . = ALIGN(8); - . = ALIGN (bsp_section_rwbarrier_align); - } > REGION_DATA AT > REGION_DATA - -.data : { - . = ALIGN(8); - bsp_section_data_begin = .; - *(.data .data.* .gnu.linkonce.d.*) - SORT(CONSTRUCTORS) - } > REGION_DATA AT > REGION_DATA_LOAD - .data1 : { - *(.data1) - } > REGION_DATA AT > REGION_DATA_LOAD - .rtemsrwset : { - KEEP (*(SORT(.rtemsrwset.*))) - . = ALIGN(8); - bsp_section_data_end = .; - } > REGION_DATA AT > REGION_DATA_LOAD - bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin; - bsp_section_data_load_begin = LOADADDR (.data); - bsp_section_data_load_end = bsp_section_data_load_begin + bsp_section_data_size; - - .bss : { - . = ALIGN(8); - bsp_section_bss_begin = .; - *(.dynbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(8); - bsp_section_bss_end = .; - } > REGION_BSS AT > REGION_BSS - bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin; - - .rtemsstack (NOLOAD) : { - *(SORT(.rtemsstack.*)) - } > REGION_WORK AT > REGION_WORK - -.work : { - /* - * The work section will occupy the remaining REGION_WORK region and - * contains the RTEMS work space and heap. - */ - . = ALIGN(8); - bsp_section_work_begin = .; - . += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.); - . = ALIGN(8); - bsp_section_work_end = .; - } > REGION_WORK AT > REGION_WORK - bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin; - - .stack : { - . = ALIGN(8); - bsp_section_stack_begin = .; - . += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.); - . = ALIGN(8); - bsp_section_stack_end = .; - } > REGION_STACK AT > REGION_STACK - bsp_section_stack_size = bsp_section_stack_begin - bsp_section_stack_end; - - RamBase = ORIGIN (REGION_WORK); - RamSize = LENGTH (REGION_WORK); - RamEnd = RamBase + RamSize; - WorkAreaBase = bsp_section_work_begin; - HeapSize = 0; -} diff --git a/bsps/epiphany/epiphany_sim/start/start.S b/bsps/epiphany/epiphany_sim/start/start.S deleted file mode 100644 index c79d23dc86..0000000000 --- a/bsps/epiphany/epiphany_sim/start/start.S +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include - -EXTERN(bsp_section_bss_begin) -EXTERN(bsp_section_bss_end) -EXTERN(_ISR_Handler) -EXTERN(bsp_start_vector_table_end) -EXTERN(bsp_start_vector_table_size) -EXTERN(bsp_vector_table_size) -EXTERN(_ISR_Stack_area_end) - -PUBLIC(_EPIPHANY_Exception_default) -PUBLIC(bsp_start_vector_table_begin) -PUBLIC(_start) - -.section .vector, "wax" -TYPE_FUNC(_start) -SYM(_start): - .balign 4 ; - b .normal_start - - .balign 4 ; 0x4 - b .sw_exception - - .balign 4 ; 0x8 - b .normal_start - - .balign 4 ; 0xc - b .clock_isr - - .balign 4 ; 0x10 - b .timer1_isr - - .balign 4 ; 0x14 - b _EPIPHANY_Exception_default - - .balign 4 ; 0x18 - b _EPIPHANY_Exception_default - - .balign 4 ; 0x1c - b _EPIPHANY_Exception_default - - .balign 4 ; 0x20 - b _EPIPHANY_Exception_default - - .balign 4 ; 0x24 - b _EPIPHANY_Exception_default - -bsp_start_vector_table_begin: - .word .normal_start /* Reset */ - .word _EPIPHANY_Exception_default /* SW exception */ - .word _EPIPHANY_Exception_default /* Data Page Fault */ - .word _EPIPHANY_Exception_default /* Timer 0 */ - .word _EPIPHANY_Exception_default /* Timer 1 */ - .word _EPIPHANY_Exception_default /* Message int */ - .word _EPIPHANY_Exception_default /* DMA0 int */ - .word _EPIPHANY_Exception_default /* DMA1 int */ - .word _EPIPHANY_Exception_default /* WAND */ - .word _EPIPHANY_Exception_default /* User interrupt */ - -_bsp_start_vector_table_end: - -.size _start, .-_start - -.section .start,"ax" -.align 4 -.type _external_start, %function -.normal_start: - /* Initialize the stack and frame pointers */ - mov sp, %low(_ISR_Stack_area_end) - movt sp, %high(_ISR_Stack_area_end) - mov fp, sp - -cpu0: - /* Zero .bss section */ - mov r0, %low(bsp_section_bss_begin) - movt r0, %high(bsp_section_bss_begin) - mov r1, sp - mov r2,#0 - mov r3,#0 - -_bss_clear_loop: - strd r2, [r0], +#1 - sub r5, r1, r0 - bne _bss_clear_loop - - /* Clear the reset interrupt flag */ - mov r0, %low(_jump_to_c) - movt r0, %high(_jump_to_c) - movts iret, r0 - rti - -_jump_to_c: - /* Jump to bootcard */ - mov r3, %low(boot_card) - movt r3, %high(boot_card) - jalr r3 - - /* Should never reach here */ - idle - -.size .normal_start, .-.normal_start - -.balign 4 -.type .sw_exception, %function -.sw_exception: - idle - -.balign 4 -.type .clock_isr, %function -.clock_isr: - /* - * r62 and r63 are saved here, and restored from _ISR_Handler, they - * and hold vector number and _ISR_Handler address repsectively. - */ - add sp, sp, #-8 - str r62, [sp, #0] - str r63, [sp, #4] - mov r62, 3 - mov r63, %low(_ISR_Handler) - movt r63, %high(_ISR_Handler) - jr r6 - -.balign 4 -.type .timer1_isr, %function -.timer1_isr: - /* - * r62 and r63 are saved here, and restored from _ISR_Handler, they - * and hold vector number and _ISR_Handler address repsectively. - */ - add sp, sp, #-8 - str r62, [sp, 0] - str r63, [sp, 4] - mov r62, 4 - mov r63, %low(_ISR_Handler) - movt r63, %high(_ISR_Handler) - jr r63 - -.balign 4 -TYPE_FUNC(_EPIPHANY_Exception_default) -SYM(_EPIPHANY_Exception_default): - idle diff --git a/bsps/epiphany/headers.am b/bsps/epiphany/headers.am deleted file mode 100644 index 0ce8fb808b..0000000000 --- a/bsps/epiphany/headers.am +++ /dev/null @@ -1,5 +0,0 @@ -## This file was generated by "./boostrap -H". - -include_bspdir = $(includedir)/bsp -include_bsp_HEADERS = -include_bsp_HEADERS += ../../../../../bsps/epiphany/include/bsp/linker-symbols.h diff --git a/bsps/epiphany/include/bsp/linker-symbols.h b/bsps/epiphany/include/bsp/linker-symbols.h deleted file mode 100644 index 1a3d88ec8a..0000000000 --- a/bsps/epiphany/include/bsp/linker-symbols.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef LIBBSP_EPIPHANY_SHARED_LINKER_SYMBOLS_H -#define LIBBSP_EPIPHANY_SHARED_LINKER_SYMBOLS_H - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup epiphany_linker Linker Support - * - * @ingroup RTEMSBSPsEpiphanyShared - * - * @brief Linker support. - * - * @{ - */ - -#ifndef ASM - #define LINKER_SYMBOL(sym) extern char sym []; -#else - #define LINKER_SYMBOL(sym) .extern sym -#endif - -LINKER_SYMBOL(bsp_section_start_begin) -LINKER_SYMBOL(bsp_section_start_end) -LINKER_SYMBOL(bsp_section_start_size) - -LINKER_SYMBOL(bsp_section_vector_begin) -LINKER_SYMBOL(bsp_section_vector_end) -LINKER_SYMBOL(bsp_section_vector_size) - -LINKER_SYMBOL(bsp_section_text_begin) -LINKER_SYMBOL(bsp_section_text_end) -LINKER_SYMBOL(bsp_section_text_size) -LINKER_SYMBOL(bsp_section_text_load_begin) -LINKER_SYMBOL(bsp_section_text_load_end) - -LINKER_SYMBOL(bsp_section_rodata_begin) -LINKER_SYMBOL(bsp_section_rodata_end) -LINKER_SYMBOL(bsp_section_rodata_size) -LINKER_SYMBOL(bsp_section_rodata_load_begin) -LINKER_SYMBOL(bsp_section_rodata_load_end) - -LINKER_SYMBOL(bsp_section_data_begin) -LINKER_SYMBOL(bsp_section_data_end) -LINKER_SYMBOL(bsp_section_data_size) -LINKER_SYMBOL(bsp_section_data_load_begin) -LINKER_SYMBOL(bsp_section_data_load_end) - -LINKER_SYMBOL(bsp_section_bss_begin) -LINKER_SYMBOL(bsp_section_bss_end) -LINKER_SYMBOL(bsp_section_bss_size) - -LINKER_SYMBOL(bsp_section_work_begin) -LINKER_SYMBOL(bsp_section_work_end) -LINKER_SYMBOL(bsp_section_work_size) - -LINKER_SYMBOL(bsp_section_stack_begin) -LINKER_SYMBOL(bsp_section_stack_end) -LINKER_SYMBOL(bsp_section_stack_size) - -LINKER_SYMBOL(bsp_vector_table_begin) -LINKER_SYMBOL(bsp_vector_table_end) -LINKER_SYMBOL(bsp_vector_table_size) - -LINKER_SYMBOL(bsp_start_vector_table_begin) -LINKER_SYMBOL(bsp_start_vector_table_end) -LINKER_SYMBOL(bsp_start_vector_table_size) - -LINKER_SYMBOL(bsp_translation_table_base) -LINKER_SYMBOL(bsp_translation_table_end) - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_EPIPHANY_SHARED_LINKER_SYMBOLS_H */ diff --git a/bsps/epiphany/shared/doxygen.h b/bsps/epiphany/shared/doxygen.h deleted file mode 100644 index 2c33073078..0000000000 --- a/bsps/epiphany/shared/doxygen.h +++ /dev/null @@ -1,15 +0,0 @@ -/** - * @defgroup RTEMSBSPsEpiphany Epiphany - * - * @ingroup RTEMSBSPs - * - * @brief Epiphany Board Support Packages. - */ - -/** - * @defgroup RTEMSBSPsEpiphanyShared Shared - * - * @ingroup RTEMSBSPsEpiphany - * - * @brief Shared Support for Epiphany Board Support Packages. - */ diff --git a/c/src/aclocal/check-networking.m4 b/c/src/aclocal/check-networking.m4 index dcf467d2ed..24210baed8 100644 --- a/c/src/aclocal/check-networking.m4 +++ b/c/src/aclocal/check-networking.m4 @@ -7,11 +7,6 @@ AC_REQUIRE([RTEMS_INCLUDES])dnl AC_CACHE_CHECK([whether BSP supports networking], rtems_cv_HAS_NETWORKING, [dnl - case "$RTEMS_CPU" in - # do not have address space to hold BSD TCP/IP stack - epiphany*) - rtems_cv_HAS_NETWORKING="no" - ;; # Newer architecture ports that should only use new TCP/IP stack x86_64*) rtems_cv_HAS_NETWORKING="no" diff --git a/c/src/aclocal/rtems-cpu-subdirs.m4 b/c/src/aclocal/rtems-cpu-subdirs.m4 index 47bd33945c..7805f892dd 100644 --- a/c/src/aclocal/rtems-cpu-subdirs.m4 +++ b/c/src/aclocal/rtems-cpu-subdirs.m4 @@ -12,7 +12,6 @@ AC_DEFUN([RTEMS_CPU_SUBDIRS], case $RTEMS_CPU in _RTEMS_CPU_SUBDIR([arm],[$1]);; _RTEMS_CPU_SUBDIR([bfin],[$1]);; -_RTEMS_CPU_SUBDIR([epiphany],[$1]);; _RTEMS_CPU_SUBDIR([i386],[$1]);; _RTEMS_CPU_SUBDIR([lm32],[$1]);; _RTEMS_CPU_SUBDIR([m68k],[$1]);; diff --git a/c/src/lib/libbsp/epiphany/Makefile.am b/c/src/lib/libbsp/epiphany/Makefile.am deleted file mode 100644 index c024c4d01c..0000000000 --- a/c/src/lib/libbsp/epiphany/Makefile.am +++ /dev/null @@ -1,7 +0,0 @@ -ACLOCAL_AMFLAGS = -I ../../../aclocal -## Descend into the @RTEMS_BSP_FAMILY@ directory -## Currently, the shared directory is not explicitly -## added but it is present in the source tree. -_SUBDIRS = @RTEMS_BSP_FAMILY@ -include $(top_srcdir)/../../../automake/subdirs.am -include $(srcdir)/../../../../../bsps/epiphany/headers.am diff --git a/c/src/lib/libbsp/epiphany/acinclude.m4 b/c/src/lib/libbsp/epiphany/acinclude.m4 deleted file mode 100644 index 0fe1e2e79d..0000000000 --- a/c/src/lib/libbsp/epiphany/acinclude.m4 +++ /dev/null @@ -1,10 +0,0 @@ -# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY) -AC_DEFUN([RTEMS_CHECK_BSPDIR], -[ - case "$1" in - epiphany_sim ) - AC_CONFIG_SUBDIRS([epiphany_sim]);; - *) - AC_MSG_ERROR([Invalid BSP]);; - esac -]) diff --git a/c/src/lib/libbsp/epiphany/configure.ac b/c/src/lib/libbsp/epiphany/configure.ac deleted file mode 100644 index 35b39b9bdd..0000000000 --- a/c/src/lib/libbsp/epiphany/configure.ac +++ /dev/null @@ -1,20 +0,0 @@ -# Process this file with autoconf to produce a configure script. - -AC_PREREQ([2.69]) -AC_INIT([rtems-c-src-lib-libbsp-epiphany],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) -RTEMS_TOP(../../../../..) -RTEMS_SOURCE_TOP -RTEMS_BUILD_TOP - -RTEMS_CANONICAL_TARGET_CPU -AM_INIT_AUTOMAKE([no-define foreign subdir-objects 1.12.2]) -AM_MAINTAINER_MODE - -RTEMS_ENV_RTEMSBSP -RTEMS_PROJECT_ROOT - -RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY]) - -# Explicitly list all Makefiles here -AC_CONFIG_FILES([Makefile]) -AC_OUTPUT diff --git a/c/src/lib/libbsp/epiphany/epiphany_sim/Makefile.am b/c/src/lib/libbsp/epiphany/epiphany_sim/Makefile.am deleted file mode 100644 index f4901fd764..0000000000 --- a/c/src/lib/libbsp/epiphany/epiphany_sim/Makefile.am +++ /dev/null @@ -1,66 +0,0 @@ -## -# -# @brief Makefile of LibBSP for the Epiphany simulator. -# -# -ACLOCAL_AMFLAGS = -I ../../../../aclocal - -include $(top_srcdir)/../../../../automake/compile.am -include $(top_srcdir)/../../bsp.am - -dist_project_lib_DATA = ../../../../../../bsps/epiphany/epiphany_sim/start/bsp_specs - -############################################################################### -# Header # -############################################################################### - -############################################################################### -# Data # -############################################################################### - -start.$(OBJEXT): ../../../../../../bsps/epiphany/epiphany_sim/start/start.S - $(CPPASCOMPILE) -o $@ -c $< -project_lib_DATA = start.$(OBJEXT) - -project_lib_DATA += linkcmds - -############################################################################### -# LibBSP # -############################################################################### - -project_lib_LIBRARIES = librtemsbsp.a - -# Startup -librtemsbsp_a_SOURCES = ../../../../../../bsps/shared/start/bspreset-empty.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspstart-empty.c - -# Shared -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/getentropy/getentropy-cpucounter.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspfatal-default.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/sbrk.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/stackalloc.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspgetworkarea-default.c - -# clock -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/clock/clock-simidle.c - -# Timer -librtemsbsp_a_SOURCES += ../../../../../../bsps/epiphany/epiphany_sim/btimer/btimer.c - -# console -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-polled.c - -# IRQ -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/epiphany/epiphany_sim/irq/irq.c - -# Cache -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c - -# debugio -librtemsbsp_a_SOURCES += ../../../../../../bsps/epiphany/epiphany_sim/console/console-io.c - - -include $(srcdir)/../../../../../../bsps/shared/irq-sources.am -include $(srcdir)/../../../../../../bsps/shared/shared-sources.am -include $(srcdir)/../../../../../../bsps/epiphany/epiphany_sim/headers.am diff --git a/c/src/lib/libbsp/epiphany/epiphany_sim/configure.ac b/c/src/lib/libbsp/epiphany/epiphany_sim/configure.ac deleted file mode 100644 index 8d5f787133..0000000000 --- a/c/src/lib/libbsp/epiphany/epiphany_sim/configure.ac +++ /dev/null @@ -1,32 +0,0 @@ -## -# -# @file -# -# @brief Configure script of LibBSP for epiphany_sim BSP. -# - -AC_PREREQ(2.69) -AC_INIT([rtems-c-src-lib-libbsp-epiphany-sim],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) -RTEMS_TOP(../../../../../..) -RTEMS_SOURCE_TOP -RTEMS_BUILD_TOP -RTEMS_BSP_LINKCMDS - -RTEMS_CANONICAL_TARGET_CPU -AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) -RTEMS_BSP_CONFIGURE - -RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[]) -RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP -start]) - -RTEMS_BSPOPTS_SET([BSP_EPIPHANY_PERIPHCLK],[*],[100000000U]) -RTEMS_BSPOPTS_HELP([BSP_EPIPHANY_PERIPHCLK],[epiphany PERIPHCLK clock -frequency in Hz]) - - - -RTEMS_BSP_CLEANUP_OPTIONS - -AC_CONFIG_FILES([Makefile]) -AC_OUTPUT diff --git a/cpukit/Makefile.am b/cpukit/Makefile.am index 51f38c84c7..abf18d176f 100644 --- a/cpukit/Makefile.am +++ b/cpukit/Makefile.am @@ -1591,19 +1591,6 @@ librtemscpu_a_SOURCES += score/cpu/no_cpu/cpucounterread.c endif -if CPU_EPIPHANY - -include $(srcdir)/score/cpu/epiphany/headers.am - -librtemscpu_a_SOURCES += score/cpu/epiphany/cpu.c -librtemscpu_a_SOURCES += score/cpu/epiphany/epiphany-context-initialize.c -librtemscpu_a_SOURCES += score/cpu/epiphany/epiphany-context-switch.S -librtemscpu_a_SOURCES += score/cpu/epiphany/epiphany-exception-handler.S -librtemscpu_a_SOURCES += score/cpu/epiphany/setjmp.S -librtemscpu_a_SOURCES += score/cpu/no_cpu/cpucounterfrequency.c - -endif - if CPU_I386 include $(srcdir)/score/cpu/i386/headers.am diff --git a/cpukit/aclocal/check-networking.m4 b/cpukit/aclocal/check-networking.m4 index 38bc844468..7f38875dc6 100644 --- a/cpukit/aclocal/check-networking.m4 +++ b/cpukit/aclocal/check-networking.m4 @@ -9,10 +9,6 @@ AC_CACHE_CHECK([whether CPU supports networking], rtems_cv_HAS_NETWORKING, [dnl case "$host" in - # do not have address space to hold BSD TCP/IP stack - epiphany*) - rtems_cv_HAS_NETWORKING="no" - ;; # Newer architecture ports that should only use new TCP/IP stack x86_64*) rtems_cv_HAS_NETWORKING="no" diff --git a/cpukit/configure.ac b/cpukit/configure.ac index 34b94a047c..16213d977c 100644 --- a/cpukit/configure.ac +++ b/cpukit/configure.ac @@ -359,7 +359,6 @@ AC_MSG_RESULT([$HAVE_LIBDRVMGR]) AM_CONDITIONAL([CPU_ARM],[test $RTEMS_CPU = "arm"]) AM_CONDITIONAL([CPU_BFIN],[test $RTEMS_CPU = "bfin"]) -AM_CONDITIONAL([CPU_EPIPHANY],[test $RTEMS_CPU = "epiphany"]) AM_CONDITIONAL([CPU_I386],[test $RTEMS_CPU = "i386"]) AM_CONDITIONAL([CPU_LM32],[test $RTEMS_CPU = "lm32"]) AM_CONDITIONAL([CPU_M68K],[test $RTEMS_CPU = "m68k"]) diff --git a/cpukit/score/cpu/epiphany/cpu.c b/cpukit/score/cpu/epiphany/cpu.c deleted file mode 100644 index d025d92a6e..0000000000 --- a/cpukit/score/cpu/epiphany/cpu.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Epiphany CPU Dependent Source - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -void _init(void); -void _fini(void); - -void _init(void) -{ -} - -void _fini(void) -{ -} - -void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx) -{ - /* Do nothing */ -} -/** - * @brief Performs processor dependent initialization. - */ -void _CPU_Initialize(void) -{ - /* Do nothing */ -} - -void _CPU_ISR_Set_level(uint32_t level) -{ - /* Do nothing */ -} - -uint32_t _CPU_ISR_Get_level( void ) -{ - /* Do nothing */ - return 0; -} - -CPU_Counter_ticks _CPU_Counter_read( void ) -{ - static CPU_Counter_ticks counter; - - CPU_Counter_ticks snapshot; - - snapshot = counter; - counter = snapshot + 1; - - return snapshot; -} - -void *_CPU_Thread_Idle_body( uintptr_t ignored ) -{ - do { - __asm__ __volatile__ ("idle"); - } while (1); - - return NULL; -} diff --git a/cpukit/score/cpu/epiphany/epiphany-context-initialize.c b/cpukit/score/cpu/epiphany/epiphany-context-initialize.c deleted file mode 100644 index c43d502029..0000000000 --- a/cpukit/score/cpu/epiphany/epiphany-context-initialize.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * COPYRIGHT (c) 1989-2006. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include - -#include -#include - -void _CPU_Context_Initialize( - Context_Control *context, - void *stack_area_begin, - size_t stack_area_size, - uint32_t new_level, - void (*entry_point)( void ), - bool is_fp, - void *tls_area -) -{ - uintptr_t stack = ((uintptr_t) stack_area_begin); - uint32_t sr, iret; - - /* Account for red-zone */ - uintptr_t stack_high = stack + stack_area_size - EPIPHANY_GCC_RED_ZONE_SIZE; - - asm volatile ("movfs %0, status \n" : "=r" (sr):); - asm volatile ("movfs %0, iret \n" : "=r" (iret):); - - memset(context, 0, sizeof(*context)); - - context->r[11] = stack_high; - context->r[13] = stack_high; - context->r[14] = (uintptr_t) entry_point; - context->status = sr; - context->iret = iret; -} diff --git a/cpukit/score/cpu/epiphany/epiphany-context-switch.S b/cpukit/score/cpu/epiphany/epiphany-context-switch.S deleted file mode 100644 index 8c530651c3..0000000000 --- a/cpukit/score/cpu/epiphany/epiphany-context-switch.S +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Epiphany CPU Dependent Source - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include - -.section .text,"ax" -.align 4 - -PUBLIC(_CPU_Context_switch) -PUBLIC(_CPU_Context_restore) -PUBLIC(_CPU_Context_restore_fp) -PUBLIC(_CPU_Context_save_fp) - -SYM(_CPU_Context_switch): - /* Disable interrupts and store all registers */ - gid - - str r0, [r0] - str r1, [r0,1] - str r2, [r0,2] - str r3, [r0,3] - str r4, [r0,4] - str r5, [r0,5] - str r6, [r0,6] - str r7, [r0,7] - str r8, [r0,8] - str r9, [r0,9] - str r10, [r0,10] - str fp, [r0,11] - str r12, [r0,12] - str sp, [r0,13] - str lr, [r0,14] - str r15, [r0,15] - str r16, [r0,16] - str r17, [r0,17] - str r18, [r0,18] - str r19, [r0,19] - str r20, [r0,20] - str r21, [r0,21] - str r22, [r0,22] - str r23, [r0,23] - str r24, [r0,24] - str r25, [r0,25] - str r26, [r0,26] - str r27, [r0,27] - str r28, [r0,28] - str r29, [r0,29] - str r30, [r0,30] - str r31, [r0,31] - str r32, [r0,32] - str r33, [r0,33] - str r34, [r0,34] - str r35, [r0,35] - str r36, [r0,36] - str r37, [r0,37] - str r38, [r0,38] - str r39, [r0,39] - str r40, [r0,40] - str r41, [r0,41] - str r42, [r0,42] - str r43, [r0,43] - str r44, [r0,44] - str r45, [r0,45] - str r46, [r0,46] - str r47, [r0,47] - str r48, [r0,48] - str r49, [r0,49] - str r50, [r0,50] - str r51, [r0,51] - str r52, [r0,52] - str r53, [r0,53] - str r54, [r0,54] - str r55, [r0,55] - str r56, [r0,56] - str r57, [r0,57] - str r58, [r0,58] - str r59, [r0,59] - str r60, [r0,60] - str r61, [r0,61] - str r62, [r0,62] - str r63, [r0,63] - - /* Store status register */ - movfs r27, status - str r27, [r0,64] - - /* Store config register */ - movfs r27, config - str r27, [r0,65] - - /* Store interrupt return address register */ - movfs r27, iret - str r27, [r0,66] - -.Lrestore: - - /* r1 contains buffer address, skip it */ - ldr r2, [r1,2] - ldr r3, [r1,3] - ldr r4, [r1,4] - ldr r5, [r1,5] - ldr r6, [r1,6] - ldr r7, [r1,7] - ldr r8, [r1,8] - ldr r9, [r1,9] - ldr r10, [r1,10] - ldr fp, [r1,11] - ldr r12, [r1,12] - ldr sp, [r1,13] - ldr lr, [r1,14] - ldr r15, [r1,15] - ldr r16, [r1,16] - ldr r17, [r1,17] - ldr r18, [r1,18] - ldr r19, [r1,19] - ldr r20, [r1,20] - ldr r21, [r1,21] - ldr r22, [r1,22] - ldr r23, [r1,23] - ldr r24, [r1,24] - ldr r25, [r1,25] - ldr r26, [r1,26] - ldr r27, [r1,27] - ldr r32, [r1,32] - ldr r33, [r1,33] - ldr r34, [r1,34] - ldr r35, [r1,35] - ldr r36, [r1,36] - ldr r37, [r1,37] - ldr r38, [r1,38] - ldr r39, [r1,39] - ldr r40, [r1,40] - ldr r41, [r1,41] - ldr r42, [r1,42] - ldr r43, [r1,43] - ldr r44, [r1,44] - ldr r45, [r1,45] - ldr r46, [r1,46] - ldr r47, [r1,47] - ldr r48, [r1,48] - ldr r49, [r1,49] - ldr r50, [r1,50] - ldr r51, [r1,51] - ldr r52, [r1,52] - ldr r53, [r1,53] - ldr r54, [r1,54] - ldr r55, [r1,55] - ldr r56, [r1,56] - ldr r57, [r1,57] - ldr r58, [r1,58] - ldr r59, [r1,59] - ldr r60, [r1,60] - ldr r61, [r1,61] - ldr r62, [r1,62] - ldr r63, [r1,63] - - /* Load status register */ - ldr r0, [r1,64] - movts status, r0 - - /* Load config register */ - ldr r0, [r1,65] - movts config, r0 - - /* Load interrupt return address register */ - ldr r0,[r1,66] - movts iret, r0 - - ldr r0,[r1] - ldr r1,[r1,1] - - /* Enable interrupts and return */ - gie - jr lr - -SYM(_CPU_Context_restore): - mov r1, r0 - b .Lrestore - nop - -/* No FP support for Epiphany yet */ -SYM(_CPU_Context_restore_fp): - nop - - SYM(_CPU_Context_save_fp): - nop diff --git a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S deleted file mode 100644 index f4fd1d1ff9..0000000000 --- a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S +++ /dev/null @@ -1,304 +0,0 @@ -/** - * @file - * - * @addtogroup RTEMSScoreCPU - * - * @brief Epiphany exception support implementation. - */ - -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include - -#include -#include - -EXTERN(bsp_start_vector_table_begin) -EXTERN(_Thread_Dispatch) -PUBLIC(_ISR_Handler) - -.section .text, "ax" -.align 4 -TYPE_FUNC(_ISR_Handler) -SYM(_ISR_Handler): - /* Reserve space for CPU_Exception_frame */ - sub sp, sp, #(CPU_EXCEPTION_FRAME_SIZE) - - str r0, [sp] - str r1, [sp,1] - str r2, [sp,2] - str r3, [sp,3] - str r4, [sp,4] - str r5, [sp,5] - str r6, [sp,6] - str r7, [sp,7] - str r8, [sp,8] - str r9, [sp,9] - str r10, [sp,10] - str fp, [sp,11] - str r12, [sp,12] - - /* Save interrupted task stack pointer */ - add r1, sp, #(CPU_EXCEPTION_FRAME_SIZE + 8) - str r1,[sp,13] - - str lr, [sp,14] - str r15, [sp,15] - str r16, [sp,16] - str r17, [sp,17] - str r18, [sp,18] - str r19, [sp,19] - str r20, [sp,20] - str r21, [sp,21] - str r22, [sp,22] - str r23, [sp,23] - str r24, [sp,24] - str r25, [sp,25] - str r26, [sp,26] - str r27, [sp,27] - str r28, [sp,28] - str r29, [sp,29] - str r30, [sp,30] - str r31, [sp,31] - str r32, [sp,32] - str r33, [sp,33] - str r34, [sp,34] - str r35, [sp,35] - str r36, [sp,36] - str r37, [sp,37] - str r38, [sp,38] - str r39, [sp,39] - str r40, [sp,40] - str r41, [sp,41] - str r42, [sp,42] - str r43, [sp,43] - str r44, [sp,44] - str r45, [sp,45] - str r46, [sp,46] - str r47, [sp,47] - str r48, [sp,48] - str r49, [sp,49] - str r50, [sp,50] - str r51, [sp,51] - str r52, [sp,52] - str r53, [sp,53] - str r54, [sp,54] - str r55, [sp,55] - str r56, [sp,56] - str r57, [sp,57] - str r58, [sp,58] - str r59, [sp,59] - str r60, [sp,60] - str r61, [sp,61] - /* r62 and r63 are saved from start.S interrupt entry - * and hold vector number and _ISR_Handler address repsectively. - */ - - /* Save status register */ - movfs r1,status - str r1, [sp,62] - - /* Save config register */ - movfs r1,config - str r1, [sp,63] - - /* Save interrupt return address register */ - movfs r1,iret - str r1, [sp,64] - - mov r33, %low(_Per_CPU_Information) - movt r33, %high(_Per_CPU_Information) - - add r6, r33, #(PER_CPU_ISR_NEST_LEVEL) - add r8, r33, #(PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL) - - /* Increment nesting level and disable thread dispatch */ - ldr r5, [r6] - ldr r7, [r8] - add r5, r5, #1 - add r7, r7, #1 - str r5, [r6] - str r7, [r8] - - /* Keep sp (Exception frame address) in r32 - Callee saved */ - mov r32, sp - - /* Keep _Per_CPU_Information address in r33 - Callee saved */ - mov r33, r18 - - /* Call the exception handler from vector table. - * First function arg for C handler is vector number, - * and the second is a pointer to exception frame. - */ - mov r0, r62 - mov r1, sp - - mov r27, r62 - lsl r27, r27, #2 - mov r26, %low(bsp_start_vector_table_begin) - movt r15, #0 - add r27, r27, r26 - ldr r27, [r27] - - /* Do not switch stacks if we are in a nested interrupt. At - * this point r5 should be holding ISR_NEST_LEVEL value. - */ - sub r37, r5, #1 - bgtu jump_to_c_handler - - /* Switch to RTEMS dedicated interrupt stack */ - add sp, r18, #(PER_CPU_INTERRUPT_STACK_HIGH) - ldr sp, [sp] - -jump_to_c_handler: - jalr r27 - - /* Switch back to the interrupted task stack */ - mov sp, r32 - - /* Get the address of _Per_CPU_Information */ - mov r18, r33 - - /* Decrement nesting level and enable multitasking */ - add r6, r18, #(PER_CPU_ISR_NEST_LEVEL) - add r8, r18, #(PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL) - - ldr r5, [r6] - ldr r7, [r8] - sub r5, r5, #1 - sub r7, r7, #1 - str r5, [r6] - str r7, [r8] - - /* Check if _ISR_Nest_level > 0 */ - sub r37, r5, #0 - bgtu exception_frame_restore - - /* Check if _Thread_Dispatch_disable_level > 0 */ - sub r37, r7, #0 - bgtu exception_frame_restore - - /* Check if dispatch needed */ - add r31, r18, #(PER_CPU_DISPATCH_NEEDED) - ldr r31, [r31] - - sub r35, r31, #0 - beq exception_frame_restore - - mov r35, %low(_Thread_Dispatch) - movt r35, %high(_Thread_Dispatch) - jalr r35 - -exception_frame_restore: - - ldr r1, [sp,1] - ldr r2, [sp,2] - ldr r3, [sp,3] - ldr r4, [sp,4] - ldr r5, [sp,5] - ldr r6, [sp,6] - ldr r7, [sp,7] - ldr r8, [sp,8] - ldr r9, [sp,9] - ldr r10, [sp,10] - ldr fp, [sp,11] - ldr r12, [sp,12] - ldr lr, [sp,14] - ldr r15, [sp,15] - ldr r16, [sp,16] - ldr r17, [sp,17] - ldr r18, [sp,18] - ldr r19, [sp,19] - ldr r20, [sp,20] - ldr r21, [sp,21] - ldr r22, [sp,22] - ldr r23, [sp,23] - ldr r24, [sp,24] - ldr r25, [sp,25] - ldr r26, [sp,26] - ldr r27, [sp,27] - ldr r28, [sp,28] - ldr r29, [sp,29] - ldr r30, [sp,30] - ldr r31, [sp,31] - ldr r32, [sp,32] - ldr r34, [sp,34] - ldr r36, [sp,36] - ldr r38, [sp,38] - ldr r39, [sp,39] - ldr r40, [sp,40] - ldr r41, [sp,41] - ldr r42, [sp,42] - ldr r43, [sp,43] - ldr r44, [sp,44] - ldr r45, [sp,45] - ldr r46, [sp,46] - ldr r47, [sp,47] - ldr r48, [sp,48] - ldr r49, [sp,49] - ldr r50, [sp,50] - ldr r51, [sp,51] - ldr r52, [sp,52] - ldr r53, [sp,53] - ldr r54, [sp,54] - ldr r55, [sp,55] - ldr r56, [sp,56] - ldr r57, [sp,57] - ldr r58, [sp,58] - ldr r59, [sp,59] - ldr r60, [sp,60] - ldr r61, [sp,61] - - /* Restore status register */ - ldr r0,[sp,62] - movts status, r0 - - /* Restore config register */ - ldr r0, [sp,63] - movts config, r0 - - /* Restore interrupt return address register */ - ldr r0, [sp,64] - movts iret, r0 - - ldr r0,[sp] - - /* Restore interrupted task's stack pointer */ - ldr sp, [sp,13] - - /* r62 and r63 are saved from start.S interrupt entry - * and hold vector number and _ISR_Handler address repsectively. - */ - ldr r62, [sp, -8] - ldr r63, [sp, -4] - - /* return from interrupt */ - rti diff --git a/cpukit/score/cpu/epiphany/headers.am b/cpukit/score/cpu/epiphany/headers.am deleted file mode 100644 index d5ba2394d9..0000000000 --- a/cpukit/score/cpu/epiphany/headers.am +++ /dev/null @@ -1,8 +0,0 @@ -## This file was generated by "./boostrap -H". -include_rtems_HEADERS += score/cpu/epiphany/include/rtems/asm.h -include_rtems_score_HEADERS += score/cpu/epiphany/include/rtems/score/cpu.h -include_rtems_score_HEADERS += score/cpu/epiphany/include/rtems/score/cpu_asm.h -include_rtems_score_HEADERS += score/cpu/epiphany/include/rtems/score/cpuatomic.h -include_rtems_score_HEADERS += score/cpu/epiphany/include/rtems/score/cpuimpl.h -include_rtems_score_HEADERS += score/cpu/epiphany/include/rtems/score/epiphany-utility.h -include_rtems_score_HEADERS += score/cpu/epiphany/include/rtems/score/epiphany.h diff --git a/cpukit/score/cpu/epiphany/include/rtems/asm.h b/cpukit/score/cpu/epiphany/include/rtems/asm.h deleted file mode 100644 index 219ed81846..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/asm.h +++ /dev/null @@ -1,120 +0,0 @@ -/** - * @file - * - * This include file attempts to address the problems - * caused by incompatible flavors of assemblers and - * toolsets. It primarily addresses variations in the - * use of leading underscores on symbols and the requirement - * that register names be preceded by a %. - */ - -/* - * NOTE: The spacing in the use of these macros - * is critical to them working as advertised. - * - * This file is based on similar code found in newlib available - * from ftp.cygnus.com. The file which was used had no copyright - * notice. This file is freely distributable as long as the source - * of the file is noted. This file is: - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * - * COPYRIGHT (c) 1994-1997. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __EPIPHANY_ASM_H -#define __EPIPHANY_ASM_H - -/* - * Indicate we are in an assembly file and get the basic CPU definitions. - */ - -#ifndef ASM -#define ASM -#endif -#include -#include - -/* - * Recent versions of GNU cpp define variables which indicate the - * need for underscores and percents. If not using GNU cpp or - * the version does not support this, then you will obviously - * have to define these as appropriate. - */ - -#ifndef __USER_LABEL_PREFIX__ -#define __USER_LABEL_PREFIX__ _ -#endif - -#ifndef __REGISTER_PREFIX__ -#define __REGISTER_PREFIX__ -#endif - -/* ANSI concatenation macros. */ - -#define CONCAT1(a, b) CONCAT2(a, b) -#define CONCAT2(a, b) a ## b - -/* Use the right prefix for global labels. */ - -#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x) - -/* Use the right prefix for registers. */ - -#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) - -/* - * define macros for all of the registers on this CPU - * - * EXAMPLE: #define d0 REG (d0) - */ - -/* - * Define macros to handle section beginning and ends. - */ -#define BEGIN_CODE_DCL .text -#define END_CODE_DCL -#define BEGIN_DATA_DCL .data -#define END_DATA_DCL -#define BEGIN_CODE .text -#define END_CODE -#define BEGIN_DATA -#define END_DATA -#define BEGIN_BSS -#define END_BSS -#define END - -/* - * Following must be tailor for a particular flavor of the C compiler. - * They may need to put underscores in front of the symbols. - */ - -#define PUBLIC(sym) .global SYM (sym) -#define EXTERN(sym) .extern SYM (sym) -#define TYPE_FUNC(sym) .type SYM (sym), %function - -#endif diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h deleted file mode 100644 index 70a9790606..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h +++ /dev/null @@ -1,614 +0,0 @@ -/** - * @file - */ - -/* - * - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _EPIPHANY_CPU_H -#define _EPIPHANY_CPU_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include /* pick up machine definitions */ -#ifndef ASM -#include -#include -#include /* for printk */ -#endif - -/** - * @addtogroup RTEMSScoreCPUEpiphany - */ -/**@{**/ - -/* conditional compilation parameters */ - -/* - * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector - * number (0)? - * - */ - -#define CPU_ISR_PASSES_FRAME_POINTER TRUE - -#define CPU_HARDWARE_FP FALSE - -#define CPU_SOFTWARE_FP FALSE - -#define CPU_ALL_TASKS_ARE_FP FALSE - -#define CPU_IDLE_TASK_IS_FP FALSE - -#define CPU_USE_DEFERRED_FP_SWITCH FALSE - -#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE - -/* - * Does the stack grow up (toward higher addresses) or down - * (toward lower addresses)? - * - * If TRUE, then the grows upward. - * If FALSE, then the grows toward smaller addresses. - * - */ - -#define CPU_STACK_GROWS_UP FALSE - -/* FIXME: Is this the right value? */ -#define CPU_CACHE_LINE_BYTES 64 - -#define CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED( CPU_CACHE_LINE_BYTES ) - -/* - * The following defines the number of bits actually used in the - * interrupt field of the task mode. How those bits map to the - * CPU interrupt levels is defined by the routine _CPU_ISR_Set_level(). - * - */ - -#define CPU_MODES_INTERRUPT_MASK 0x00000001 - -/* - * Processor defined structures required for cpukit/score. - */ - -/* - * Contexts - * - * Generally there are 2 types of context to save. - * 1. Interrupt registers to save - * 2. Task level registers to save - * - * This means we have the following 3 context items: - * 1. task level context stuff:: Context_Control - * 2. floating point task stuff:: Context_Control_fp - * 3. special interrupt level context :: Context_Control_interrupt - * - * On some processors, it is cost-effective to save only the callee - * preserved registers during a task context switch. This means - * that the ISR code needs to save those registers which do not - * persist across function calls. It is not mandatory to make this - * distinctions between the caller/callee saves registers for the - * purpose of minimizing context saved during task switch and on interrupts. - * If the cost of saving extra registers is minimal, simplicity is the - * choice. Save the same context on interrupt entry as for tasks in - * this case. - * - * Additionally, if gdb is to be made aware of RTEMS tasks for this CPU, then - * care should be used in designing the context area. - * - * On some CPUs with hardware floating point support, the Context_Control_fp - * structure will not be used or it simply consist of an array of a - * fixed number of bytes. This is done when the floating point context - * is dumped by a "FP save context" type instruction and the format - * is not really defined by the CPU. In this case, there is no need - * to figure out the exact format -- only the size. Of course, although - * this is enough information for RTEMS, it is probably not enough for - * a debugger such as gdb. But that is another problem. - * - * - */ -#ifndef ASM - -typedef struct { - uint32_t r[64]; - - uint32_t status; - uint32_t config; - uint32_t iret; - -#ifdef RTEMS_SMP - /** - * @brief On SMP configurations the thread context must contain a boolean - * indicator to signal if this context is executing on a processor. - * - * This field must be updated during a context switch. The context switch - * to the heir must wait until the heir context indicates that it is no - * longer executing on a processor. The context switch must also check if - * a thread dispatch is necessary to honor updates of the heir thread for - * this processor. This indicator must be updated using an atomic test and - * set operation to ensure that at most one processor uses the heir - * context at the same time. - * - * @code - * void _CPU_Context_switch( - * Context_Control *executing, - * Context_Control *heir - * ) - * { - * save( executing ); - * - * executing->is_executing = false; - * memory_barrier(); - * - * if ( test_and_set( &heir->is_executing ) ) { - * do { - * Per_CPU_Control *cpu_self = _Per_CPU_Get_snapshot(); - * - * if ( cpu_self->dispatch_necessary ) { - * heir = _Thread_Get_heir_and_make_it_executing( cpu_self ); - * } - * } while ( test_and_set( &heir->is_executing ) ); - * } - * - * restore( heir ); - * } - * @endcode - */ - volatile bool is_executing; -#endif -} Context_Control; - -#define _CPU_Context_Get_SP( _context ) \ - (_context)->r[13] - -typedef Context_Control CPU_Interrupt_frame; - -/* - * Amount of extra stack (above minimum stack size) required by - * MPCI receive server thread. Remember that in a multiprocessor - * system this thread must exist and be able to process all directives. - * - */ - -#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 - -/* - * Should be large enough to run all RTEMS tests. This insures - * that a "reasonable" small application should not have any problems. - * - */ - -#define CPU_STACK_MINIMUM_SIZE 4096 - -/* - * CPU's worst alignment requirement for data types on a byte boundary. This - * alignment does not take into account the requirements for the stack. - * - */ - -#define CPU_ALIGNMENT 8 - -/* - * This is defined if the port has a special way to report the ISR nesting - * level. Most ports maintain the variable _ISR_Nest_level. - */ -#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE - -/* - * This number corresponds to the byte alignment requirement for the - * heap handler. This alignment requirement may be stricter than that - * for the data types alignment specified by CPU_ALIGNMENT. It is - * common for the heap to follow the same alignment requirement as - * CPU_ALIGNMENT. If the CPU_ALIGNMENT is strict enough for the heap, - * then this should be set to CPU_ALIGNMENT. - * - * NOTE: This does not have to be a power of 2 although it should be - * a multiple of 2 greater than or equal to 2. The requirement - * to be a multiple of 2 is because the heap uses the least - * significant field of the front and back flags to indicate - * that a block is in use or free. So you do not want any odd - * length blocks really putting length data in that bit. - * - * On byte oriented architectures, CPU_HEAP_ALIGNMENT normally will - * have to be greater or equal to than CPU_ALIGNMENT to ensure that - * elements allocated from the heap meet all restrictions. - * - */ - -#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT - -/* - * This number corresponds to the byte alignment requirement for the - * stack. This alignment requirement may be stricter than that for the - * data types alignment specified by CPU_ALIGNMENT. If the CPU_ALIGNMENT - * is strict enough for the stack, then this should be set to 0. - * - * NOTE: This must be a power of 2 either 0 or greater than CPU_ALIGNMENT. - * - */ - -#define CPU_STACK_ALIGNMENT 8 - -#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES - -/* ISR handler macros */ - -/* - * Support routine to initialize the RTEMS vector table after it is allocated. - * - * NO_CPU Specific Information: - * - * XXX document implementation including references if appropriate - */ - -#define _CPU_Initialize_vectors() - -/* - * Disable all interrupts for an RTEMS critical section. The previous - * level is returned in _level. - * - */ - -static inline uint32_t epiphany_interrupt_disable( void ) -{ - uint32_t sr; - __asm__ __volatile__ ("movfs %[sr], status \n" : [sr] "=r" (sr):); - __asm__ __volatile__("gid \n"); - return sr; -} - -static inline void epiphany_interrupt_enable(uint32_t level) -{ - __asm__ __volatile__("gie \n"); - __asm__ __volatile__ ("movts status, %[level] \n" :: [level] "r" (level):); -} - -#define _CPU_ISR_Disable( _level ) \ - _level = epiphany_interrupt_disable() - -/* - * Enable interrupts to the previous level (returned by _CPU_ISR_Disable). - * This indicates the end of an RTEMS critical section. The parameter - * _level is not modified. - * - */ - -#define _CPU_ISR_Enable( _level ) \ - epiphany_interrupt_enable( _level ) - -/* - * This temporarily restores the interrupt to _level before immediately - * disabling them again. This is used to divide long RTEMS critical - * sections into two or more parts. The parameter _level is not - * modified. - * - */ - -#define _CPU_ISR_Flash( _level ) \ - do{ \ - if ( (_level & 0x2) != 0 ) \ - _CPU_ISR_Enable( _level ); \ - epiphany_interrupt_disable(); \ - } while(0) - -RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) -{ - return ( level & 0x2 ) != 0; -} - -/* - * Map interrupt level in task mode onto the hardware that the CPU - * actually provides. Currently, interrupt levels which do not - * map onto the CPU in a generic fashion are undefined. Someday, - * it would be nice if these were "mapped" by the application - * via a callout. For example, m68k has 8 levels 0 - 7, levels - * 8 - 255 would be available for bsp/application specific meaning. - * This could be used to manage a programmable interrupt controller - * via the rtems_task_mode directive. - * - * The get routine usually must be implemented as a subroutine. - * - */ - -void _CPU_ISR_Set_level( uint32_t level ); - -uint32_t _CPU_ISR_Get_level( void ); - -/* end of ISR handler macros */ - -/* Context handler macros */ - -/* - * Initialize the context to a state suitable for starting a - * task after a context restore operation. Generally, this - * involves: - * - * - setting a starting address - * - preparing the stack - * - preparing the stack and frame pointers - * - setting the proper interrupt level in the context - * - initializing the floating point context - * - * This routine generally does not set any unnecessary register - * in the context. The state of the "general data" registers is - * undefined at task start time. - * - * NOTE: This is_fp parameter is TRUE if the thread is to be a floating - * point thread. This is typically only used on CPUs where the - * FPU may be easily disabled by software such as on the SPARC - * where the PSR contains an enable FPU bit. - * - */ - -/** - * @brief Account for GCC red-zone - * - * The following macro is used when initializing task's stack - * to account for GCC red-zone. - */ - -#define EPIPHANY_GCC_RED_ZONE_SIZE 128 - -/** - * @brief Initializes the CPU context. - * - * The following steps are performed: - * - setting a starting address - * - preparing the stack - * - preparing the stack and frame pointers - * - setting the proper interrupt level in the context - * - * @param[in] context points to the context area - * @param[in] stack_area_begin is the low address of the allocated stack area - * @param[in] stack_area_size is the size of the stack area in bytes - * @param[in] new_level is the interrupt level for the task - * @param[in] entry_point is the task's entry point - * @param[in] is_fp is set to @c true if the task is a floating point task - * @param[in] tls_area is the thread-local storage (TLS) area - */ -void _CPU_Context_Initialize( - Context_Control *context, - void *stack_area_begin, - size_t stack_area_size, - uint32_t new_level, - void (*entry_point)( void ), - bool is_fp, - void *tls_area -); - -/* - * This routine is responsible for somehow restarting the currently - * executing task. If you are lucky, then all that is necessary - * is restoring the context. Otherwise, there will need to be - * a special assembly routine which does something special in this - * case. Context_Restore should work most of the time. It will - * not work if restarting self conflicts with the stack frame - * assumptions of restoring a context. - * - */ - -#define _CPU_Context_Restart_self( _the_context ) \ - _CPU_Context_restore( (_the_context) ) - -/* end of Context handler macros */ - -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - */ - -#include - -#define _CPU_Fatal_halt(_source, _error ) \ - printk("Fatal Error %d.%" PRIu32 " Halted\n",_source, _error); \ - asm("trap 3" :: "r" (_error)); \ - for(;;) - -/* end of Fatal Error manager macros */ - -#define CPU_USE_GENERIC_BITFIELD_CODE TRUE - -#define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE - -#endif /* ASM */ - -/** - * Size of a pointer. - * - * This must be an integer literal that can be used by the assembler. This - * value will be used to calculate offsets of structure members. These - * offsets will be used in assembler code. - */ -#define CPU_SIZEOF_POINTER 4 -#define CPU_EXCEPTION_FRAME_SIZE 260 - -#define CPU_MAXIMUM_PROCESSORS 32 - -#ifndef ASM - -typedef struct { - uint32_t r[62]; - uint32_t status; - uint32_t config; - uint32_t iret; -} CPU_Exception_frame; - -/** - * @brief Prints the exception frame via printk(). - * - * @see rtems_fatal() and RTEMS_FATAL_SOURCE_EXCEPTION. - */ -void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ); - - -/* end of Priority handler macros */ - -/* functions */ - -/* - * _CPU_Initialize - * - * This routine performs CPU dependent initialization. - * - */ - -void _CPU_Initialize( - void -); - -void *_CPU_Thread_Idle_body( uintptr_t ignored ); - -/* - * _CPU_Context_switch - * - * This routine switches from the run context to the heir context. - * - * epiphany Specific Information: - * - * Please see the comments in the .c file for a description of how - * this function works. There are several things to be aware of. - */ - -void _CPU_Context_switch( - Context_Control *run, - Context_Control *heir -); - -/* - * _CPU_Context_restore - * - * This routine is generally used only to restart self in an - * efficient manner. It may simply be a label in _CPU_Context_switch. - * - * NOTE: May be unnecessary to reload some registers. - * - */ - -void _CPU_Context_restore( - Context_Control *new_context -) RTEMS_NO_RETURN; - -/* - * _CPU_Context_save_fp - * - * This routine saves the floating point context passed to it. - * - */ - -void _CPU_Context_save_fp( - void **fp_context_ptr -); - -/* - * _CPU_Context_restore_fp - * - * This routine restores the floating point context passed to it. - * - */ - -void _CPU_Context_restore_fp( - void **fp_context_ptr -); - -/* The following routine swaps the endian format of an unsigned int. - * It must be static because it is referenced indirectly. - * - * This version will work on any processor, but if there is a better - * way for your CPU PLEASE use it. The most common way to do this is to: - * - * swap least significant two bytes with 16-bit rotate - * swap upper and lower 16-bits - * swap most significant two bytes with 16-bit rotate - * - * Some CPUs have special instructions which swap a 32-bit quantity in - * a single instruction (e.g. i486). It is probably best to avoid - * an "endian swapping control bit" in the CPU. One good reason is - * that interrupts would probably have to be disabled to insure that - * an interrupt does not try to access the same "chunk" with the wrong - * endian. Another good reason is that on some CPUs, the endian bit - * endianness for ALL fetches -- both code and data -- so the code - * will be fetched incorrectly. - * - */ - -static inline unsigned int CPU_swap_u32( - unsigned int value -) -{ - uint32_t byte1, byte2, byte3, byte4, swapped; - - byte4 = (value >> 24) & 0xff; - byte3 = (value >> 16) & 0xff; - byte2 = (value >> 8) & 0xff; - byte1 = value & 0xff; - - swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4; - return( swapped ); -} - -#define CPU_swap_u16( value ) \ - (((value&0xff) << 8) | ((value >> 8)&0xff)) - -typedef uint32_t CPU_Counter_ticks; - -uint32_t _CPU_Counter_frequency( void ); - -CPU_Counter_ticks _CPU_Counter_read( void ); - -static inline CPU_Counter_ticks _CPU_Counter_difference( - CPU_Counter_ticks second, - CPU_Counter_ticks first -) -{ - return second - first; -} - -/** Type that can store a 32-bit integer or a pointer. */ -typedef uintptr_t CPU_Uint32ptr; - -#endif /* ASM */ - -#ifdef __cplusplus -} -#endif - -#endif - -/**@}*/ diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpu_asm.h b/cpukit/score/cpu/epiphany/include/rtems/score/cpu_asm.h deleted file mode 100644 index cc091fa909..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/score/cpu_asm.h +++ /dev/null @@ -1,74 +0,0 @@ -/** - * @file - * - * @brief Epiphany Assembly File - * - * Very loose template for an include file for the cpu_asm.? file - * if it is implemented as a ".S" file (preprocessed by cpp) instead - * of a ".s" file (preprocessed by gm4 or gasp). - */ - -/* - * COPYRIGHT (c) 1989-1999. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - */ - -#ifndef _RTEMS_SCORE_CPU_ASM_H -#define _RTEMS_SCORE_CPU_ASM_H - -/* pull in the generated offsets */ - -/* -#include -*/ - -/* - * Hardware General Registers - */ - -/* put something here */ - -/* - * Hardware Floating Point Registers - */ - -/* put something here */ - -/* - * Hardware Control Registers - */ - -/* put something here */ - -/* - * Calling Convention - */ - -/* put something here */ - -/* - * Temporary registers - */ - -/* put something here */ - -/* - * Floating Point Registers - SW Conventions - */ - -/* put something here */ - -/* - * Temporary floating point registers - */ - -/* put something here */ - -#endif - -/* end of file */ diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/epiphany/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/epiphany/include/rtems/score/cpuimpl.h deleted file mode 100644 index 967b4911ee..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/score/cpuimpl.h +++ /dev/null @@ -1,67 +0,0 @@ -/** - * @file - * - * @brief CPU Port Implementation API - */ - -/* - * Copyright (c) 2013 embedded brains GmbH - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_CPUIMPL_H -#define _RTEMS_SCORE_CPUIMPL_H - -#include - -/** - * @defgroup RTEMSScoreCPUEpiphany Epiphany - * - * @ingroup RTEMSScoreCPU - * - * @brief Epiphany Architecture Support. - */ -/**@{**/ - -#define CPU_PER_CPU_CONTROL_SIZE 0 - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) -{ - /* TODO */ -} - -RTEMS_INLINE_ROUTINE void _CPU_Context_validate( uintptr_t pattern ) -{ - while (1) { - /* TODO */ - } -} - -RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) -{ - __asm__ volatile ( ".word 0" ); -} - -RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) -{ - __asm__ volatile ( "nop" ); -} - -#ifdef __cplusplus -} -#endif - -#endif /* ASM */ - -/**@}*/ - -#endif /* _RTEMS_SCORE_CPUIMPL_H */ diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h b/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h deleted file mode 100644 index 10426dc94d..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h +++ /dev/null @@ -1,180 +0,0 @@ -/** - * @file - * - * @addtogroup RTEMSScoreCPU - * - * @brief This include file contains macros pertaining to the - * Epiphany processor family. - */ - -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _EPIPHANY_UTILITY_H -#define _EPIPHANY_UTILITY_H - -/* eCore IRQs */ -typedef enum -{ - START, - SW_EXCEPTION, - MEM_FAULT, - TIMER0, - TIMER1, - SMP_MESSAGE, - DMA0, - DMA1, - SER, -} EPIPHANY_IRQ_PER_CORE_T; - -/* Per-core IO mapped register addresses - * @see Epiphany architecture reference. - */ -#define EPIPHANY_PER_CORE_REG_CONFIG 0xF0400 -#define EPIPHANY_PER_CORE_REG_STATUS 0xF0404 -#define EPIPHANY_PER_CORE_REG_PC 0xF0408 -#define EPIPHANY_PER_CORE_REG_DEBUGSTATUS 0xF040C -#define EPIPHANY_PER_CORE_REG_LC 0xF0414 -#define EPIPHANY_PER_CORE_REG_LS 0xF0418 -#define EPIPHANY_PER_CORE_REG_LE 0xF041C -#define EPIPHANY_PER_CORE_REG_IRET 0xF0420 -#define EPIPHANY_PER_CORE_REG_IMASK 0xF0424 -#define EPIPHANY_PER_CORE_REG_ILAT 0xF0428 -#define EPIPHANY_PER_CORE_REG_ILATST 0xF042C -#define EPIPHANY_PER_CORE_REG_ILATCL 0xF0430 -#define EPIPHANY_PER_CORE_REG_IPEND 0xF0434 -#define EPIPHANY_PER_CORE_REG_FSTATUS 0xF0440 -#define EPIPHANY_PER_CORE_REG_DEBUGCMD 0xF0448 -#define EPIPHANY_PER_CORE_REG_RESETCORE 0xF070C - -/* Event timer registers */ -#define EPIPHANY_PER_CORE_REG_CTIMER0 0xF0438 -#define EPIPHANY_PER_CORE_REG_CTIMER1 0xF043C - -/* Processor control registers */ -#define EPIPHANY_PER_CORE_REG_MEMSTATUS 0xF0604 -#define EPIPHANY_PER_CORE_REG_MEMPROTECT 0xF0608 - -/* DMA Registers */ -#define EPIPHANY_PER_CORE_REG_DMA0CONFIG 0xF0500 -#define EPIPHANY_PER_CORE_REG_DMA0STRIDE 0xF0504 -#define EPIPHANY_PER_CORE_REG_DMA0COUNT 0xF0508 -#define EPIPHANY_PER_CORE_REG_DMA0SRCADDR 0xF050C -#define EPIPHANY_PER_CORE_REG_DMA0DSTADDR 0xF0510 -#define EPIPHANY_PER_CORE_REG_DMA0AUTO0 0xF0514 -#define EPIPHANY_PER_CORE_REG_DMA0AUTO1 0xF0518 -#define EPIPHANY_PER_CORE_REG_DMA0STATUS 0xF051C -#define EPIPHANY_PER_CORE_REG_DMA1CONFIG 0xF0520 -#define EPIPHANY_PER_CORE_REG_DMA1STRIDE 0xF0524 -#define EPIPHANY_PER_CORE_REG_DMA1COUNT 0xF0528 -#define EPIPHANY_PER_CORE_REG_DMA1SRCADDR 0xF052C -#define EPIPHANY_PER_CORE_REG_DMA1DSTADDR 0xF0530 -#define EPIPHANY_PER_CORE_REG_DMA1AUTO0 0xF0534 -#define EPIPHANY_PER_CORE_REG_DMA1AUTO1 0xF0538 -#define EPIPHANY_PER_CORE_REG_DMA1STATUS 0xF053C - -/* Mesh Node Control Registers */ -#define EPIPHANY_PER_CORE_REG_MESHCONFIG 0xF0700 -#define EPIPHANY_PER_CORE_REG_COREID 0xF0704 -#define EPIPHANY_PER_CORE_REG_MULTICAST 0xF0708 -#define EPIPHANY_PER_CORE_REG_CMESHROUTE 0xF0710 -#define EPIPHANY_PER_CORE_REG_XMESHROUTE 0xF0714 -#define EPIPHANY_PER_CORE_REG_RMESHROUTE 0xF0718 - -/* This macros constructs an address space of epiphany cores - * from their IDs. - */ -#define EPIPHANY_COREID_TO_MSB_ADDR(id) (id) << 20 - -/* Construct a complete/absolute IO mapped address register from - * core ID and register name - */ -#define EPIPHANY_GET_REG_ABSOLUTE_ADDR(coreid, reg) \ - (EPIPHANY_COREID_TO_MSB_ADDR(coreid) | (reg)) - -#define EPIPHANY_REG(reg) (uint32_t *) (reg) - -/* Read register with its absolute address */ -static inline uint32_t read_epiphany_reg(volatile uint32_t reg_addr) -{ - return *(EPIPHANY_REG(reg_addr)); -} - -/* Write register with its abolute address */ -static inline void write_epiphany_reg(volatile uint32_t reg_addr, uint32_t val) -{ - *(EPIPHANY_REG(reg_addr)) = val; -} - -/* Epiphany uses 12 bits for defining core IDs, while RTEMS uses - * linear IDs. The following function converts RTEMS linear IDs to - * Epiphany corresponding ones - */ -static const uint32_t map[16] = -{ - 0x808, 0x809, 0x80A, 0x80B, - 0x848, 0x849, 0x84A, 0x84B, - 0x888, 0x889, 0x88A, 0x88B, - 0x8C8, 0x8C9, 0x8CA, 0x8CB -}; - -static inline uint32_t rtems_coreid_to_epiphany_map(uint32_t rtems_id) -{ - return map[rtems_id]; -} - -/* Epiphany uses 12 bits for defining core IDs, while RTEMS uses - * linear IDs. The following function is used to map Epiphany IDs to - * RTEMS linear IDs. - */ -static inline uint32_t epiphany_coreid_to_rtems_map(uint32_t epiphany_id) -{ - register uint32_t coreid asm ("r17") = epiphany_id; - - /* Mapping from Epiphany IDs to 0-16 IDs macro */ - __asm__ __volatile__(" \ - movfs r17, coreid \ - mov r19, #0x003 \ - mov r20, #0x0F0 \ - and r19, r17, r19 \ - and r20, r17, r20 \ - lsr r20, r20, #4 \ - add r17, r19, r20 \ - "); - - /* coreid or r17 now holds the rtems core id */ - return coreid; -} - -static inline uint32_t _Epiphany_Get_current_processor(void) -{ - uint32_t coreid; - - asm volatile ("movfs %0, coreid" : "=r" (coreid): ); - - return epiphany_coreid_to_rtems_map(coreid); -} -#endif /* _EPIPHANY_UTILITY_H */ diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany.h b/cpukit/score/cpu/epiphany/include/rtems/score/epiphany.h deleted file mode 100644 index 3eeddec421..0000000000 --- a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany.h +++ /dev/null @@ -1,64 +0,0 @@ -/** - * @file - */ - -/* - * Copyright (c) 2015 University of York. - * Hesham ALMatary - * - * COPYRIGHT (c) 1989-1999, 2010. - * On-Line Applications Research Corporation (OAR). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_EPIPHANY_H -#define _RTEMS_SCORE_EPIPHANY_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * This file contains the information required to build - * RTEMS for a particular member of the Epiphany family. - * It does this by setting variables to indicate which - * implementation dependent features are present in a particular - * member of the family. - * - * This is a good place to list all the known CPU models - * that this port supports and which RTEMS CPU model they correspond - * to. - */ - - /* - * Define the name of the CPU family and specific model. - */ - -#define CPU_NAME "EPIPHANY" -#define CPU_MODEL_NAME "EPIPHANY" - -#ifdef __cplusplus -} -#endif - -#endif /* _RTEMS_SCORE_EPIPHANY_H */ diff --git a/cpukit/score/cpu/epiphany/setjmp.S b/cpukit/score/cpu/epiphany/setjmp.S deleted file mode 100644 index b981ee51e2..0000000000 --- a/cpukit/score/cpu/epiphany/setjmp.S +++ /dev/null @@ -1,69 +0,0 @@ -/* setjmp and longjmp - - Copyright (c) 2011, Adapteva, Inc. - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - * Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the name of Adapteva nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. */ - - .file "setjmp.S" - .section .text - .align 4 - .global _setjmp - .type _setjmp, %function -_setjmp: - strd lr,[r0] - strd r4,[r0,1] - strd r6,[r0,2] - strd r8,[r0,3] - strd r10,[r0,4] - strd r32,[r0,5] - strd r34,[r0,6] - strd r36,[r0,7] - strd r38,[r0,8] - str sp,[r0,18] - mov r0,#0 - rts - .size _setjmp, .-_setjmp - .global setjmp - .set setjmp, _setjmp - - .global _longjmp -_longjmp: - ldrd lr,[r0] ; return address / r15 - ldrd r4,[r0,1] - ldrd r6,[r0,2] - ldrd r8,[r0,3] - ldrd r10,[r0,4] - ldrd r32,[r0,5] - ldrd r34,[r0,6] - ldrd r36,[r0,7] - ldrd r38,[r0,8] - ldr sp,[r0,18] - sub r1,r1,0 - mov r0,#1 - movne r0,r1 - jr lr - .size _longjmp, .-_longjmp - .global longjmp - .set longjmp, _longjmp -- cgit v1.2.3