From 287e4a8b6ba3ac43ce5ee99e94a884b1fa472bc5 Mon Sep 17 00:00:00 2001 From: Till Straumann Date: Thu, 29 Oct 2009 16:05:05 +0000 Subject: 2009-10-29 Till Straumann * shared/irq/irq_asm.S: Beautification; ajusted margins and spaces to make the whole thing more readable. --- c/src/lib/libbsp/i386/ChangeLog | 5 + c/src/lib/libbsp/i386/shared/irq/irq_asm.S | 214 ++++++++++++++--------------- 2 files changed, 112 insertions(+), 107 deletions(-) diff --git a/c/src/lib/libbsp/i386/ChangeLog b/c/src/lib/libbsp/i386/ChangeLog index 08aab884cd..d4f0193575 100644 --- a/c/src/lib/libbsp/i386/ChangeLog +++ b/c/src/lib/libbsp/i386/ChangeLog @@ -1,3 +1,8 @@ +2009-10-29 Till Straumann + + * shared/irq/irq_asm.S: Beautification; ajusted margins and + spaces to make the whole thing more readable. + 2009-10-29 Till Straumann * shared/irq/irq_asm.S, shared/irq/irq.c: removed diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S index 325251aa15..a5731b8357 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S @@ -19,87 +19,87 @@ #error "Missing header? CPU_STACK_ALIGNMENT is not defined here" #endif - BEGIN_CODE + BEGIN_CODE SYM (_ISR_Handler): - /* - * Before this was point is reached the vectors unique - * entry point did the following: - * - * 1. saved scratch registers registers eax edx ecx" - * 2. put the vector number in ecx. - * - * BEGINNING OF ESTABLISH SEGMENTS - * - * WARNING: If an interrupt can occur when the segments are - * not correct, then this is where we should establish - * the segments. In addition to establishing the - * segments, it may be necessary to establish a stack - * in the current data area on the outermost interrupt. - * - * NOTE: If the previous values of the segment registers are - * pushed, do not forget to adjust SAVED_REGS. - * - * NOTE: Make sure the exit code which restores these - * when this type of code is needed. - */ - - /***** ESTABLISH SEGMENTS CODE GOES HERE ******/ - - /* - * END OF ESTABLISH SEGMENTS - */ - - /* - * Now switch stacks if necessary - */ - - movw SYM (i8259s_cache), ax /* move current i8259 interrupt mask in ax */ - pushl eax /* push it on the stack */ + /* + * Before this was point is reached the vectors unique + * entry point did the following: + * + * 1. saved scratch registers registers eax edx ecx" + * 2. put the vector number in ecx. + * + * BEGINNING OF ESTABLISH SEGMENTS + * + * WARNING: If an interrupt can occur when the segments are + * not correct, then this is where we should establish + * the segments. In addition to establishing the + * segments, it may be necessary to establish a stack + * in the current data area on the outermost interrupt. + * + * NOTE: If the previous values of the segment registers are + * pushed, do not forget to adjust SAVED_REGS. + * + * NOTE: Make sure the exit code which restores these + * when this type of code is needed. + */ + + /***** ESTABLISH SEGMENTS CODE GOES HERE ******/ + + /* + * END OF ESTABLISH SEGMENTS + */ + + /* + * Now switch stacks if necessary + */ + + movw SYM (i8259s_cache), ax /* move current i8259 interrupt mask in ax */ + pushl eax /* push it on the stack */ /* * compute the new PIC mask: * * = | irq_mask_or_tbl[] */ - movw SYM (irq_mask_or_tbl) (,ecx,2), dx - orw dx, ax + movw SYM (irq_mask_or_tbl) (,ecx,2), dx + orw dx, ax /* * Install new computed value on the i8259 and update cache * accordingly */ movw ax, SYM (i8259s_cache) - outb $PIC_MASTER_IMR_IO_PORT - movb ah, al - outb $PIC_SLAVE_IMR_IO_PORT + outb $PIC_MASTER_IMR_IO_PORT + movb ah, al + outb $PIC_SLAVE_IMR_IO_PORT /* * acknowledge the interrupt * */ - movb $PIC_EOI, al - cmpl $7, ecx - jbe .master - outb $PIC_SLAVE_COMMAND_IO_PORT + movb $PIC_EOI, al + cmpl $7, ecx + jbe .master + outb $PIC_SLAVE_COMMAND_IO_PORT .master: - outb $PIC_MASTER_COMMAND_IO_PORT + outb $PIC_MASTER_COMMAND_IO_PORT .check_stack_switch: - pushl ebp - movl esp, ebp /* ebp = previous stack pointer */ - cmpl $0, SYM (_ISR_Nest_level) /* is this the outermost interrupt? */ - jne nested /* No, then continue */ - movl SYM (_CPU_Interrupt_stack_high), esp - - /* - * We want to insure that the old stack pointer is on the - * stack we will be on at the end of the ISR when we restore it. - * By saving it on every interrupt, all we have to do is pop it - * near the end of every interrupt. - */ + pushl ebp + movl esp, ebp /* ebp = previous stack pointer */ + cmpl $0, SYM (_ISR_Nest_level) /* is this the outermost interrupt? */ + jne nested /* No, then continue */ + movl SYM (_CPU_Interrupt_stack_high), esp + + /* + * We want to insure that the old stack pointer is on the + * stack we will be on at the end of the ISR when we restore it. + * By saving it on every interrupt, all we have to do is pop it + * near the end of every interrupt. + */ nested: - incl SYM (_ISR_Nest_level) /* one nest level deeper */ - incl SYM (_Thread_Dispatch_disable_level) /* disable multitasking */ + incl SYM (_ISR_Nest_level) /* one nest level deeper */ + incl SYM (_Thread_Dispatch_disable_level) /* disable multitasking */ /* * Ensure CPU_STACK_ALIGNMENT for C-code. @@ -107,9 +107,9 @@ nested: * makes sure 'esp' is aligned AND there is enough space * for the vector argument on the stack! */ - subl $4, esp + subl $4, esp - andl $ - CPU_STACK_ALIGNMENT, esp + andl $ - CPU_STACK_ALIGNMENT, esp /* * re-enable interrupts at processor level as the current * interrupt source is now masked via i8259 @@ -121,8 +121,8 @@ nested: * so we must save it again. */ - movl ecx, (esp) /* store vector arg in stack */ - call C_dispatch_isr + movl ecx, (esp) /* store vector arg in stack */ + call C_dispatch_isr /* * disable interrupts_again @@ -132,47 +132,47 @@ nested: /* * restore stack */ - movl ebp, esp - popl ebp + movl ebp, esp + popl ebp /* * restore the original i8259 masks */ - popl eax + popl eax movw ax, SYM (i8259s_cache) outb $PIC_MASTER_IMR_IO_PORT movb ah, al outb $PIC_SLAVE_IMR_IO_PORT - decl SYM (_ISR_Nest_level) /* one less ISR nest level */ - /* If interrupts are nested, */ - /* then dispatching is disabled */ + decl SYM (_ISR_Nest_level) /* one less ISR nest level */ + /* If interrupts are nested, */ + /* then dispatching is disabled */ - decl SYM (_Thread_Dispatch_disable_level) - /* unnest multitasking */ - /* Is dispatch disabled */ - jne .exit /* Yes, then exit */ + decl SYM (_Thread_Dispatch_disable_level) + /* unnest multitasking */ + /* Is dispatch disabled */ + jne .exit /* Yes, then exit */ - cmpb $0, SYM (_Context_Switch_necessary) - /* Is task switch necessary? */ - jne .schedule /* Yes, then call the scheduler */ + cmpb $0, SYM (_Context_Switch_necessary) + /* Is task switch necessary? */ + jne .schedule /* Yes, then call the scheduler */ - cmpb $0, SYM (_ISR_Signals_to_thread_executing) - /* signals sent to Run_thread */ - /* while in interrupt handler? */ - je .exit /* No, exit */ + cmpb $0, SYM (_ISR_Signals_to_thread_executing) + /* signals sent to Run_thread */ + /* while in interrupt handler? */ + je .exit /* No, exit */ .bframe: - movb $0, SYM (_ISR_Signals_to_thread_executing) + movb $0, SYM (_ISR_Signals_to_thread_executing) /* * This code is the less critical path. In order to have a single * Thread Context, we take the same frame than the one pushed on * exceptions. This makes sense because Signal is a software * exception. */ - call _ThreadProcessSignalsFromIrq + call _ThreadProcessSignalsFromIrq - jmp .exit + jmp .exit .schedule: /* @@ -180,39 +180,39 @@ nested: * back on the thread system stack. So we can call _Thread_Displatch * directly */ - call _Thread_Dispatch + call _Thread_Dispatch /* * fall through exit to restore complete contex (scratch registers * eip, CS, Flags). */ .exit: - /* - * BEGINNING OF DE-ESTABLISH SEGMENTS - * - * NOTE: Make sure there is code here if code is added to - * load the segment registers. - * - */ - - /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/ - - /* - * END OF DE-ESTABLISH SEGMENTS - */ - popl edx - popl ecx - popl eax + /* + * BEGINNING OF DE-ESTABLISH SEGMENTS + * + * NOTE: Make sure there is code here if code is added to + * load the segment registers. + * + */ + + /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/ + + /* + * END OF DE-ESTABLISH SEGMENTS + */ + popl edx + popl ecx + popl eax iret #define DISTINCT_INTERRUPT_ENTRY(_vector) \ - .p2align 4 ; \ - PUBLIC (rtems_irq_prologue_ ## _vector ) ; \ + .p2align 4 ; \ + PUBLIC (rtems_irq_prologue_ ## _vector ) ; \ SYM (rtems_irq_prologue_ ## _vector ): \ - pushl eax ; \ - pushl ecx ; \ - pushl edx ; \ - movl $ _vector, ecx ; \ - jmp SYM (_ISR_Handler) ; + pushl eax ; \ + pushl ecx ; \ + pushl edx ; \ + movl $ _vector, ecx ; \ + jmp SYM (_ISR_Handler) ; DISTINCT_INTERRUPT_ENTRY(0) DISTINCT_INTERRUPT_ENTRY(1) -- cgit v1.2.3