From 2055e423626182874a8695d83c6537e6cd10a898 Mon Sep 17 00:00:00 2001 From: Kinsey Moore Date: Mon, 25 Oct 2021 09:47:47 -0500 Subject: aarch64: Break out MMU definitions This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints. --- bsps/aarch64/include/bsp/aarch64-mmu.h | 40 +-------- bsps/aarch64/shared/mmu/vmsav8-64-nommu.c | 49 +++++++++++ bsps/aarch64/shared/mmu/vmsav8-64.c | 69 +++++++++++++++ bsps/aarch64/xilinx-versal/start/bspstartmmu.c | 1 + bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c | 1 + .../cpu/aarch64/include/libcpu/mmu-vmsav8-64.h | 97 ++++++++++++++++++++++ spec/build/bsps/aarch64/a53/obj.yml | 1 + spec/build/bsps/aarch64/a72/obj.yml | 1 + spec/build/bsps/aarch64/xilinx-versal/obj.yml | 1 + spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml | 1 + spec/build/cpukit/cpuaarch64.yml | 1 + 11 files changed, 223 insertions(+), 39 deletions(-) create mode 100644 bsps/aarch64/shared/mmu/vmsav8-64-nommu.c create mode 100644 bsps/aarch64/shared/mmu/vmsav8-64.c create mode 100644 cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h diff --git a/bsps/aarch64/include/bsp/aarch64-mmu.h b/bsps/aarch64/include/bsp/aarch64-mmu.h index a5f6e846f3..4f42d5b187 100644 --- a/bsps/aarch64/include/bsp/aarch64-mmu.h +++ b/bsps/aarch64/include/bsp/aarch64-mmu.h @@ -42,50 +42,12 @@ #include #include #include +#include #ifdef __cplusplus extern "C" { #endif /* __cplusplus */ -/* VMSAv8 Long-descriptor fields */ -#define MMU_DESC_AF BSP_BIT64( 10 ) -#define MMU_DESC_SH_INNER ( BSP_BIT64( 9 ) | BSP_BIT64( 8 ) ) -#define MMU_DESC_WRITE_DISABLE BSP_BIT64( 7 ) -/* PAGE and TABLE flags are the same bit, but only apply on certain levels */ -#define MMU_DESC_TYPE_TABLE BSP_BIT64( 1 ) -#define MMU_DESC_TYPE_PAGE BSP_BIT64( 1 ) -#define MMU_DESC_VALID BSP_BIT64( 0 ) -#define MMU_DESC_MAIR_ATTR( val ) BSP_FLD64( val, 2, 3 ) -#define MMU_DESC_MAIR_ATTR_GET( reg ) BSP_FLD64GET( reg, 2, 3 ) -#define MMU_DESC_MAIR_ATTR_SET( reg, val ) BSP_FLD64SET( reg, val, 2, 3 ) -#define MMU_DESC_PAGE_TABLE_MASK 0xFFFFFFFFF000LL - -/* Page table configuration */ -#define MMU_PAGE_BITS 12 -#define MMU_PAGE_SIZE ( 1 << MMU_PAGE_BITS ) -#define MMU_BITS_PER_LEVEL 9 -#define MMU_TOP_LEVEL_PAGE_BITS ( 2 * MMU_BITS_PER_LEVEL + MMU_PAGE_BITS ) - -#define AARCH64_MMU_FLAGS_BASE \ - ( MMU_DESC_VALID | MMU_DESC_SH_INNER | MMU_DESC_AF ) - -#define AARCH64_MMU_DATA_RO_CACHED \ - ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 3 ) | MMU_DESC_WRITE_DISABLE ) -#define AARCH64_MMU_CODE_CACHED AARCH64_MMU_DATA_RO_CACHED -#define AARCH64_MMU_CODE_RW_CACHED AARCH64_MMU_DATA_RW_CACHED - -#define AARCH64_MMU_DATA_RO \ - ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 1 ) | MMU_DESC_WRITE_DISABLE ) -#define AARCH64_MMU_CODE AARCH64_MMU_DATA_RO -#define AARCH64_MMU_CODE_RW AARCH64_MMU_DATA_RW - -/* RW implied by not ORing in RO */ -#define AARCH64_MMU_DATA_RW_CACHED \ - ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 3 ) ) -#define AARCH64_MMU_DATA_RW \ - ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 1 ) ) -#define AARCH64_MMU_DEVICE ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 0 ) ) - typedef struct { uintptr_t begin; uintptr_t end; diff --git a/bsps/aarch64/shared/mmu/vmsav8-64-nommu.c b/bsps/aarch64/shared/mmu/vmsav8-64-nommu.c new file mode 100644 index 0000000000..2c793fa239 --- /dev/null +++ b/bsps/aarch64/shared/mmu/vmsav8-64-nommu.c @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64Shared + * + * @brief AArch64 MMU dummy implementation. + */ + +/* + * Copyright (C) 2021 On-Line Applications Research Corporation (OAR) + * Written by Kinsey Moore + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +/* + * This must have a non-header implementation because it is used by libdebugger. + */ +rtems_status_code aarch64_mmu_map( + uintptr_t addr, + uint64_t size, + uint64_t flags +) +{ + return RTEMS_SUCCESSFUL; +} diff --git a/bsps/aarch64/shared/mmu/vmsav8-64.c b/bsps/aarch64/shared/mmu/vmsav8-64.c new file mode 100644 index 0000000000..9caa91c414 --- /dev/null +++ b/bsps/aarch64/shared/mmu/vmsav8-64.c @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64Shared + * + * @brief AArch64 MMU implementation. + */ + +/* + * Copyright (C) 2021 On-Line Applications Research Corporation (OAR) + * Written by Kinsey Moore + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +/* + * This must have a non-header implementation because it is used by libdebugger. + */ +rtems_status_code aarch64_mmu_map( + uintptr_t addr, + uint64_t size, + uint64_t flags +) +{ + rtems_status_code sc; + + aarch64_mmu_disable(); + sc = aarch64_mmu_map_block( + (uint64_t *) bsp_translation_table_base, + 0x0, + addr, + size, + 0, + flags + ); + _AARCH64_Data_synchronization_barrier(); + __asm__ volatile( + "tlbi vmalle1\n" + ); + _AARCH64_Data_synchronization_barrier(); + _AARCH64_Instruction_synchronization_barrier(); + aarch64_mmu_enable(); + + return sc; +} diff --git a/bsps/aarch64/xilinx-versal/start/bspstartmmu.c b/bsps/aarch64/xilinx-versal/start/bspstartmmu.c index 8b622aec7d..5949111d0d 100644 --- a/bsps/aarch64/xilinx-versal/start/bspstartmmu.c +++ b/bsps/aarch64/xilinx-versal/start/bspstartmmu.c @@ -36,6 +36,7 @@ #include #include #include +#include BSP_START_DATA_SECTION static const aarch64_mmu_config_entry versal_mmu_config_table[] = { diff --git a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c index 09012c9db5..33ca1eafab 100644 --- a/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c +++ b/bsps/aarch64/xilinx-zynqmp/start/bspstartmmu.c @@ -37,6 +37,7 @@ #include #include #include +#include BSP_START_DATA_SECTION static const aarch64_mmu_config_entry zynqmp_mmu_config_table[] = { diff --git a/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h b/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h new file mode 100644 index 0000000000..6b6296bb7a --- /dev/null +++ b/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSScoreCPUAArch64 + * + * @brief Definitions used in MMU setup. + */ + +/* + * Copyright (C) 2021 On-Line Applications Research Corporation (OAR) + * Written by Kinsey Moore + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBCPU_AARCH64_MMU_VMSAV8_64_H +#define LIBCPU_AARCH64_MMU_VMSAV8_64_H + +#ifndef ASM + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include + +/* VMSAv8 Long-descriptor fields */ +#define MMU_DESC_AF ( 1 << 10 ) +#define MMU_DESC_SH_INNER ( ( 1 << 9 ) | ( 1 << 8 ) ) +#define MMU_DESC_WRITE_DISABLE ( 1 << 7 ) +/* PAGE and TABLE flags are the same bit, but only apply on certain levels */ +#define MMU_DESC_TYPE_TABLE ( 1 << 1 ) +#define MMU_DESC_TYPE_PAGE ( 1 << 1 ) +#define MMU_DESC_VALID ( 1 << 0 ) +#define MMU_DESC_MAIR_ATTR( val ) ( ( val & 0x3 ) << 2 ) +#define MMU_DESC_PAGE_TABLE_MASK 0xFFFFFFFFF000LL + +/* Page table configuration */ +#define MMU_PAGE_BITS 12 +#define MMU_PAGE_SIZE ( 1 << MMU_PAGE_BITS ) +#define MMU_BITS_PER_LEVEL 9 +#define MMU_TOP_LEVEL_PAGE_BITS ( 2 * MMU_BITS_PER_LEVEL + MMU_PAGE_BITS ) + +#define AARCH64_MMU_FLAGS_BASE \ + ( MMU_DESC_VALID | MMU_DESC_SH_INNER | MMU_DESC_AF ) + +#define AARCH64_MMU_DATA_RO_CACHED \ + ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 3 ) | MMU_DESC_WRITE_DISABLE ) +#define AARCH64_MMU_CODE_CACHED AARCH64_MMU_DATA_RO_CACHED +#define AARCH64_MMU_CODE_RW_CACHED AARCH64_MMU_DATA_RW_CACHED + +#define AARCH64_MMU_DATA_RO \ + ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 1 ) | MMU_DESC_WRITE_DISABLE ) +#define AARCH64_MMU_CODE AARCH64_MMU_DATA_RO +#define AARCH64_MMU_CODE_RW AARCH64_MMU_DATA_RW + +/* RW implied by not ORing in RO */ +#define AARCH64_MMU_DATA_RW_CACHED \ + ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 3 ) ) +#define AARCH64_MMU_DATA_RW \ + ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 1 ) ) +#define AARCH64_MMU_DEVICE ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 0 ) ) + +rtems_status_code aarch64_mmu_map( + uintptr_t addr, + uint64_t size, + uint64_t flags +); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* LIBCPU_AARCH64_MMU_VMSAV8_64_H */ diff --git a/spec/build/bsps/aarch64/a53/obj.yml b/spec/build/bsps/aarch64/a53/obj.yml index 939079a35a..51d4de8f52 100644 --- a/spec/build/bsps/aarch64/a53/obj.yml +++ b/spec/build/bsps/aarch64/a53/obj.yml @@ -22,6 +22,7 @@ source: - bsps/aarch64/a53/start/bspstarthooks.c - bsps/aarch64/shared/cache/cache.c - bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c +- bsps/aarch64/shared/mmu/vmsav8-64-nommu.c - bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c diff --git a/spec/build/bsps/aarch64/a72/obj.yml b/spec/build/bsps/aarch64/a72/obj.yml index 812b21be67..ad92559644 100644 --- a/spec/build/bsps/aarch64/a72/obj.yml +++ b/spec/build/bsps/aarch64/a72/obj.yml @@ -22,6 +22,7 @@ source: - bsps/aarch64/a72/start/bspstarthooks.c - bsps/aarch64/shared/cache/cache.c - bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c +- bsps/aarch64/shared/mmu/vmsav8-64-nommu.c - bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c diff --git a/spec/build/bsps/aarch64/xilinx-versal/obj.yml b/spec/build/bsps/aarch64/xilinx-versal/obj.yml index 79e7000b52..b9ad05c0f6 100644 --- a/spec/build/bsps/aarch64/xilinx-versal/obj.yml +++ b/spec/build/bsps/aarch64/xilinx-versal/obj.yml @@ -24,6 +24,7 @@ links: [] source: - bsps/aarch64/shared/cache/cache.c - bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c +- bsps/aarch64/shared/mmu/vmsav8-64.c - bsps/aarch64/xilinx-versal/console/console.c - bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c - bsps/aarch64/xilinx-versal/start/bspstart.c diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml index 4f6b9c44d8..8a15fe73bf 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml @@ -20,6 +20,7 @@ links: [] source: - bsps/aarch64/shared/cache/cache.c - bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c +- bsps/aarch64/shared/mmu/vmsav8-64.c - bsps/aarch64/xilinx-zynqmp/console/console.c - bsps/aarch64/xilinx-zynqmp/start/bspstart.c - bsps/aarch64/xilinx-zynqmp/start/bspstarthooks.c diff --git a/spec/build/cpukit/cpuaarch64.yml b/spec/build/cpukit/cpuaarch64.yml index 7b1bf5705d..70d80f0b6c 100644 --- a/spec/build/cpukit/cpuaarch64.yml +++ b/spec/build/cpukit/cpuaarch64.yml @@ -11,6 +11,7 @@ includes: [] install: - destination: ${BSP_INCLUDEDIR}/libcpu source: + - cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h - cpukit/score/cpu/aarch64/include/libcpu/vectors.h - destination: ${BSP_INCLUDEDIR}/rtems source: -- cgit v1.2.3