From 1ecaae497214273fe40be1297182baceae80b793 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Sun, 16 Dec 2007 12:35:49 +0000 Subject: Back port from HEAD. --- .../patches/gdb-6.7.1-rtems4.8-20071216.diff | 105 +++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 contrib/crossrpms/patches/gdb-6.7.1-rtems4.8-20071216.diff diff --git a/contrib/crossrpms/patches/gdb-6.7.1-rtems4.8-20071216.diff b/contrib/crossrpms/patches/gdb-6.7.1-rtems4.8-20071216.diff new file mode 100644 index 0000000000..d96872e76b --- /dev/null +++ b/contrib/crossrpms/patches/gdb-6.7.1-rtems4.8-20071216.diff @@ -0,0 +1,105 @@ +diff -uNr gdb-6.7.1.orig/sim/erc32/erc32.c gdb-6.7.1/sim/erc32/erc32.c +--- gdb-6.7.1.orig/sim/erc32/erc32.c 1999-04-16 03:35:00.000000000 +0200 ++++ gdb-6.7.1/sim/erc32/erc32.c 2007-12-16 09:11:43.000000000 +0100 +@@ -24,6 +24,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -413,7 +414,7 @@ + if (rom8) mec_memcfg &= ~0x20000; + else mec_memcfg |= 0x20000; + +- mem_ramsz = (256 * 1024) << ((mec_memcfg >> 10) & 7); ++ mem_ramsz = (512 * 1024) << ((mec_memcfg >> 10) & 7); + mem_romsz = (128 * 1024) << ((mec_memcfg >> 18) & 7); + + if (sparclite_board) { +@@ -1659,7 +1660,7 @@ + errmec = 0; + return(1); + } +-#endif; ++#endif + + if ((addr >= mem_ramstart) && (addr < (mem_ramstart + mem_ramsz))) { + fetch_bytes (asi, &ramb[addr & mem_rammask], data, sz); +@@ -1736,7 +1737,7 @@ + errmec = 0; + return(1); + } +-#endif; ++#endif + + if ((addr >= mem_ramstart) && (addr < (mem_ramstart + mem_ramsz))) { + if (mem_accprot) { +diff -uNr gdb-6.7.1.orig/sim/erc32/exec.c gdb-6.7.1/sim/erc32/exec.c +--- gdb-6.7.1.orig/sim/erc32/exec.c 2005-03-07 12:09:05.000000000 +0100 ++++ gdb-6.7.1/sim/erc32/exec.c 2007-12-16 09:11:43.000000000 +0100 +@@ -1713,7 +1713,7 @@ + sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1]; + sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1]; + default: +- ; ++ break; + } + #endif + +@@ -1886,7 +1886,7 @@ + sregs->fs[rd & ~1] = sregs->fdp[rd | 1]; + sregs->fs[rd | 1] = sregs->fdp[rd & ~1]; + default: +- ; ++ break; + } + #endif + if (sregs->fpstate == FP_EXC_PE) { +diff -uNr gdb-6.7.1.orig/sim/erc32/Makefile.in gdb-6.7.1/sim/erc32/Makefile.in +--- gdb-6.7.1.orig/sim/erc32/Makefile.in 2007-08-24 16:28:35.000000000 +0200 ++++ gdb-6.7.1/sim/erc32/Makefile.in 2007-12-16 09:11:44.000000000 +0100 +@@ -18,8 +18,10 @@ + + ## COMMON_PRE_CONFIG_FRAG + +-TERMCAP_LIB = @TERMCAP@ +-READLINE_LIB = @READLINE@ ++# TERMCAP_LIB = @TERMCAP_LIB@ ++TERMCAP_LIB = -lncurses ++# READLINE_LIB = @READLINE_LIB@ ++READLINE_LIB = -lreadline + + SIM_OBJS = exec.o erc32.o func.o help.o float.o interf.o + SIM_EXTRA_LIBS = $(READLINE_LIB) $(TERMCAP_LIB) -lm +diff -uNr gdb-6.7.1.orig/sim/ppc/ppc-instructions gdb-6.7.1/sim/ppc/ppc-instructions +--- gdb-6.7.1.orig/sim/ppc/ppc-instructions 2006-11-29 16:20:55.000000000 +0100 ++++ gdb-6.7.1/sim/ppc/ppc-instructions 2007-12-16 09:11:44.000000000 +0100 +@@ -3402,6 +3402,14 @@ + case spr_dec: + *rT = cpu_get_decrementer(processor); + break; ++ case spr_tbrl: ++ if (is_64bit_implementation) *rT = TB; ++ else *rT = EXTRACTED64(TB, 32, 63); ++ break; ++ case spr_tbru: ++ if (is_64bit_implementation) *rT = EXTRACTED64(TB, 0, 31); ++ else *rT = EXTRACTED64(TB, 0, 31); ++ break; + case spr_tbu: + case spr_tbl: + /* NOTE - these SPR's are not readable. Use mftb[ul] */ +diff -uNr gdb-6.7.1.orig/sim/ppc/ppc-spr-table gdb-6.7.1/sim/ppc/ppc-spr-table +--- gdb-6.7.1.orig/sim/ppc/ppc-spr-table 2003-06-22 18:48:12.000000000 +0200 ++++ gdb-6.7.1/sim/ppc/ppc-spr-table 2007-12-16 09:11:44.000000000 +0100 +@@ -32,6 +32,8 @@ + SRR0:26:0:0 + SRR1:27:0:0 + VRSAVE:256:0:0 ++TBRL:268:0:0 ++TBRU:269:0:0 + SPRG0:272:0:0 + SPRG1:273:0:0 + SPRG2:274:0:0 -- cgit v1.2.3