From 1bf1c779e1eea50930bb0953ca92e308a0503745 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Wed, 9 Nov 2022 10:18:29 +0100 Subject: bsps/riscv: bsp_interrupt_raise_on() Implement bsp_interrupt_raise_on() and bsp_interrupt_raise(). --- bsps/riscv/riscv/irq/irq.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c index eeb7787080..e414711ef6 100644 --- a/bsps/riscv/riscv/irq/irq.c +++ b/bsps/riscv/riscv/irq/irq.c @@ -346,10 +346,27 @@ rtems_status_code bsp_interrupt_is_pending( return RTEMS_SUCCESSFUL; } -rtems_status_code bsp_interrupt_raise(rtems_vector_number vector) +static inline rtems_status_code riscv_raise_on( + rtems_vector_number vector, + uint32_t cpu_index +) { + Per_CPU_Control *cpu; + bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); - return RTEMS_UNSATISFIED; + + if (vector != RISCV_INTERRUPT_VECTOR_SOFTWARE) { + return RTEMS_UNSATISFIED; + } + + cpu = _Per_CPU_Get_by_index(cpu_index); + *cpu->cpu_per_cpu.clint_msip = 0x1; + return RTEMS_SUCCESSFUL; +} + +rtems_status_code bsp_interrupt_raise(rtems_vector_number vector) +{ + return riscv_raise_on(vector, rtems_scheduler_get_processor()); } #if defined(RTEMS_SMP) @@ -358,8 +375,7 @@ rtems_status_code bsp_interrupt_raise_on( uint32_t cpu_index ) { - bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); - return RTEMS_UNSATISFIED; + return riscv_raise_on(vector, cpu_index); } #endif -- cgit v1.2.3