From 105e52032e524873924ddec0167535a33f8cd9f7 Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Thu, 10 Dec 2020 08:08:00 +0100
Subject: bsps: Remove ARM GIC SGI target filter

Remove the target filter for software-generated interrupts since this
feature is not supported by the affinity routing in GICv3.

Update #4202.
---
 bsps/arm/shared/start/arm-a9mpcore-smp.c |  1 -
 bsps/include/dev/irq/arm-gic-irq.h       | 15 ++-------------
 bsps/include/dev/irq/arm-gic-tm27.h      |  2 --
 bsps/shared/dev/irq/arm-gicv2.c          |  8 ++------
 bsps/shared/dev/irq/arm-gicv3.c          | 10 +---------
 5 files changed, 5 insertions(+), 31 deletions(-)

diff --git a/bsps/arm/shared/start/arm-a9mpcore-smp.c b/bsps/arm/shared/start/arm-a9mpcore-smp.c
index 5527cd2fa9..9bde1815c0 100644
--- a/bsps/arm/shared/start/arm-a9mpcore-smp.c
+++ b/bsps/arm/shared/start/arm-a9mpcore-smp.c
@@ -59,7 +59,6 @@ void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
 {
   arm_gic_irq_generate_software_irq(
     ARM_GIC_IRQ_SGI_0,
-    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
     1U << target_processor_index
   );
 }
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h
index ae0a68f7bb..34bf34353e 100644
--- a/bsps/include/dev/irq/arm-gic-irq.h
+++ b/bsps/include/dev/irq/arm-gic-irq.h
@@ -79,28 +79,17 @@ void bsp_interrupt_get_affinity(
   Processor_mask *affinity
 );
 
-typedef enum {
-  ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
-  ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF,
-  ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF
-} arm_gic_irq_software_irq_target_filter;
-
-void arm_gic_trigger_sgi(
-  rtems_vector_number vector,
-  arm_gic_irq_software_irq_target_filter filter,
-  uint32_t targets
-);
+void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets);
 
 static inline rtems_status_code arm_gic_irq_generate_software_irq(
   rtems_vector_number vector,
-  arm_gic_irq_software_irq_target_filter filter,
   uint32_t targets
 )
 {
   rtems_status_code sc = RTEMS_SUCCESSFUL;
 
   if (vector <= ARM_GIC_IRQ_SGI_15) {
-    arm_gic_trigger_sgi(vector, filter, targets);
+    arm_gic_trigger_sgi(vector, targets);
   } else {
     sc = RTEMS_INVALID_ID;
   }
diff --git a/bsps/include/dev/irq/arm-gic-tm27.h b/bsps/include/dev/irq/arm-gic-tm27.h
index bfec3b22e0..ca3663a0f8 100644
--- a/bsps/include/dev/irq/arm-gic-tm27.h
+++ b/bsps/include/dev/irq/arm-gic-tm27.h
@@ -80,7 +80,6 @@ static inline void Cause_tm27_intr(void)
 {
   rtems_status_code sc = arm_gic_irq_generate_software_irq(
     ARM_GIC_TM27_IRQ_LOW,
-    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
     1U << (arm_cp15_get_multiprocessor_affinity() & 0xff)
   );
   assert(sc == RTEMS_SUCCESSFUL);
@@ -95,7 +94,6 @@ static inline void Lower_tm27_intr(void)
 {
   rtems_status_code sc = arm_gic_irq_generate_software_irq(
     ARM_GIC_TM27_IRQ_HIGH,
-    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
     1U << (arm_cp15_get_multiprocessor_affinity() & 0xff)
   );
   assert(sc == RTEMS_SUCCESSFUL);
diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c
index 9560a90d6b..bd614bc1d8 100644
--- a/bsps/shared/dev/irq/arm-gicv2.c
+++ b/bsps/shared/dev/irq/arm-gicv2.c
@@ -258,15 +258,11 @@ void bsp_interrupt_get_affinity(
   _Processor_mask_From_uint32_t(affinity, targets, 0);
 }
 
-void arm_gic_trigger_sgi(
-  rtems_vector_number vector,
-  arm_gic_irq_software_irq_target_filter filter,
-  uint32_t targets
-)
+void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
 {
   volatile gic_dist *dist = ARM_GIC_DIST;
 
-  dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(filter)
+  dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(0)
     | GIC_DIST_ICDSGIR_CPU_TARGET_LIST(targets)
 #ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
     | GIC_DIST_ICDSGIR_NSATT
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index 2bedaefcef..520a728170 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -337,16 +337,8 @@ void bsp_interrupt_get_affinity(
   _Processor_mask_From_uint32_t(affinity, targets, 0);
 }
 
-void arm_gic_trigger_sgi(
-  rtems_vector_number vector,
-  arm_gic_irq_software_irq_target_filter filter,
-  uint32_t targets
-)
+void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
 {
-  /* TODO(kmoore) Handle filter:
-   * ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
-   * ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF,
-   * ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF */
 #ifndef ARM_MULTILIB_ARCH_V4
   uint64_t mpidr;
 #else
-- 
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