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2021-07-26bsps/irq: Add rtems_interrupt_entry_install()Sebastian Huber4-9/+8
Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files. In particular, place all functions which use dynamic memory into their own file. Add optional macros to let the BSP customize the vector installation after installing the first entry and the vector removal before removing the last entry: * bsp_interrupt_vector_install() * bsp_interrupt_vector_remove() Use these new customization options in the m68k/genmcf548x BSP so re-use the generic interrupt controller support. Update #3269.
2021-07-26bsps/irq: Add rtems_interrupt_raise()Sebastian Huber3-0/+3
Add rtems_interrupt_raise_on() and rtems_interrupt_clear(). Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
2021-07-26rtems: Add rtems_interrupt_vector_enable()Sebastian Huber3-0/+3
Add rtems_interrupt_vector_disable(). Update #3269.
2021-07-26bsps/irq: Move handler iterate to separate fileSebastian Huber3-0/+3
Update #3269.
2021-07-26bsps/irq: Move get/set affinity to separate fileSebastian Huber3-0/+3
Update #3269.
2021-07-26build: Remove superfluous library from rcxx01Sebastian Huber1-1/+0
2021-07-20Fixes for TMS570 BSPRobin Mueller1-1/+1
When compiling the lwIP port for the TMS570, there were issues with the BSP. Headers are expected in a folder named ti_herc which did not exist. This fixes the issue. Furthermore, there were multiple warnings about define redefinitions. This was fixed as well.
2021-07-20STM32H7 ethernet pin correctionsRobin Mueller3-0/+44
These patches were submitted a few months ago, but it was found out that the default-by-family: [] were missing in the GPIO .yml lines. This was fixed in this patch. This patch accounts for different pins for the ETH peripheral on STM32H7 devices. For example, the Nucleo H743ZI has slightly different pins than other STM32H7 boards.
2021-07-15build: Add missing default-by-familySebastian Huber2-0/+2
Update #4468.
2021-07-15spcoverage: Remove test programSebastian Huber2-21/+0
This program contained an optional test case. It was enabled by the RTEMS_COVERAGE define. The functions under test are not implemented by RTEMS.
2021-07-15build: Fix the motorola_powerpc default baudrateChris Johns1-2/+4
2021-07-15build: Use BSP family for optionsChris Johns771-0/+771
- Optionally add support for 'default-by-family' to allow option to be set by a family and so all related BSPs Close #4468
2021-07-06build: Add option to customize the LINKFLAGSSebastian Huber3-1/+19
2021-07-02bsps/imxrt: Simplify linkcmds and make it flexibleChristian Mauderer12-67/+96
Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes it simpler to support other types of external RAM. This patch also removes some of the calculations and improves names and documentation to avoid pitfalls. It removes a unnecessary memory definition. Update #4180
2021-07-02bsps/imxrt: Allow different ARM PLL settingChristian Mauderer1-0/+1
Update #4180
2021-07-01Revert "bsps/zynqmp: Allow any or all CGEMs to be enabled"Kinsey Moore5-72/+0
This reverts commit 10041a4cfc00d5f6876d3d6cfc30c23347b4cf42. This type of configuration does not belong in RTEMS and is better constrained to libbsd where the defines are actually being used.
2021-06-29spec/aarch64: fix abi flags for xilinx_versal_ilp32_vck190Gedare Bloom1-0/+1
2021-06-28bsps/zynqmp: Allow any or all CGEMs to be enabledKinsey Moore5-0/+72
Provide the options necessary to enable any combination of CGEM ethernet interfaces in LibBSD. The default is still CGEM3, so this should continue to operate as expected on typical Zynq Ultrascale+ MPSoC development hardware.
2021-06-24bsps/aarch64: replace boot options with asm switch codeGedare Bloom4-22/+0
2021-06-24bsps/aarch64: add non-secure mode and versal supportGedare Bloom9-6/+68
2021-06-24bsps/aarch64: add physical secure timerGedare Bloom2-0/+33
2021-06-24aarch64/xilinx-versal: new BSPs for qemu and vck190Gedare Bloom18-0/+516
2021-06-24sparc: Simplify trap table initializationSebastian Huber1-0/+1
Move _ISR_Handler() to a separate file since it is now only used if a handler is installed by _CPU_ISR_install_raw_handler(). Statically initialize the traps for external interrupts to use the new _SPARC_Interrupt_trap() which directly dispatches the interrupt handlers installed by rtems_interrupt_handler_install() via the BSP-provided _SPARC_Interrupt_dispatch(). Since the trap table is now fully statically initialized, there is no longer a dependency on the Cache Manager in the default configuration. Update #4458.
2021-06-24sparc: More reliable bad trap handlingSebastian Huber4-3/+2
Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap() for all unexpected traps. This enables a proper RTEMS fatal error handling right from the start. Do not rely on the stack and register settings which caused an unexpected trap. Use the ISR stack of the processor to do the fatal error handling. Save the full context which caused the trap. Fatal error handler may use it for error logging. Unify the _CPU_Exception_frame_print() implementations and move it to cpukit. Update #4459.
2021-06-24sparc: Move ISR handler install routinesSebastian Huber1-0/+1
Move _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() to separate files. The goal is to make their use optional. Update #4458. Update #4459.
2021-06-24score: Move _ISR_Vector_table[] to separate fileSebastian Huber1-0/+1
The _ISR_Handler_initialization() does not touch the _ISR_Vector_table[]. Move the definition of _ISR_Vector_table[] to a separate file. Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
2021-06-24bsp/generic_or1k: Remove incomplete IRQ supportSebastian Huber1-3/+1
Update #3269.
2021-06-23bsps/powerpc, bsps/shared: Move remaining legacy networking header filesVijay Kumar Banerjee2-5/+0
2021-06-10score: Add PER_CPU_DATA_NEED_INITIALIZATION()Sebastian Huber1-0/+1
Make the initialization of the per-CPU data optional. Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
2021-06-10splinkersets01: Test linker sets in librarySebastian Huber3-2/+21
Make sure that the linker sets work if placed in a library (this is how they are used in RTEMS).
2021-06-09aarch64: add qemu bsps for cortex-a72Gedare Bloom12-0/+394
The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
2021-06-07arm/fvp: Remove unused GICv2 BSP optionSebastian Huber2-6/+1
Update #4202.
2021-05-28Change filesystem utime_h handler to utimens_hRyan Long1-2/+2
Also updated licenses. Closes #4400 Updates #3899
2021-05-28libcsupport: Added futimens() and utimensat()Ryan Long1-0/+3
Created futimens.c and utimensat.c to add support for the POSIX methods futimens() and utimensat(). utime() and utimes() are considered obsolote by POSIX, but RTEMS will continue to support them. Closes #4396
2021-05-27spec/aarch64: Add BSPs for real ZynqMP hardwareKinsey Moore7-2/+85
Add the BSPs for running on the ZU3EG Ultrascale+ Zynq MPSoC and alter the option defaults necessary for them to run properly using the standard BOOT.BIN configured for PetaLinux that comes in the Out-of-Box package.
2021-05-27bsps/aarch64: Add MMU driver to relax alignmentKinsey Moore5-4/+35
Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
2021-05-27bsps/a53: Increase available RAMKinsey Moore1-1/+1
The default available RAM on the A53 BSP is quite small at 8MB. This bumps that to 128MB to avoid allocation failures in tmcontext01 caused by large allocations on a cache size of 16MB reported by the system registers in QEMU.
2021-05-27bsps/aarch64: Break out system registersKinsey Moore1-0/+1
Break out system register definitions and accessors so that they're usable by other parts of RTEMS.
2021-05-20testsuites: Remove telnetd01Vijay Kumar Banerjee2-24/+0
telnetd01 test cannot be run without a network stack, so this test is being moved to the rtems-net-legacy repository.
2021-05-17score: Move _Thread_queue_Queue_get_name_and_id()Sebastian Huber1-0/+1
Move this diagnostic function to a separate file since it does not provide a core function of the system. Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
2021-05-17posix: Move clock_nanosleep()Sebastian Huber1-0/+1
Move clock_nanosleep() to a separate file to avoid a dependency on errno which pulls in the Newlib reentrancy support. This is an issue since most parts which are pulled in cannot be garbage collected by the linker due to the system initialization linker set.
2021-05-17bsps/imxrt: Fix OCRAM, ITCM and DTCM sizesChristian Mauderer7-4/+86
The sizes are configurable via fuses or per software via some registers. At the moment the registers are not changed. Changing the registers destroys data stored in the RAM areas (like application code or data). So either the fuses or some bootloader should be used to set them before the application starts. This also adds an OCRAM only linker command file. Update #4180
2021-05-14validation: Add support librarySebastian Huber4-4/+22
Add a library for support functions used by validation tests. Rename tc-support.* to tx-support.* since this file does not contain test cases.
2021-05-11score: Rename _Stack_Free_nothing()Sebastian Huber1-1/+1
Rename _Stack_Free_nothing() in _Objects_Free_nothing() to make it reusable for the message queue buffers. Update #4007.
2021-05-03bsps/riscv: Support RTEMS_NOINIT in linkcmdsSebastian Huber1-0/+7
Update #3866.
2021-04-30Use alias for rtems_task_self() and pthread_self()Sebastian Huber1-2/+1
This may reduce the code size a bit.
2021-04-27powerpc/shared/console: Make console baud rate configurable.Peter Dufault6-1/+16
The "powerpc/shared/console" code has the start-up console value fixed at 9600 baud. This changes the hard-wired constant "9600" in the code to the configuration setting "BSP_CONSOLE_BAUD" and adds configuration support in both the "waf" and the legacy configuration systems. Note that the VME BSPs beatnik, mvme3100, and mve5100 can be improved by adding a "mvmexxxx" BSP family. This configuration change, as well as future configuration changes, could then be made in a "grp.yml" file.
2021-04-23Nucleo UART3 (console) pins correctionRobin Mueller2-8/+2
Now using default pins
2021-04-22build: Remove duplicated attributesSebastian Huber2-2/+0
2021-04-20libcsupport: Move rtems_calloc()Sebastian Huber1-0/+1
Move rtems_calloc() since it only depends on rtems_malloc(). This may make it easier to customize the heap allocator. Change licence to BSD-2-Clause according to file history. Update #3053.
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