| Commit message (Collapse) | Author | Age | Files | Lines |
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The linker flag to wrap putchar was lost in translation from make to waf.
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Close #4504.
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Added I2C drivers for ZynqMP and updated build system accordingly.
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Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well.
Moved these files to shared directory in anticipation of I2C support for ZynqMP.
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Split up rbtreenext.c since only _RBTree_Minimum() is used by the operating
system core services (thread queues and the EDF scheduler).
Change license to BSD-2-Clause according to file history and re-licensing
agreement.
Update #3053.
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Move the TOD validation to the callers of _TOD_Set(). This avoids dead code in
case only rtems_clock_set() is used in an application because rtems_clock_set()
always calls _TOD_Set() with a valid time of day.
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Use _Watchdog_Ticks_per_second instead.
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The _Thread_Dispatch() function was customized over time and now the
work is done by _Thread_Do_dispatch() and specialized wrappers. The
plain _Thread_Dispatch() is now only used in some CPU ports. Move it to
a separate file to avoid dead code in the general.
Change license to BSD-2-Clause according to file history and
re-licensing agreement.
Update #3053.
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Closes #3373
confstr() style update
Signed-off-by: Eshan Dhawan <eshandhawan51@gmail.com>
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Prefix the BSP family name with "bsps/" to make it distinct to the BSP
variant names.
Update #4468.
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Split up the SMP multicast action module since the use of the SMP multicast
action variants depend on the architecture and BSP.
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Add percpujobs.c to contain the per-CPU jobs implementation.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Update #3269.
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Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files.
In particular, place all functions which use dynamic memory into their own
file.
Add optional macros to let the BSP customize the vector installation after
installing the first entry and the vector removal before removing the last
entry:
* bsp_interrupt_vector_install()
* bsp_interrupt_vector_remove()
Use these new customization options in the m68k/genmcf548x BSP so re-use the
generic interrupt controller support.
Update #3269.
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Add rtems_interrupt_raise_on() and rtems_interrupt_clear().
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
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Add rtems_interrupt_vector_disable().
Update #3269.
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Update #3269.
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Update #3269.
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When compiling the lwIP port for the TMS570, there
were issues with the BSP. Headers are expected in a folder
named ti_herc which did not exist. This fixes the issue.
Furthermore, there were multiple warnings about define redefinitions.
This was fixed as well.
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These patches were submitted a few months ago, but it was found out
that the default-by-family: [] were missing in the GPIO .yml lines.
This was fixed in this patch.
This patch accounts for different pins for the ETH peripheral
on STM32H7 devices. For example, the Nucleo H743ZI has slightly
different pins than other STM32H7 boards.
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Update #4468.
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This program contained an optional test case. It was enabled by the
RTEMS_COVERAGE define. The functions under test are not implemented by RTEMS.
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- Optionally add support for 'default-by-family' to allow
option to be set by a family and so all related BSPs
Close #4468
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Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
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Update #4180
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This reverts commit 10041a4cfc00d5f6876d3d6cfc30c23347b4cf42.
This type of configuration does not belong in RTEMS and is better
constrained to libbsd where the defines are actually being used.
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Provide the options necessary to enable any combination of CGEM ethernet
interfaces in LibBSD. The default is still CGEM3, so this should
continue to operate as expected on typical Zynq Ultrascale+ MPSoC
development hardware.
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