summaryrefslogtreecommitdiffstats
path: root/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml (unfollow)
Commit message (Collapse)AuthorFilesLines
2023-05-20Update company nameSebastian Huber1-1/+1
The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
2022-08-22spec/bsps: Do not install tm27.hChris Johns1-1/+0
Updates #4705
2022-01-15bsps: Default to CPU counter benchmark timerSebastian Huber1-1/+1
Most BSPs which used the stubbed benachmark timer provide a CPU counter. All BSPs provide at least a stub CPU counter. Simply use the benchmark timer implementation using the CPU counter.
2021-11-30libc: Optimize malloc() initializationSebastian Huber1-0/+1
The BSPs provide memory for the separate C Program Heap initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the separate C Program Heap and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs. Change licence to BSD-2-Clause according to file history. Update #3053.
2021-11-30score: Optimize Workspace Handler initializationSebastian Huber1-0/+1
The BSPs provide memory for the workspace initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the workspace handler and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs.
2021-09-21bsps/gicv2: Allow BSPs to define IRQ attributesKinsey Moore1-0/+1
ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
2021-08-09bsps: Move optfdt* files to shared parent directorypranav1-4/+4
2021-02-26bsps: Add default rtems_get_target_hash()Sebastian Huber1-0/+1
Update #4267.
2021-02-24build: Sort source listsSebastian Huber1-1/+1
Use the Python sorted() function to sort the "source" lists.
2020-12-23bsps: Use header file for GIC architecture supportSebastian Huber1-1/+0
This avoids a function call overhead in the interrupt dispatching. Update #4202.
2020-12-02bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore1-1/+2
This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
2020-09-14build: Alternative build system based on wafSebastian Huber1-0/+142
Update #3818.