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* zynqmp: Add support for the CFC-400XKinsey Moore2022-11-091-0/+1
| | | | | | | | This adds a BSP variant for the ZynqMP BSP family to support the Innoflight CFC-400X platform. To properly support the CFC-400X, device trees were added to the ZynqMP platform due to both the optional management interface as well as alternate physical configuration of the ethernet interfaces.
* spec/bsps: Do not install tm27.hChris Johns2022-08-221-1/+0
| | | | Updates #4705
* build: Use common objects item for get memorySebastian Huber2021-11-301-1/+0
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* aarch64: Break out MMU definitionsKinsey Moore2021-11-011-0/+1
| | | | | | This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints.
* bsps/gicv2: Allow BSPs to define IRQ attributesKinsey Moore2021-09-211-0/+1
| | | | | | | ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
* bsps/aarch64: Add MMU driver to relax alignmentKinsey Moore2021-05-271-0/+2
| | | | | | | | | | | | | | | Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
* bsps: Add default rtems_get_target_hash()Sebastian Huber2021-02-261-0/+1
| | | | Update #4267.
* build: Sort source listsSebastian Huber2021-02-241-5/+5
| | | | Use the Python sorted() function to sort the "source" lists.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-231-1/+0
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* Add AArch64 ZynpMP BSPKinsey Moore2020-12-041-0/+37
This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC (ZynqMP) family of chips. It is configured to be usable on the Qemu ZCU102 machine definition and should be almost trivially portable to ZynqMP development boards and custom hardware. It is also configured to be usable with libbsd.