rtems - RTEMS Kernel, file-systems, drivers, BSPs, samples, and testsuite.

	Commit message (Collapse)	Author	Files	Lines
2022-11-22	aarch64/versal: Add UART interrupt support	Chris Johns	1	-0/+1

2022-08-22	spec/bsps: Do not install tm27.h	Chris Johns	1	-1/+0
	Updates #4705
2022-07-12	irq/arm-gicv3.h: Customize CPU Interface init	Sebastian Huber	1	-1/+0
	Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
2021-11-30	build: Use common objects item for get memory	Sebastian Huber	1	-1/+0

2021-11-29	build: Remove trailing white space	Sebastian Huber	1	-1/+1

2021-11-01	aarch64: Break out MMU definitions	Kinsey Moore	1	-0/+1
	This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints.
2021-06-24	aarch64/xilinx-versal: new BSPs for qemu and vck190	Gedare Bloom	1	-9/+14

2021-05-27	bsps/aarch64: Add MMU driver to relax alignment	Kinsey Moore	1	-0/+2
	Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
2021-02-26	bsps: Add default rtems_get_target_hash()	Sebastian Huber	1	-0/+1
	Update #4267.
2021-02-24	build: Sort source lists	Sebastian Huber	1	-5/+5
	Use the Python sorted() function to sort the "source" lists.
2020-12-23	bsps: Use header file for GIC architecture support	Sebastian Huber	1	-1/+0
	This avoids a function call overhead in the interrupt dispatching. Update #4202.
2020-12-04	Add AArch64 ZynpMP BSP	Kinsey Moore	1	-8/+8
	This adds a BSP family that runs on the Xilinx Ultrascale+ MPSOC (ZynqMP) family of chips. It is configured to be usable on the Qemu ZCU102 machine definition and should be almost trivially portable to ZynqMP development boards and custom hardware. It is also configured to be usable with libbsd.
2020-12-02	bsps: Move ARM GICv2 driver to bsps/shared	Kinsey Moore	1	-1/+1
	This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
2020-10-05	bsps: Add Cortex-A53 LP64 basic BSP	Kinsey Moore	1	-0/+37
	This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT.