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* bsps/aarch64/raspberrypi: Add system timer supportHEADmasterNing Yang13 hours1-3/+0
| | | | | | | | | | The clock from the ARM timer is derived from the system clock. This clock can change dynamically e.g. if the system goes into reduced power or in low power mode. Thus the clock speed adapts to the overall system performance capabilities. For accurate timing it is recommended to use the system timers. if BSP_CLOCK_USE_SYSTEMTIMER = 1, use the System Timer, otherwise use the ARM Timer.
* irq/arm-gicv3.h: Customize CPU Interface initSebastian Huber2022-07-121-1/+0
| | | | | | | Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
* build: Add cppflags, cflags, cxxflags to groupsSebastian Huber2022-07-041-0/+3
| | | | | | | Propagate the group defined cppflags, cflags, and cxxflags from parent groups to child items through the build item context. Update #4670.
* bsps: Add <dev/irq/arm-gicv3.h>Sebastian Huber2022-04-061-0/+1
| | | | | | | | Separate the Interrupt Manager implementation from the generic Arm GICv3 support. Move parts of the Arm GICv3 support into a new header file. This helps to support systems with a clustered structure in which multiple GICv3 instances are present. For example, two clusters of two Cortex-R52 cores where each cluster has a dedicated GICv3 instance.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-231-0/+1
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* spec/aarch64: Ensure that libbsd can build properlyKinsey Moore2020-11-231-0/+4
| | | | | These files are required for libbsd to build against the AArch64 A53 BSPs.
* bsps: Add Cortex-A53 LP64 basic BSPKinsey Moore2020-10-051-0/+24
This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT.