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* spec/bsps: Do not install tm27.hChris Johns2022-08-221-1/+0
| | | | Updates #4705
* irq/arm-gicv3.h: Customize CPU Interface initSebastian Huber2022-07-121-1/+0
| | | | | | | Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
* build: Use common objects item for get memorySebastian Huber2021-11-301-1/+0
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* aarch64: Break out MMU definitionsKinsey Moore2021-11-011-0/+1
| | | | | | This moves the AArch64 MMU memory type definitions into cpukit for use by libdebugger since remapping of memory is required to insert software breakpoints.
* bsps: Add default rtems_get_target_hash()Sebastian Huber2021-02-261-0/+1
| | | | Update #4267.
* build: Sort source listsSebastian Huber2021-02-241-6/+6
| | | | Use the Python sorted() function to sort the "source" lists.
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-231-1/+0
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-021-1/+1
| | | | | This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
* bsps: Add Cortex-A53 LP64 basic BSPKinsey Moore2020-10-051-0/+37
This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT.