| Commit message (Collapse) | Author | Files | Lines |
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This value depends on the _Heap_Initialize() call sequence and carries
no useful information.
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closes #2059
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Add multilib section for ARM and PowerPC
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* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
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Add lifetime bytes allocated and freed since they were present in the
malloc statistics. Add number of failed allocations.
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Print out heap statistics via the MALLOC and WKSPACE shell commands.
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Use the heap handler statistics instead. Add heap walk option to MALLOC
shell command.
close #1367
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close #2030
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Use a normal command for shutdown via exit().
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Move interrupt lock to device context and expose only this structure to
the read, write and set attributes device handler. This makes these
device handler independent of the general Termios infrastructure
suitable for direct use in printk() support.
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This change starts with removing the effectively empty file
timerdrv.h. The prototypes for benchmark_timer_XXX() were in
btimer.h which was not universally used. Thus every use of
timerdrv.h had to be changed to btimer.h. Then the prototypes
for benchmark_timer_read() had to be adjusted to return
benchmark_timer_t rather than int or uint32_t.
I took this opportunity to also correct the file headers to
separate the copyright from the file description comments which
is needed to ensure the copyright isn't propagated into Doxygen
output.
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This command lets you get an MD5 hash for a file in an RTEMS file system.
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The ping code is taken from a recent FreeBSD release. Some options have been
tested, other not tested or do not work. This could be due to the age of
our TCP/IP stack.
This version of ping will not work if more than 64 file descriptors are
open at once because the select FD size is 64 as set in newlib.
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Add rtems_clock_tick_later(), rtems_clock_tick_later_usec() and
rtems_clock_tick_before().
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Update documentation.
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The following scheduler operations return a thread in need for help
- unblock,
- change priority, and
- yield.
A thread in need for help is a thread that encounters a scheduler state
change from scheduled to ready or a thread that cannot be scheduled in
an unblock operation. Such a thread can ask threads which depend on
resources owned by this thread for help.
Add a new ask for help scheduler operation. This operation is used by
_Scheduler_Ask_for_help() to help threads in need for help returned by
the operations mentioned above. This operation is also used by
_Scheduler_Thread_change_resource_root() in case the root of a resource
sub-tree changes. A use case is the ownership change of a resource.
In case it is not possible to schedule a thread in need for help, then
the corresponding scheduler node will be placed into the set of ready
scheduler nodes of the scheduler instance. Once a state change from
ready to scheduled happens for this scheduler node it may be used to
schedule the thread in need for help.
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This enables proper resource dependency tracking and as a side-effect
deadlock detection.
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Do not change the scheduler with this function. Documentation. Coding
style.
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Add basic support for the Multiprocessor Resource Sharing Protocol
(MrsP).
The Multiprocessor Resource Sharing Protocol (MrsP) is defined in A.
Burns and A.J. Wellings, A Schedulability Compatible Multiprocessor
Resource Sharing Protocol - MrsP, Proceedings of the 25th Euromicro
Conference on Real-Time Systems (ECRTS 2013), July 2013. It is a
generalization of the Priority Ceiling Protocol to SMP systems. Each
MrsP semaphore uses a ceiling priority per scheduler instance. These
ceiling priorities can be specified with rtems_semaphore_set_priority().
A task obtaining or owning a MrsP semaphore will execute with the
ceiling priority for its scheduler instance as specified by the MrsP
semaphore object. Tasks waiting to get ownership of a MrsP semaphore
will not relinquish the processor voluntarily. In case the owner of a
MrsP semaphore gets preempted it can ask all tasks waiting for this
semaphore to help out and temporarily borrow the right to execute on one
of their assigned processors.
The help out feature is not implemented with this patch.
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The function to change a thread priority was too complex. Simplify it
with a new scheduler operation. This increases the average case
performance due to the simplified logic. The interrupt disabled
critical section is a bit prolonged since now the extract, update and
enqueue steps are executed atomically. This should however not impact
the worst-case interrupt latency since at least for the Deterministic
Priority Scheduler this sequence can be carried out with a wee bit of
instructions and no loops.
Add _Scheduler_Change_priority() to replace the sequence of
- _Thread_Set_transient(),
- _Scheduler_Extract(),
- _Scheduler_Enqueue(), and
- _Scheduler_Enqueue_first().
Delete STATES_TRANSIENT, _States_Is_transient() and
_Thread_Set_transient() since this state is now superfluous.
With this change it is possible to get rid of the
SCHEDULER_SMP_NODE_IN_THE_AIR state. This considerably simplifies the
implementation of the new SMP locking protocols.
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Add some terms.
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The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accomplished with a boolean
indicator in the task context. The processor architecture specific
low-level task context switch code will mark that a task context is no
longer executing and waits that the heir context stopped execution
before it restores the heir context and resumes execution of the heir
task. So there is one point in time in which a processor is without a
task. This is essential to avoid cyclic dependencies in case multiple
tasks migrate at once. Otherwise some supervising entity is necessary to
prevent life-locks. Such a global supervisor would lead to scalability
problems so this approach is not used. Currently the thread dispatch is
performed with interrupts disabled. So in case the heir task is
currently executing on another processor then this prolongs the time of
disabled interrupts since one processor has to wait for another
processor to make progress.
It is difficult to avoid this issue with the interrupt latency since
interrupts normally store the context of the interrupted task on its
stack. In case a task is marked as not executing we must not use its
task stack to store such an interrupt context. We cannot use the heir
stack before it stopped execution on another processor. So if we enable
interrupts during this transition we have to provide an alternative task
independent stack for this time frame. This issue needs further
investigation.
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Avoid the SMP_FATAL_SCHEDULER_WITHOUT_PROCESSORS fatal error and make it
a run-time error in rtems_scheduler_ident() and _Scheduler_Get_by_id().
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Mark POSIX Keys and POSIX Key Value Pairs as supported.
Add list of unsupported object classes.
Add hint to unified work areas.
Add example.
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Use register g6 for the per-CPU control of the current processor. The
register g6 is reserved for the operating system by the SPARC ABI. On
Linux register g6 is used for a similar purpose with the same method
since 1996.
The register g6 must be initialized during system startup and then must
remain unchanged.
Since the per-CPU control is used in all critical sections of the
operating system, this is a performance optimization for the operating
system core procedures. An additional benefit is that the low-level
context switch and interrupt processing code is now identical on non-SMP
and SMP configurations.
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The registers g2 through g4 are reserved for applications. GCC uses
them as volatile registers by default. So they are treated like
volatile registers in RTEMS as well.
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The TLS section symbols had wrong values in case of an empty TLS data
section and a nonempty TLS BSS section.
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