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1998-10-19Nearly everything that can be is now automatically generated.Joel Sherrill18-1183/+92
1998-10-19All files as automatically generated as possible.Joel Sherrill7-218/+18
1998-10-19Renamed.Joel Sherrill1-0/+0
1998-10-19New file.Joel Sherrill1-0/+86
1998-10-19Removed.Joel Sherrill2-241/+0
1998-10-19More automatically generated. Many files renamed behind the scenes.Joel Sherrill10-872/+45
1998-10-19Makefiles in much better shape even though not all files have automaticallyJoel Sherrill22-102/+223
generated menus yet.
1998-10-19Timing Chapter is now shared and menu structure generated.Joel Sherrill4-32/+47
Cpumodel.texi is now generated.
1998-10-19Now completed generated with build menu.Joel Sherrill2-37/+51
1998-10-19New fileJoel Sherrill1-0/+108
1998-10-19Worksheets now generated from a common file and the node info structureJoel Sherrill8-85/+194
is generated automatically.
1998-10-19Added chapter.Joel Sherrill3-6/+123
1998-10-19Added chapter.Joel Sherrill2-2/+95
1998-10-19Added chapter.Joel Sherrill3-3/+40
1998-10-19Added chapter.Joel Sherrill4-5/+246
1998-10-19Added chapter.Joel Sherrill2-6/+263
1998-10-19Added.Joel Sherrill3-3/+100
1998-10-19Added 2 chaptersJoel Sherrill4-0/+338
1998-10-12Added idle_task_stack_size field to CPU Table.Joel Sherrill11-0/+66
1998-08-20Made the description of timeing generation more accurate.Joel Sherrill2-8/+42
1998-08-20Changed wording to read better for PSIM.Joel Sherrill2-2/+2
1998-08-20New times.Joel Sherrill2-168/+169
1998-08-20Changed distribution level for this document.Joel Sherrill1-1/+1
1998-08-13New times for 4.0.0-lmcoJoel Sherrill5-269/+278
1998-08-13Switched from presenting timing data based on CPU models to presenting itJoel Sherrill19-155/+162
based on board model.
1998-08-13New fileJoel Sherrill1-0/+247
1998-08-13Added DMV177 times files and made this all regenerate with two timingJoel Sherrill10-59/+1726
chapters.
1998-08-13Added bswap feature.Joel Sherrill2-4/+30
1998-06-01Added text from Erik Ivanenko <erik.ivanenko@utoronto.ca> describingJoel Sherrill2-144/+172
transition from real to protected mode and modified the spacing.
1998-04-11Corrected paths after moving all supplements into a subdirectory.Joel Sherrill22-82/+82
1998-03-30Taking care of minor build problemsJoel Sherrill2-5/+3
1998-03-30Making the stanza right and improving the way the isntall directories are builtJoel Sherrill6-91/+45
1998-03-30Corrected distribution levels for htmlJoel Sherrill6-6/+6
1998-03-30Added distribution level to each manualJoel Sherrill6-6/+18
1998-03-26New file. Basically m68k version with Hitachi SH comments thrown in.Joel Sherrill1-0/+102
1998-03-26Added variables for dates and revision infoJoel Sherrill6-24/+24
1998-02-11updatesJoel Sherrill17-655/+540
1998-02-06Updated copyrightsJoel Sherrill106-106/+106
1998-01-23minor updates .. mostly versionJoel Sherrill10-76/+76
1997-12-02Modified SPARC to PowerPC. Modified specific requirements to beJennifer Averett2-14/+14
for the PowerPC instead of the SPARC.
1997-12-02Added definations for serial_per_sec, serial_rate, and serial_xon_xoff.Jennifer Averett2-12/+12
1997-12-02Modified referances to SPARC to PowerPC. Updated the Information Table toJennifer Averett2-12/+46
match the one in CPU.H. Added spurious_handler and exceptions_in_RAM items. Added definations for clicks_per_usec, spurious_handler,exceptions_in_RAM, serial_external_clock, serial_cts_rts, timer_average_overhead, and timer_least_valid.
1997-08-04Fixed wildcard in copy command.Joel Sherrill1-1/+1
1997-08-04Fixed node links.Joel Sherrill3-3/+3
1997-07-31Corrected bug in MakefileJoel Sherrill1-1/+1
1997-07-31corrected typos and changes LANGUAGE to RTEMS-LANGUAGE.Joel Sherrill11-18/+30
1997-07-31Added more info.Joel Sherrill6-272/+276
1997-07-02Updated to the PowerPC.Joel Sherrill2-2/+70
1997-07-02updated to properly reflect powerpcJoel Sherrill6-228/+86
1997-07-01New files -- PowerPC supplement is based on the SPARC supplement.Joel Sherrill20-0/+3307
This version has had some initial work done to convert it to be PowerPC specific.
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