| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename _Scheduler_simple_Update() in _Scheduler_default_Update().
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Rename _Scheduler_simple_Allocate() in _Scheduler_default_Allocate().
Rename _Scheduler_simple_Free() in _Scheduler_default_Free().
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Rename _Scheduler_priority_Release_job() into
_Scheduler_default_Release_job().
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This define is no longer used.
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Use the POSIX configuration value directly. Use right type early and
avoid casts. Use proper unlimited objects API. Check workspace
allocation. Make functions static.
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Move implementation specific parts of key.h and key.inl into new header
file keyimpl.h. The key.h contains now only the application visible
API.
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This patch enables unlimited model in POSIX key manger and have a decent
runtime on POSIX key searching, adding and deleting operations. Memory
overhead is lower than current implementation when the size of key and key
value becomes big.
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The set of interrupt levels must be a continuous range of non-negative
integers starting at zero.
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Add context parameter to _Thread_Start_multitasking() and use this
function in rtems_smp_secondary_cpu_initialize(). This avoids
duplication of code.
Fix missing floating point context initialization in
rtems_smp_secondary_cpu_initialize(). Now performed via
_Thread_Start_multitasking().
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Nothing happened between the SYSTEM_STATE_BEGIN_MULTITASKING to
SYSTEM_STATE_UP transition.
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Two issues are addressed.
1. On single processor configurations the set/get of the now/uptime
timestamps is now consistently protected by ISR disable/enable
sequences. Previously nested interrupts could observe partially written
values since 64-bit writes are not atomic on 32-bit architectures in
general. This could lead to non-monotonic uptime timestamps.
2. The TOD now/uptime maintanence is now independent of the giant lock.
This is the first step to remove the giant lock in _Thread_Dispatch().
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Move the nanoseconds since last tick support from the Watchdog to the
TOD handler. Now the TOD managment is encapsulated in the TOD_Control
structure.
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Fix _times().
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ISR locks are low-level locks to protect critical sections accessed by
threads and interrupt service routines.
On single processor configurations the ISR locks degrade to simple ISR
disable/enable sequences. No additional storage or objects are
required.
This synchronization primitive is supported on SMP configurations. Here
SMP locks are used.
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Delete _Per_CPU_Information_p.
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Avoid infinite loops due to compiler optimization.
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Use an event triggered unicast to inform remote processors about a
necessary thread dispatch instead.
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Rename to _RTEMS_Tasks_Dispatch_if_necessary().
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Delete _Thread_Signal_notification() since this is a side-effect of
_POSIX_signals_Unblock_thread().
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Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(),
_ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash().
The ISR disable/enable interface has no parameter to pass a specific
object. Thus it is only possible to implement a single global lock
object with this interface. Using the ISR disable/enable as the giant
lock on SMP configurations is not feasible.
Potentially blocking resource obtain sequences protected by the thread
dispatch disable level are subdivided into smaller ISR disabled critical
sections. This works since on single processor configurations there is
only one thread of execution that can block. On SMP this is different
(image a mutex obtained concurrently by different threads on different
processors).
The thread dispatch disable level is currently used as the giant lock.
There is not need to complicate things with this unused interface.
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If we enter _Thread_Dispatch() then _Thread_Dispatch_disable_level must
be zero. Single processor RTEMS assumes that stores of non-zero values
to _Thread_Dispatch_disable_level are observed by interrupts as non-zero values.
Move the _Thread_Dispatch_set_disable_level( 1 ) out of the first ISR
disabled critical section. In case interrupts happen between the
_Thread_Dispatch_set_disable_level( 1 ) and _ISR_Disable( level ) then
the interrupt will observe a non-zero _Thread_Dispatch_disable_level and
will not issue a _Thread_Dispatch() and we can enter the ISR disabled
section directly after interrupt processing.
This change leads to symmetry between the single processor and SMP
configuration.
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Thread dispatching must be repressed to use the per CPU control of the
current processor consistently.
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Add and use _Per_CPU_Get_by_index() and _Per_CPU_Get_index(). Add
_Per_CPU_Send_interrupt(). This avoids direct access of
_Per_CPU_Information.
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FIXME: This area needs proper locking.
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the error.
The change lets the mrfs_fsrdwr test pass.
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Delete TOD_MICROSECONDS_PER_SECOND, TOD_MICROSECONDS_TO_TICKS() and
TOD_MILLISECONDS_TO_TICKS().
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Move implementation specific parts of object.h and object.inl into new
header file objectimpl.h. The object.h contains now only the
application visible API.
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