| Commit message (Collapse) | Author | Files | Lines |
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====
-4 = {d = -4, i = {0xc0100000, 0x0}} s=1 e=0x80 m=0x100000 (0x0900000)
-3 = {d = -3, i = {0xc0080000, 0x0}} s=1 e=0x80 m=0x080000 (0x0880000)
-2 = {d = -2, i = {0xc0000000, 0x0}} s=1 e=0x80 m=0x000000 (0x0800000)
-1 = {d = -1, i = {0xbff00000, 0x0}} s=1 e=0x7f m=0x000000 (0x0800000)
0 = {d = 0, i = {0x00000000, 0x0}} s=0 e=0 m=0x000000 (0x0800000)
1 = {d = 1, i = {0x3ff00000, 0x0}} s=0 e=0x7f m=0x000000 (0x0800000)
2 = {d = 2, i = {0x40000000, 0x0}} s=0 e=0 m=0x000000 (0x0800000)
3 = {d = 3, i = {0x40080000, 0x0}} s=0 e=0 m=0x080000 (0x0880000)
C4X
===
-4 = {d = -4, i = {0x01800000, 0x0}} s=1 e=1 m=0x800000 (0x1000000)
-3 = {d = -3, i = {0x01c00000, 0x0}} s=1 e=1 m=0xa00000 (0x1400000)
-2 = {d = -2, i = {0x00800000, 0x0}} s=1 e=0 m=0x800000 (0x1000000)
-1 = {d = -1, i = {0xff800000, 0x0}} s=1 e=0xff m=0x000000 (0x1000000)
0 = {d = 0, i = {0x80000000, 0x0}} s=0 e=0 m=0x000000 (0x0800000)
1 = {d = 1, i = {0x00000000, 0x0}} s=0 e=0x7f m=0x000000 (0x0800000)
2 = {d = 2, i = {0x01000000, 0x0}} s=0 e=1 m=0x400000 (0x0800000)
3 = {d = 3, i = {0x01400000, 0x0}} s=0 e=1 m=0x600000 (0x0c00000)
4 = {d = 4, i = {0x02000000, 0x0}} s=0 e=2 m=0xXXXXXX (0x0000000)
0x1010 0000
0101 0000
0010 1002
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fast mutexes that bypass the API level to directly interface with the
SuperCore.
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in ROM.
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is available.
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the correct circumstances of DMA buffer size, serial
line interrupts, and ethernet interrupts the termios osend routine would
lock up waiting for the raw output buffer semaphore.
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that switches the sparc from targopts.h to cpuopts.h.
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That BSP now has a stub clock driver so the tests can link even
if they won't execute. A handful of Makefiles had to be updated
and we had to account for printk.c being a shared file now.
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<valette@crf.canon.fr> and Emmanuel Raguet <raguet@crf.canon.fr>
of Canon CRF - Communication Dept. This port includes a
basic BSP that is sufficient to link hello world.
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a BSP (c4xsim) supporting the simulator included with gdb. This port
was done by Joel Sherrill and Jennifer Averett of OAR Corporation.
Also included with this port is a space/time optimization to eliminate
FP context switch management on CPUs without hardware or software FP.
An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8)
on this CPU. This required addressing alignment checks and assumptions
as well as fixing code that assumed sizeof(unsigned32) == 4.
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a BSP (c4xsim) supporting the simulator included with gdb. This port
was done by Joel Sherrill and Jennifer Averett of OAR Corporation.
Also included with this port is a space/time optimization to eliminate
FP context switch management on CPUs without hardware or software FP.
An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8)
on this CPU. This required addressing alignment checks and assumptions
as well as fixing code that assumed sizeof(unsigned32) == 4.
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This update addresses the following:
+ the ISR enable/disable/flash macros now work with old gcc versions.
+ the UI CCR bits are now masked since other example code did so
+ _ISR_Dispatch disables interrupts during call setup
Together these removed the instabilities he was seeing.
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routines and structures that require CPU model specific information
are now in libcpu. This primarily required moving erc32 specific
information from score/cpu files to libcpu/sparc and the erc32 BSP.
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using cpuopts.h and not targopts.h.
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routines and structures that require CPU model specific information
are now in libcpu. This required significant rework of the
score/cpu header files and the creation of multiple header files
and subdirectories in libcpu/i960.
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that decouples exec/ for the sh, m68k and i960 from targopts.h.
NOTE: The change to system.h is a hack to enable cpuopts.h
for some targets, but keep using targopts.h for others - I know it
does *not* work for sparc, mips, i386 and ppc. This will have
to be addressed as work continues on multilibing.
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that addresses aspects of the targopts.h multilib related
issues.
Changes:
* Move targopts.h to libbsp/include, because the current targopts.h
actually is a per-BSP-header and therefore can not stay below exec/.
* Introduce an autoheader generated header file
(exec/score/include/rtems/score/cpuopts.h), which shall take per-cpu
configuration options only.
* Move all autoconf-detectable/configure specified per-cpu
option-defines from targopts.h to cpuopts.h.
* Add Makefiles to the libbsp/shared directory hierarchy.
Notes:
* The new per-bsp targopts.h in libbsp includes the per-cpu
cpuopts.h. This way, the new targopts.h is kept backward compatible
to the old targopts.h and existing BSPs which (carelessly) include
targopts.h (i386, ppc) should be kept working when using the
multilib-disabled configuration scheme.
* cpuopts.h is not yet complete, because the per-BSP make-targopts
rules from custom/<BSP>.cfg files can not be applied to files below
exec/ when building multilibs.
* All files below exec/ should not include targopts.h anymore, but
should include cpuopts.h instead. However, eliminating inclusion of
targopts.h currently triggers further structural / header file inclusion
related issues, because several ports apply BSP or CPU_MODEL specific
defines from targopts.h below exec/
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from score/cpu to libcpu because the determination of which to use is
based on RTEMS_CPU_MODEL. Thus it can not be determined based solely on
multilib information.
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where alarm() did not correctly account for the watchdog start_time
and stop_time fields being based on ticks not seconds. This resulted
in alarm() returning a bogus number of seconds remaining.
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static inline routine _CORE_mutex_Seize_interrupt_trylock since
static routines are not included when in an application.
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<elkolli@crf.canon.fr> to add support for the mbx860_005b.
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semaphore/mutex can be obtained immediately, this cuts execution time
by 50%.
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with interrupts disabled.
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if the mutex is successfully obtained.
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code remaining here now only blocks.
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dispatching -- disabled.
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_Interrupt_Manager_initialization.
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to be consistent with other ports.
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shuts down on error -- not exitting the system.
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