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* bsp/x86_64: Minimal bootable BSPAmaan Cheval2018-07-1113-1/+896
* riscv: Add LADDR assembler defineSebastian Huber2018-07-062-2/+12
* riscv: Implement CPU counterSebastian Huber2018-07-062-2/+16
* riscv: Clear reservationsSebastian Huber2018-07-055-6/+25
* posix: Check for new <pthread.h> prototypesSebastian Huber2018-07-055-9/+40
* riscv: Fix fcsr initializationSebastian Huber2018-07-022-1/+19
* score: Increase PER_CPU_CONTROL_SIZE_APPROXSebastian Huber2018-06-291-1/+1
* riscv: Fix SMP context switch supportSebastian Huber2018-06-291-2/+2
* riscv: Add SMP context switch supportSebastian Huber2018-06-291-0/+47
* riscv: Add floating-point supportSebastian Huber2018-06-298-50/+538
* riscv: Fix global constructionSebastian Huber2018-06-293-6/+7
* riscv: Add TLS supportSebastian Huber2018-06-292-0/+9
* riscv: Remove dead codeSebastian Huber2018-06-291-41/+1
* riscv: Optimize context switch and interruptsSebastian Huber2018-06-296-174/+255
* riscv: Fix _CPU_Context_Initialize() prototypeSebastian Huber2018-06-292-12/+12
* riscv: Fix interrupt save/restoreSebastian Huber2018-06-291-1/+1
* riscv: Implement _CPU_Context_validate()Sebastian Huber2018-06-292-160/+168
* riscv: Make some CPU port defines visible to asmSebastian Huber2018-06-292-37/+49
* riscv: Implement _CPU_Context_volatile_clobber()Sebastian Huber2018-06-292-16/+16
* riscv: Remove mstatus from thread contextSebastian Huber2018-06-294-27/+14
* riscv: Remove x8 initializationSebastian Huber2018-06-291-2/+0
* riscv: Properly align the thread stackSebastian Huber2018-06-291-3/+7
* riscv: Do not clear thread contextSebastian Huber2018-06-291-5/+2
* riscv: Fix CPU_STACK_ALIGNMENTSebastian Huber2018-06-291-1/+2
* riscv: Remove RISCV_GCC_RED_ZONE_SIZESebastian Huber2018-06-292-5/+1
* riscv: Enable interrupts during dispatch after ISRSebastian Huber2018-06-295-55/+91
* riscv: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2018-06-282-0/+23
* riscv: Avoid namespace pollutionSebastian Huber2018-06-283-10/+4
* riscv: Optimize and fix interrupt disable/enableSebastian Huber2018-06-281-15/+16
* riscv: Add dummy SMP supportSebastian Huber2018-06-282-125/+27
* build: Enable RISC-V SMP buildSebastian Huber2018-06-281-1/+1
* riscv: Implement ISR set/get levelSebastian Huber2018-06-282-9/+18
* bsp/riscv: Load global pointerSebastian Huber2018-06-271-2/+0
* riscv: Format assembler filesSebastian Huber2018-06-274-435/+437
* Rework initialization and interrupt stack supportSebastian Huber2018-06-2741-1275/+142
* score: Add CPU_INTERRUPT_STACK_ALIGNMENTSebastian Huber2018-06-2718-0/+45
* console: Add missing return statusSebastian Huber2018-06-271-0/+2
* Remove unused CPU_MODES_INTERRUPT_LEVELSebastian Huber2018-06-273-3/+0
* score: Macros to declare and define global symbolsSebastian Huber2018-06-211-1/+33
* stackchk: Add SMP supportSebastian Huber2018-06-202-38/+67
* stackchk: Refactor Stack_check_Dump_threads_usageSebastian Huber2018-06-201-60/+49
* stackchk: Remove dead codeSebastian Huber2018-06-202-26/+2
* config: SMP only CONFIGURE_MAXIMUM_PROCESSORSSebastian Huber2018-06-201-1/+3
* arm: Simplify CPU counter supportSebastian Huber2018-06-151-2/+5
* Add _CPU_Counter_frequency()Sebastian Huber2018-06-1536-7/+103
* Add RTEMS_SYSINIT_CPU_COUNTERSebastian Huber2018-06-151-1/+2
* Reassign system initilization order numbersSebastian Huber2018-06-151-39/+39
* powerpc: Fix ss555 buildSebastian Huber2018-06-071-6/+0
* Add RTEMS_FATAL_SOURCE_INVALID_HEAP_FREESebastian Huber2018-06-053-7/+10
* Update rtems_fatal_source_text()Sebastian Huber2018-06-051-2/+3