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Age
Files
Lines
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*
fs/jffs2: use rbtree postorder iteration helper instead of opencoding
Cody P Schafer
2018-07-16
2
-49
/
+5
*
linux: Add rbtree_postorder_for_each_entry_safe()
Sebastian Huber
2018-07-16
1
-0
/
+16
*
linux: Simplify <linux/rbtree.h>
Sebastian Huber
2018-07-16
2
-47
/
+39
*
linux: Install <linux/rbtree.h>
Sebastian Huber
2018-07-16
2
-0
/
+1
*
score: Add postorder tree iteration support
Sebastian Huber
2018-07-16
3
-0
/
+148
*
x86_64/console: Add NS16550 polled console driver
Amaan Cheval
2018-07-11
2
-0
/
+17
*
bsp/x86_64: Minimal bootable BSP
Amaan Cheval
2018-07-11
13
-1
/
+896
*
riscv: Add LADDR assembler define
Sebastian Huber
2018-07-06
2
-2
/
+12
*
riscv: Implement CPU counter
Sebastian Huber
2018-07-06
2
-2
/
+16
*
riscv: Clear reservations
Sebastian Huber
2018-07-05
5
-6
/
+25
*
posix: Check for new <pthread.h> prototypes
Sebastian Huber
2018-07-05
5
-9
/
+40
*
riscv: Fix fcsr initialization
Sebastian Huber
2018-07-02
2
-1
/
+19
*
score: Increase PER_CPU_CONTROL_SIZE_APPROX
Sebastian Huber
2018-06-29
1
-1
/
+1
*
riscv: Fix SMP context switch support
Sebastian Huber
2018-06-29
1
-2
/
+2
*
riscv: Add SMP context switch support
Sebastian Huber
2018-06-29
1
-0
/
+47
*
riscv: Add floating-point support
Sebastian Huber
2018-06-29
8
-50
/
+538
*
riscv: Fix global construction
Sebastian Huber
2018-06-29
3
-6
/
+7
*
riscv: Add TLS support
Sebastian Huber
2018-06-29
2
-0
/
+9
*
riscv: Remove dead code
Sebastian Huber
2018-06-29
1
-41
/
+1
*
riscv: Optimize context switch and interrupts
Sebastian Huber
2018-06-29
6
-174
/
+255
*
riscv: Fix _CPU_Context_Initialize() prototype
Sebastian Huber
2018-06-29
2
-12
/
+12
*
riscv: Fix interrupt save/restore
Sebastian Huber
2018-06-29
1
-1
/
+1
*
riscv: Implement _CPU_Context_validate()
Sebastian Huber
2018-06-29
2
-160
/
+168
*
riscv: Make some CPU port defines visible to asm
Sebastian Huber
2018-06-29
2
-37
/
+49
*
riscv: Implement _CPU_Context_volatile_clobber()
Sebastian Huber
2018-06-29
2
-16
/
+16
*
riscv: Remove mstatus from thread context
Sebastian Huber
2018-06-29
4
-27
/
+14
*
riscv: Remove x8 initialization
Sebastian Huber
2018-06-29
1
-2
/
+0
*
riscv: Properly align the thread stack
Sebastian Huber
2018-06-29
1
-3
/
+7
*
riscv: Do not clear thread context
Sebastian Huber
2018-06-29
1
-5
/
+2
*
riscv: Fix CPU_STACK_ALIGNMENT
Sebastian Huber
2018-06-29
1
-1
/
+2
*
riscv: Remove RISCV_GCC_RED_ZONE_SIZE
Sebastian Huber
2018-06-29
2
-5
/
+1
*
riscv: Enable interrupts during dispatch after ISR
Sebastian Huber
2018-06-29
5
-55
/
+91
*
riscv: Add _CPU_Get_current_per_CPU_control()
Sebastian Huber
2018-06-28
2
-0
/
+23
*
riscv: Avoid namespace pollution
Sebastian Huber
2018-06-28
3
-10
/
+4
*
riscv: Optimize and fix interrupt disable/enable
Sebastian Huber
2018-06-28
1
-15
/
+16
*
riscv: Add dummy SMP support
Sebastian Huber
2018-06-28
2
-125
/
+27
*
build: Enable RISC-V SMP build
Sebastian Huber
2018-06-28
1
-1
/
+1
*
riscv: Implement ISR set/get level
Sebastian Huber
2018-06-28
2
-9
/
+18
*
bsp/riscv: Load global pointer
Sebastian Huber
2018-06-27
1
-2
/
+0
*
riscv: Format assembler files
Sebastian Huber
2018-06-27
4
-435
/
+437
*
Rework initialization and interrupt stack support
Sebastian Huber
2018-06-27
41
-1275
/
+142
*
score: Add CPU_INTERRUPT_STACK_ALIGNMENT
Sebastian Huber
2018-06-27
18
-0
/
+45
*
console: Add missing return status
Sebastian Huber
2018-06-27
1
-0
/
+2
*
Remove unused CPU_MODES_INTERRUPT_LEVEL
Sebastian Huber
2018-06-27
3
-3
/
+0
*
score: Macros to declare and define global symbols
Sebastian Huber
2018-06-21
1
-1
/
+33
*
stackchk: Add SMP support
Sebastian Huber
2018-06-20
2
-38
/
+67
*
stackchk: Refactor Stack_check_Dump_threads_usage
Sebastian Huber
2018-06-20
1
-60
/
+49
*
stackchk: Remove dead code
Sebastian Huber
2018-06-20
2
-26
/
+2
*
config: SMP only CONFIGURE_MAXIMUM_PROCESSORS
Sebastian Huber
2018-06-20
1
-1
/
+3
*
arm: Simplify CPU counter support
Sebastian Huber
2018-06-15
1
-2
/
+5
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