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8 daysbsps/riscv: Add Microchip PolarFire SoC BSP variantPadmarao Begari2-2/+2
The Microchip PolarFire SoC support is implemented as a riscv BSP variant to boot with any individual hart(cpu core) or SMP based on the boot HARTID configurable and support components are 4 CPU Cores (U54), Interrupt controller (PLIC), Timer (CLINT), UART.
10 daysDo not use RTEMS_INLINE_ROUTINESebastian Huber41-121/+121
Directly use "static inline" which is available in C99 and later. This brings the RTEMS implementation closer to standard C. Close #3935.
2022-09-12score: Prevent an out of bounds warningSebastian Huber1-2/+7
Update #4702.
2022-09-09score: Remove _CPU_Counter_difference()Sebastian Huber20-177/+12
All CPU ports used the same _CPU_Counter_difference() implementation. Remove this CPU port interface and mandate a monotonically increasing CPU counter. Close #3456.
2022-09-08powerpc: Add support for VRSAVESebastian Huber3-15/+92
The VRSAVE feature of the Altivec unit can be used to reduce the amount of Altivec registers which need to be saved/restored during interrupt processing and context switches. In order to use the VRSAVE optimization a corresponding multilib (-mvrsave) is required, see GCC configuration. The -mvrsave option must be added to the ABI_FLAGS of the BSP. Currently only the -mcpu=e6500 based QorIQ BSP support this optimization. Update #4712.
2022-08-19cpu.h: Fix gcc 12 warningsRyan Long1-2/+18
Added two pragmas to address, and changed the value of AARCH64_EXCEPTION_MAKE_ENUM_64_BIT to INT_MAX because the old value was not in range of an int. Updates #4662
2022-07-29cpukit/libdl: Add support for AArch64Ryan Long1-0/+256
rtl-mdreloc-aarch64.c and elf_machdep.h came from NetBSD. Updates #4682
2022-07-28score: Use PTHREAD_CANCELED for _Thread_Cancel()Sebastian Huber1-5/+5
The rtems_task_delete() directive is basically just a combined pthread_cancel() and pthread_join(). In addition, it removes the PTHREAD_DETACHED state. The exit value returned by pthread_join() of threads cancelled by rtems_task_delete() should reflect this by getting a PTHREAD_CANCELED value instead of NULL which could be a normal exit value. Close #4680.
2022-07-28score: Use priority inheritance for thread joinSebastian Huber2-68/+59
Threads may join the thread termination of another thread using the pthread_join() or rtems_task_delete() directives. The thread cancel operation used a special case priority boosting mechanism implemented by _Thread_Raise_real_priority(). The problem was that this approach * is not transitive, * does not account for priority adjustments of the calling task while waiting for the join, * does not support clustered scheduling, and * does not detect deadlocks. All these problems are fixed by using a priority inheritance thread queue for the join operation. Close #4679.
2022-07-27Use __asm__ for standard C compatibilitySebastian Huber1-5/+5
2022-07-26score: Remove PRIORITY_PSEUDO_ISR thread prioritySebastian Huber16-69/+43
The uniprocessor schedulers had some special case logic for the PRIORITY_PSEUDO_ISR priority. Tasks with a priority of PRIORITY_PSEUDO_ISR were allowed to preempt a not preemptible task. If other higher priority task are made ready while a PRIORITY_PSEUDO_ISR task preempts a not preemptible task, then the other tasks run before the not preemptible task. This made the RTEMS_NO_PREEMPT mode ineffective. Remove the PRIORITY_PSEUDO_ISR special case logic. This simplifies the uniprocessor schedulers. Move the uniprocessor-specific scheduler support to the new header file <rtems/score/scheduleruniimpl.h>. Close #2365.
2022-07-21aarch64: Use page table level 0Kinsey Moore1-1/+0
This alters the AArch64 page table generation and mapping code and MMU configuration to use page table level 0 in addition to levels 1, 2, and 3. This allows the mapping of up to 48 bits of memory space and is the maximum that can be mapped without relying on additional processor extensions. Mappings are restricted based on the number of physical address bits that the CPU supports.
2022-07-18score: Fix unlimited objects supportSebastian Huber1-5/+7
Commit 21275b58a5a69c3c838082ffc8a7a3641f32ea9a ("score: Static Objects_Information initialization") introduced an off-by-one error in the maintenance of inactive objects. Close #4677.
2022-07-18score: Fix _Objects_Active_count()Sebastian Huber1-5/+13
With unlimited objects the object maximum may be larger than the sum of active and inactive objects. Update #4677.
2022-07-15score: Extend memory dirty/zero actionsSebastian Huber3-2/+61
Dirty or zero also the part of the .noinit section used by RTEMS. Close #4678.
2022-07-07score: Use RTEMS_SMP in _Thread_Create_idle()Sebastian Huber1-1/+5
Conditional expressions with inline functions are not optimized away if optimization is disabled. Avoid such expressions to prevent dead branches.
2022-07-07score: Conditional _Thread_Priority_replace()Sebastian Huber1-0/+2
This function is only used in SMP configurations.
2022-07-05cpukit/aarch64: Remove _CPU_ISR_install_vectorKinsey Moore2-31/+0
This function was never actually used and is dead code.
2022-07-04score: Add _CPU_Use_thread_local_storage()Sebastian Huber20-0/+207
At some point during system initialization, the idle threads are created. Afterwards, the boot processor basically executes within the context of an idle thread with thread dispatching disabled. On some architectures, the thread-local storage area of the associated thread must be set in dedicated processor registers. Add the new CPU port function to do this: void _CPU_Use_thread_local_storage( const Context_Control *context ) Close #4672.
2022-07-04gcov: Add functions to dump the gcov informationSebastian Huber3-0/+243
Update #4670.
2022-06-24riscv: Include missing header fileSebastian Huber1-0/+2
2022-06-23score: Make SMP only code explicitSebastian Huber4-3/+31
Conditional expressions with inline functions are not optimized away if optimization is disabled. Avoid such expressions to prevent dead branches. It helps also during code review to immediately see if a loop is used or not.
2022-06-23kern_tc.c: Provide a weak hardpps() implementationSebastian Huber1-0/+12
The real implementation of hardpps() is defined in kern_ntptime.c. Use it only if the NTP support is needed by the application. Update #2349.
2022-06-23score: Use right clock for threadq timeoutsSebastian Huber1-2/+2
Use CLOCK_REALTIME and CLOCK_MONOTONIC for relative thread queue timeouts instead of CLOCK_REALTIME_COARSE and CLOCK_MONOTONIC_COARSE. This fixes an issue with clock_nanosleep() in combination with clock_gettime(). Close #4669.
2022-06-15score/cpu: Silence ARM and AARCH64 GCC 12 false trigger array warningChris Johns2-1/+7
The false trigger is covered in: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99578 GCC 11 and 12 has been patched for constant pointer casts above 4K. This code casts a constant pointer within the first 4K page. As a result the patch disables the warning. Updates #4662
2022-06-10kern_tc.c: Update pps_event() for uniprocessor configurationsGabriel Moyano1-0/+6
Since pps->capgen equal to zero is not a special value in uniprocessor configurations, there is no need to check for this condition. Update #2349
2022-06-08arm: Fix PMSA regions for contiguous sectionsSebastian Huber1-4/+4
Sections with identical attributes may be contiguous with a respective begin and end address which is not on a minimum region boundary. The begin address is aligned down to the region base address. The end address is aligned up to the region end address. Account for this in the check for contiguous sections. Update #4202.
2022-06-08arm: Fix PMSA region mapping with 0x0 end addressSebastian Huber1-1/+1
A section may span up to the end of the address range. In this case the end address is zero. Use the base address to check if a region should be before another region. Update #4202.
2022-06-03arm: Fix typoSebastian Huber1-2/+2
2022-05-27score: Fix pps_fetch()Sebastian Huber1-1/+2
Return early only if there was a timeout, otherwise return the PPS info. Update #2349.
2022-05-23score: Reformat for code coverageSebastian Huber1-2/+18
Close #2349.
2022-05-23timepps.h: PPS_SYNC defined by defaultGabriel Moyano1-10/+0
Update #2349.
2022-05-23kern_ntptime.c: Add define in order to remove warningGabriel Moyano1-0/+3
Update #2349.
2022-05-23kern_tc.c: Enable PPS API supportGabriel Moyano1-4/+0
Update #2349.
2022-05-23kern_tc.c: Add definitions required by PPS APIGabriel Moyano1-0/+6
Update #2349.
2022-05-23score: Rename tc_getfrequency()Gabriel Moyano1-1/+1
Rename tc_getfrequency() to _Timecounter_Get_frequency(). Update #2349.
2022-05-23kern_tc.c: Replace FreeBSD event mechanism by adding pointers to functionGabriel Moyano1-0/+41
Update #2349.
2022-05-23kern_tc.c: Add atomic dependencies required by the PPS APIGabriel Moyano1-0/+7
Update #2349.
2022-05-23kern_ntptime.c: Add lmax() qmin() definitionsGabriel Moyano1-0/+2
Update #2349.
2022-05-23kern_ntptime.c: Disable freebsd featuresGabriel Moyano1-1/+3
Update #2349.
2022-05-18score: Add SPDX License IdentifierSebastian Huber4-4/+12
Remove URL in copyright notice. Update #3053.
2022-05-13score: Fix SMP priority affinity scheduler yieldSebastian Huber1-0/+1
2022-05-12score: Add SMP priority affinity scheduler yieldTian Ye1-0/+18
2022-05-04score/src: Add file headers and licensesRyan Long3-0/+81
These files had no header, copyright, or license. Based on git history, added appropriate copyright and license.
2022-05-04sparc64-syscall.h: Add file headers and licensesRyan Long1-0/+15
This file had no header, copyright, or license. Based on git history, added appropriate copyright and license.
2022-05-04cpukit/microblaze: Add file headers and licensesRyan Long2-0/+70
These files had no file header, copyright, or license. Based on git history, added appropriate copyright and license.
2022-04-28heap: Fix heap statistics with protection enabledSebastian Huber1-0/+9
Close #4644.
2022-04-08Remove duplicate SPDX lines accidentally addedJoel Sherrill4-8/+0
2022-04-08x86_64/elf_machdep.h: Replace stub with NetBSD versionRyan Long1-4/+76
The other ports included that architecture's version of this file from NetBSD. This patch follows that pattern. closes #4641
2022-04-01cpukit/score/cpu/moxie: Change license to BSD-2Joel Sherrill8-24/+176
Permission received from Anthony Green. Updates #3053.