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* score/arm: enhance ARMV7M MPU setup with capability to set control registerKarel Gardas2023-03-161-1/+2
| | | | | | | Due to API change, the patch also fixes affected BSPs and uses value provided by MPU CTRL spec option there. Sponsored-By: Precidata
* sparc: Add header files to Doxygen groupSebastian Huber2023-03-155-8/+23
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* pps: Round to closest integer in pps_event()Sebastian Huber2023-03-071-1/+3
| | | | | | | | | | | | | | The comment above bintime2timespec() says: When converting between timestamps on parallel timescales of differing resolutions it is historical and scientific practice to round down. However, the delta_nsec value is a time difference and not a timestamp. Also the rounding errors accumulate in the frequency accumulator, see hardpps(). So, rounding to the closest integer is probably slightly better. Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/604
* pps: Simplify the nsec calculation in pps_event()Sebastian Huber2023-03-072-19/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let A be the current calculation of the frequency accumulator (pps_fcount) update in pps_event() scale = (uint64_t)1 << 63; scale /= captc->tc_frequency; scale *= 2; bt.sec = 0; bt.frac = 0; bintime_addx(&bt, scale * tcount); bintime2timespec(&bt, &ts); hardpps(tsp, ts.tv_nsec + 1000000000 * ts.tv_sec); and hardpps(..., delta_nsec): u_nsec = delta_nsec; if (u_nsec > (NANOSECOND >> 1)) u_nsec -= NANOSECOND; else if (u_nsec < -(NANOSECOND >> 1)) u_nsec += NANOSECOND; pps_fcount += u_nsec; This change introduces a new calculation which is slightly simpler and more straight forward. Name it B. Consider the following sample values with a tcount of 2000000100 and a tc_frequency of 2000000000 (2GHz). For A, the scale is 9223372036. Then scale * tcount is 18446744994337203600 which is larger than UINT64_MAX (= 18446744073709551615). The result is 920627651984 == 18446744994337203600 % UINT64_MAX. Since all operands are unsigned the result is well defined through modulo arithmetic. The result of bintime2timespec(&bt, &ts) is 49. This is equal to the correct result 1000000049 % NANOSECOND. In hardpps(), both conditional statements are not executed and pps_fcount is incremented by 49. For the new calculation B, we have 1000000000 * tcount is 2000000100000000000 which is less than UINT64_MAX. This yields after the division with tc_frequency the correct result of 1000000050 for delta_nsec. In hardpps(), the first conditional statement is executed and pps_fcount is incremented by 50. This shows that both methods yield roughly the same results. However, method B is easier to understand and requires fewer conditional statements. Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/604
* pps: Directly assign the timestamps in pps_event()Sebastian Huber2023-03-071-4/+2
| | | | | Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/604
* pps: Move pcount assignment in pps_event()Sebastian Huber2023-03-071-4/+4
| | | | | | | Move the pseq increment. This makes it possible to reuse registers earlier. Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/604
* pps: Simplify capture and event processingSebastian Huber2023-03-071-21/+21
| | | | | | | | | | | | | | Use local variables for the captured timehand and timecounter in pps_event(). This fixes a potential issue in the nsec preparation for hardpps(). Here the timecounter was accessed through the captured timehand after the generation was checked. Make a snapshot of the relevent timehand values early in pps_event(). Check the timehand generation only once during the capture and event processing. Use atomic_thread_fence_acq() similar to the other readers. Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/604
* pps: Load timecounter once in pps_capture()Sebastian Huber2023-03-071-1/+3
| | | | | | | | This ensures that the timecounter and the tc_get_timecount handler belong together. Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/604
* ntptime: ansifyMateusz Guzik2023-03-071-2/+1
| | | | Sponsored by: Rubicon Communications, LLC ("Netgate")
* Clarify hardpps() parameter name and commentSebastian Huber2023-03-071-8/+5
| | | | | | | | | | | | Since 32c203577a5e by phk in 1999 (Make even more of the PPSAPI implementations generic), the "nsec" parameter of hardpps() is a time difference and no longer a time point. Change the name to "delta_nsec" and adjust the comment. Remove comment about a clock tick adjustment which is no longer in the code. Pull Request: https://github.com/freebsd/freebsd-src/pull/640 Reviewed by: imp
* set_cputicker: use a boolMitchell Horne2023-03-071-3/+3
| | | | | | | | | | | The third argument to this function indicates whether the supplied ticker is fixed or variable, i.e. requiring calibration. Give this argument a type and name that better conveys this purpose. Reviewed by: kib, markj MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D35459
* kern_tc.c/cputick2usec()firk2023-03-071-9/+3
| | | | | | | | | | | | | | | | | | (which is used to calculate cputime from cpu ticks) has some imprecision and, worse, huge timestep (about 20 minutes on 4GHz CPU) near 53.4 days of elapsed time. kern_time.c/cputick2timespec() (it is used for clock_gettime() for querying process or thread consumed cpu time) Uses cputick2usec() and then needlessly converting usec to nsec, obviously losing precision even with fixed cputick2usec(). kern_time.c/kern_clock_getres() uses some weird (anyway wrong) formula for getting cputick resolution. PR: 262215 Reviewed by: gnn Differential Revision: https://reviews.freebsd.org/D34558
* score: Replace goto with a breakSebastian Huber2023-02-101-6/+11
| | | | | | | The goto label was directly after the loop, so we can replace the goto with a break. Close #4847.
* score: Help static analysis in thread initSebastian Huber2023-01-281-2/+5
| | | | | | | | Add an assert to _Thread_Initialize_scheduler_and_wait_nodes() which may help a static analyzer. Use a do/while loop since we have at least one scheduler. Update #4832.
* score: Remove unused return valueSebastian Huber2023-01-241-6/+1
| | | | | | | Several SMP message processing functions returned a value. This value was always unused. Close #4822.
* score: Clarify code blockSebastian Huber2023-01-241-1/+1
| | | | | | Do not use a chained assignment for code clarity. Close #4818.
* powerpc: Increase MAS0 ESEL widthSebastian Huber2023-01-231-2/+2
| | | | For example, the QorIQ T4240 has more than 16 TLB1 entries.
* arm: Enable thread ID register for ARMv6Sebastian Huber2023-01-031-1/+2
| | | | Close #4759.
* cpukit: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-142-4/+23
| | | | | | | | | This patch changes the license to BSD-2 for all source files where the copyright is held by Aeroflex Gaisler, Cobham Gaisler, or Gaisler Research. Some files also includes copyright right statements from OAR and/or embedded Brains in addition to Gaisler. Updates #3053.
* arm: Fix Armv7-M TLS supportSebastian Huber2022-11-101-1/+1
| | | | | | | Set the thread ID register in the CPU context. Update #3835. Close #4753.
* riscv: Simplify _CPU_ISR_Set_level()Sebastian Huber2022-11-091-15/+13
| | | | | | | Where CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE, the only supported interrupt level allowed to set is 0 (interrupts enabled). This constraint is enforced by the API level functions which return an error status for other interrupt levels.
* riscv: Remove superfluous init/fini functionsSebastian Huber2022-11-091-12/+0
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* cpukit/aarch64: Emulate FPSR for FENV trapsKinsey Moore2022-11-091-0/+20
| | | | | | | The AArch64 TRM specifies that when FPCR is set to trap floating point exceptions, the FPSR exception bits are not set. This ensures that FPSR is updated as FENV expects even if floating point exception traps are enabled.
* riscv: Move functions to avoid build issuesSebastian Huber2022-10-141-0/+10
| | | | | The _RISCV_Map_cpu_index_to_hardid() and _RISCV_Map_hardid_to_cpu_index() functions must be available to all riscv BSPs.
* powerpc: Conditionally provide Context_Control_fpSebastian Huber2022-10-141-3/+6
| | | | This avoids a pedantic warning about a zero size Context_Control_fp.
* powerpc: Fix 'noreturn' function does returnSebastian Huber2022-10-141-0/+1
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* score: INTERNAL_ERROR_IDLE_THREAD_STACK_TOO_SMALLSebastian Huber2022-10-141-0/+4
| | | | | | | Ensure that the IDLE storage allocator did allocate a suffiently large area. Update #3835. Update #4524.
* config: Add CONFIGURE_IDLE_TASK_STORAGE_SIZESebastian Huber2022-10-143-31/+95
| | | | | | | | | | | | By default, allocate the IDLE task storage areas from the RTEMS Workspace. This avoids having to estimate the thread-local storage size in the default configuration. Add the application configuration option CONFIGURE_IDLE_TASK_STORAGE_SIZE to request a static allocation of the task storage area for IDLE tasks. Update #3835. Update #4524.
* score: INTERNAL_ERROR_IDLE_THREAD_CREATE_FAILEDSebastian Huber2022-10-141-3/+9
| | | | | | Add the INTERNAL_ERROR_IDLE_THREAD_CREATE_FAILED fatal error in case the creation of an idle thread fails. This may happen due to a failing create extension provided by the application.
* score: Add CPU_THREAD_LOCAL_STORAGE_VARIANTSebastian Huber2022-10-1438-63/+122
| | | | Update #3835.
* config: Changeable size for IDLE stack allocatorSebastian Huber2022-10-142-12/+11
| | | | | | | | Allow the IDLE stack allocator to change the stack size. This can be used by applications with a very dynamic thread-local storage size to adjust the thread storage area of the IDLE tasks dynamically. Update #4524.
* score: Require power of two CPU_STACK_MINIMUM_SIZESebastian Huber2022-10-144-4/+10
| | | | | For most CPU ports this was already the case. This makes it possible to use the size as an object alignment using RTEMS_ALIGNED().
* bsps/riscv: Add Microchip PolarFire SoC BSP variantPadmarao Begari2022-09-202-2/+2
| | | | | | | | The Microchip PolarFire SoC support is implemented as a riscv BSP variant to boot with any individual hart(cpu core) or SMP based on the boot HARTID configurable and support components are 4 CPU Cores (U54), Interrupt controller (PLIC), Timer (CLINT), UART.
* Do not use RTEMS_INLINE_ROUTINESebastian Huber2022-09-1941-121/+121
| | | | | | | Directly use "static inline" which is available in C99 and later. This brings the RTEMS implementation closer to standard C. Close #3935.
* score: Prevent an out of bounds warningSebastian Huber2022-09-121-2/+7
| | | | Update #4702.
* score: Remove _CPU_Counter_difference()Sebastian Huber2022-09-0920-177/+12
| | | | | | | All CPU ports used the same _CPU_Counter_difference() implementation. Remove this CPU port interface and mandate a monotonically increasing CPU counter. Close #3456.
* powerpc: Add support for VRSAVESebastian Huber2022-09-083-15/+92
| | | | | | | | | | | | | | The VRSAVE feature of the Altivec unit can be used to reduce the amount of Altivec registers which need to be saved/restored during interrupt processing and context switches. In order to use the VRSAVE optimization a corresponding multilib (-mvrsave) is required, see GCC configuration. The -mvrsave option must be added to the ABI_FLAGS of the BSP. Currently only the -mcpu=e6500 based QorIQ BSP support this optimization. Update #4712.
* cpu.h: Fix gcc 12 warningsRyan Long2022-08-191-2/+18
| | | | | | | | Added two pragmas to address, and changed the value of AARCH64_EXCEPTION_MAKE_ENUM_64_BIT to INT_MAX because the old value was not in range of an int. Updates #4662
* cpukit/libdl: Add support for AArch64Ryan Long2022-07-291-0/+256
| | | | | | rtl-mdreloc-aarch64.c and elf_machdep.h came from NetBSD. Updates #4682
* score: Use PTHREAD_CANCELED for _Thread_Cancel()Sebastian Huber2022-07-281-5/+5
| | | | | | | | | | The rtems_task_delete() directive is basically just a combined pthread_cancel() and pthread_join(). In addition, it removes the PTHREAD_DETACHED state. The exit value returned by pthread_join() of threads cancelled by rtems_task_delete() should reflect this by getting a PTHREAD_CANCELED value instead of NULL which could be a normal exit value. Close #4680.
* score: Use priority inheritance for thread joinSebastian Huber2022-07-282-68/+59
| | | | | | | | | | | | | | | | | | | | | Threads may join the thread termination of another thread using the pthread_join() or rtems_task_delete() directives. The thread cancel operation used a special case priority boosting mechanism implemented by _Thread_Raise_real_priority(). The problem was that this approach * is not transitive, * does not account for priority adjustments of the calling task while waiting for the join, * does not support clustered scheduling, and * does not detect deadlocks. All these problems are fixed by using a priority inheritance thread queue for the join operation. Close #4679.
* Use __asm__ for standard C compatibilitySebastian Huber2022-07-271-5/+5
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* score: Remove PRIORITY_PSEUDO_ISR thread prioritySebastian Huber2022-07-2616-69/+43
| | | | | | | | | | | | | | | The uniprocessor schedulers had some special case logic for the PRIORITY_PSEUDO_ISR priority. Tasks with a priority of PRIORITY_PSEUDO_ISR were allowed to preempt a not preemptible task. If other higher priority task are made ready while a PRIORITY_PSEUDO_ISR task preempts a not preemptible task, then the other tasks run before the not preemptible task. This made the RTEMS_NO_PREEMPT mode ineffective. Remove the PRIORITY_PSEUDO_ISR special case logic. This simplifies the uniprocessor schedulers. Move the uniprocessor-specific scheduler support to the new header file <rtems/score/scheduleruniimpl.h>. Close #2365.
* aarch64: Use page table level 0Kinsey Moore2022-07-211-1/+0
| | | | | | | | | This alters the AArch64 page table generation and mapping code and MMU configuration to use page table level 0 in addition to levels 1, 2, and 3. This allows the mapping of up to 48 bits of memory space and is the maximum that can be mapped without relying on additional processor extensions. Mappings are restricted based on the number of physical address bits that the CPU supports.
* score: Fix unlimited objects supportSebastian Huber2022-07-181-5/+7
| | | | | | | | Commit 21275b58a5a69c3c838082ffc8a7a3641f32ea9a ("score: Static Objects_Information initialization") introduced an off-by-one error in the maintenance of inactive objects. Close #4677.
* score: Fix _Objects_Active_count()Sebastian Huber2022-07-181-5/+13
| | | | | | | With unlimited objects the object maximum may be larger than the sum of active and inactive objects. Update #4677.
* score: Extend memory dirty/zero actionsSebastian Huber2022-07-153-2/+61
| | | | | | Dirty or zero also the part of the .noinit section used by RTEMS. Close #4678.
* score: Use RTEMS_SMP in _Thread_Create_idle()Sebastian Huber2022-07-071-1/+5
| | | | | | Conditional expressions with inline functions are not optimized away if optimization is disabled. Avoid such expressions to prevent dead branches.
* score: Conditional _Thread_Priority_replace()Sebastian Huber2022-07-071-0/+2
| | | | This function is only used in SMP configurations.
* cpukit/aarch64: Remove _CPU_ISR_install_vectorKinsey Moore2022-07-052-31/+0
| | | | This function was never actually used and is dead code.
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