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* Adding ChangeLogs.Joel Sherrill2000-08-1016-0/+49
* Look at both hardware and software FP settings.Joel Sherrill2000-08-011-2/+2
* If the _VBR is set to 0xFFFFFFFF, then assume the vector jump table isJoel Sherrill2000-08-011-1/+10
* The fp_context field is needed if software or hardware floating pointJoel Sherrill2000-08-011-1/+1
* Patch rtems-rc-20000801-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-08-012-2/+2
* Port of RTEMS to the ARM processor family by Eric ValetteJoel Sherrill2000-07-2712-0/+1771
* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-265-2/+10
* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-2617-1/+59
* Use bitwise and not cast to unsigned16 to remove upper bits.Joel Sherrill2000-07-242-2/+6
* Make _ISR_Dispatch global.Joel Sherrill2000-07-171-0/+1
* Update from Philip Quaife <rtemsdev@qs.co.nz> that was hand-merged.Joel Sherrill2000-07-172-34/+75
* Removed no cpu references.Joel Sherrill2000-07-1112-15/+15
* Reworked score/cpu/sparc so it can be safely compiled multilib. AllJoel Sherrill2000-07-1110-127/+32
* Added Hitachi H8/300 to the list of CPUs that should be OK withJoel Sherrill2000-07-111-0/+1
* Reworked score/cpu/i960 so it can be safely compiled multilib. AllJoel Sherrill2000-07-115-533/+31
* Patch rtems-rc-20000711-1-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-118-9/+16
* Patch rtems-rc-20000709-1.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-102-0/+6
* Moved old_exception_processing and new_exception_processing directoriesJoel Sherrill2000-07-071-7/+1
* Moved __RTEMS_APPLICATION__ conditional to include the use of theJoel Sherrill2000-07-071-1/+1
* Added missing #endif's.Joel Sherrill2000-07-062-3/+0
* Corrected call to _CORE_mutex_Seize_interrupt_blocking.Joel Sherrill2000-07-061-2/+5
* Reimplemented _Core_MUTEX_Seize to return with interrupts disabledJoel Sherrill2000-07-062-7/+119
* Added _CORE_semaphore_Seize_isr_disable.Joel Sherrill2000-07-061-0/+56
* Added _Objects_Get_isr_disable prototype and added numerous comments.Joel Sherrill2000-07-061-7/+18
* Removed unnecessary parentheses.Joel Sherrill2000-07-061-4/+4
* Added objjectgetbyisr.cJoel Sherrill2000-07-061-2/+3
* The code that attempts to obtain a mutex has now been inlined. TheJoel Sherrill2000-07-061-83/+7
* Directly index local table to avoid error check.Joel Sherrill2000-07-063-12/+10
* New file. Convert ID to pointer and return with interrupts -- notJoel Sherrill2000-07-061-0/+83
* Format of return line changed.Joel Sherrill2000-07-061-3/+3
* Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill2000-07-038-8/+8
* Added blocked_count field to allow for optimizations.Joel Sherrill2000-07-032-2/+4
* Changed extra_system_initialization_stack to extra_mpci_receive_server_stackJoel Sherrill2000-07-031-1/+1
* This is the initial addition of the port of RTEMS to theJoel Sherrill2000-06-2912-0/+1979
* Added RTEMS_CPU_HAS_16_BIT_ADDRESSES constant to disable codeJoel Sherrill2000-06-291-0/+4
* Remove pragma align 4Joel Sherrill2000-06-151-2/+0
* Patch rtems-rc-20000614-sh.tar.gz from Ralf CorsepiusJoel Sherrill2000-06-142-11/+12
* Moved PowerPC cache management code to libcpu. Also compiledJoel Sherrill2000-06-141-151/+0
* Thread iterator and libgjc support submitted too early.Joel Sherrill2000-06-143-61/+9
* Added crude i960ka support.Joel Sherrill2000-06-133-6/+38
* Moved i386 and m68k cache management code to libcpu. EverythingJoel Sherrill2000-06-132-306/+0
* Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine GauthierJoel Sherrill2000-06-128-19/+603
* Works on Solaris and Linux.Joel Sherrill2000-06-121-8/+6
* Merged from 4.5.0-beta3aJoel Sherrill2000-06-1238-97/+539
* Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill2000-04-1322-0/+88
* Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill2000-04-1324-0/+136
* Added routines to get and set C3x IOF register. The code is conditionallyJoel Sherrill2000-03-012-26/+142
* BSP now compiles and links with CAVSL board information. This includesJoel Sherrill2000-02-291-3/+3
* New port of RTEMS to TI C3x and C4x.Joel Sherrill2000-02-2212-0/+3149
* Patches rtems-rc-20000204-0.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-02-081-1/+0
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