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2017-10-09score: Simplify _Timestamp_Add_to()Sebastian Huber1-7/+1
Update #2740.
2017-10-05posix: Implement self-contained POSIX mutexSebastian Huber6-12/+43
POSIX mutexes are now available in all configurations and no longer depend on --enable-posix. Update #2514. Update #3112.
2017-10-05posix: Implement self-contained POSIX condvarSebastian Huber2-2/+0
POSIX condition variables are now available in all configurations and no longer depend on --enable-posix. Update #2514. Update #3113.
2017-10-05posix: Implement self-contained POSIX rwlocksSebastian Huber10-133/+82
POSIX rwlocks are now available in all configurations and no longer depend on --enable-posix. Update #2514. Update #3115.
2017-10-05posix: Implement self-contained POSIX barriersSebastian Huber2-2/+0
POSIX barriers are now available in all configurations and no longer depend on --enable-posix. Update #2514. Update #3114.
2017-10-05posix: Implement self-contained POSIX semaphoresSebastian Huber4-60/+91
For semaphore object pointer and object validation see POSIX_SEMAPHORE_VALIDATE_OBJECT(). Destruction or close of a busy semaphore returns an error status. The object is not flushed. POSIX semaphores are now available in all configurations and no longer depend on --enable-posix. Update #2514. Update #3116.
2017-10-05posix: Optimize pthread_once_tSebastian Huber2-2/+2
Reduce size of pthread_once_t and make it zero-initialized. Update #3142.
2017-10-05score: Make status codes unconditionalSebastian Huber1-9/+2
The internal status codes encode a Classic rtems_status_code and error codes used by the POSIX and C11/C++11 APIs. In case the POSIX API is disabled, the C11/C++11 support must still work. Close #3167.
2017-09-27score: Simplify red-black tree debug supportSebastian Huber3-13/+17
Make the RBTree_Node layout independent of RTEMS_DEBUG (and all other build configuration options). This allows the use of this structure in Newlib. Update #3112.
2017-09-27score: Rename to _Scheduler_ControlSebastian Huber7-15/+15
Rename struct Scheduler_Control to _Scheduler_Control to allow its use in standard header files, e.g. <pthread.h>. Update #3112.
2017-09-22score: Include missing header fileSebastian Huber1-0/+2
Update #3059.
2017-09-19score: Include missing <limits.h>Sebastian Huber1-0/+2
Update #2132. Close #3140.
2017-08-25score: Remove <string.h> include from basedefs.hSebastian Huber1-7/+0
Close #2133.
2017-08-25score: Remove <limits.h> include from basedefs.hSebastian Huber1-7/+0
Close #2132.
2017-08-25Include missing <limits.h>Sebastian Huber1-0/+1
Update #2132.
2017-08-25Include missing <string.h>Sebastian Huber1-0/+2
Update #2133.
2017-08-22powerpc: PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORESebastian Huber1-0/+5
In 64-bit mode, the linker must have the ability to restore the TOC pointer after an external function call. Update #3082.
2017-08-22powerpc: Add 64-bit context/interrupt supportSebastian Huber6-187/+263
Update #3082.
2017-08-22powerpc: 64-bit _CPU_Context_Initialize() supportSebastian Huber1-2/+2
Update #3082.
2017-08-22powerpc: 64-bit support for CPU_SIZEOF_POINTERSebastian Huber1-0/+4
Update #3082.
2017-08-22powerpc: ppc_interrupt_get_disable_mask()Sebastian Huber1-1/+1
Fix warning on 64-bit PowerPC. Update #3082.
2017-08-22powerpc: Add register definesSebastian Huber1-0/+16
Update #3082.
2017-08-22heap: Fix integer typesSebastian Huber1-3/+3
Update #3082.
2017-08-22score: Fix format specifierSebastian Huber1-1/+1
Update #3082.
2017-08-10arm: Use ARM code on Thumb 1 targetsSebastian Huber1-1/+1
Update #3093.
2017-08-10arm: Validate IT[7:0] bit field of PSRSebastian Huber1-1/+25
Update #3093.
2017-07-31powerpc: Add register definesSebastian Huber1-0/+26
Update #3082. Update #3085.
2017-07-31score: Add RTEMS_HAVE_MEMBER_SAME_TYPE()Sebastian Huber2-2/+25
This fixes some "variably modified" warnings and a clang compile error.
2017-07-28bsp/t32mppc: Add SMP supportSebastian Huber1-0/+3
2017-07-25sparc: Add lazy floating point switchSebastian Huber6-219/+136
The SPARC ABI is a bit special with respect to the floating point context. The complete floating point context is volatile. Thus, from an ABI point of view nothing needs to be saved and restored during a context switch. Instead the floating point context must be saved and restored during interrupt processing. Historically, the deferred floating point switch was used for SPARC and the complete floating point context is saved and restored during a context switch to the new floating point unit owner. This is a bit dangerous since post-switch actions (e.g. signal handlers) and context switch extensions may silently corrupt the floating point context. The floating point unit is disabled for interrupt handlers. Thus, in case an interrupt handler uses the floating point unit then this will result in a trap (INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT). In uniprocessor configurations, a lazy floating point context switch is used. In case an active floating point thread is interrupted (PSR[EF] == 1) and a thread dispatch is carried out, then this thread is registered as the floating point owner. When a floating point owner is present during a context switch, the floating point unit is disabled for the heir thread (PSR[EF] == 0). The floating point disabled trap checks that the use of the floating point unit is allowed and saves/restores the floating point context on demand. Update #3077.
2017-07-25INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNITSebastian Huber1-1/+2
Add new fatal error INTERNAL_ERROR_ILLEGAL_USE_OF_FLOATING_POINT_UNIT. Update #3077.
2017-07-25sparc: Rename SPARC_USE_SAFE_FP_SUPPORTSebastian Huber3-28/+30
Rename SPARC_USE_SAFE_FP_SUPPORT in SPARC_USE_SYNCHRONOUS_FP_SWITCH. Update comment. Update #3077.
2017-07-25score: Add optional _CPU_Context_Destroy()Sebastian Huber3-1/+27
Update #3077.
2017-07-18score: Fix warningSebastian Huber1-1/+1
Update #3059.
2017-07-17sparc: Add assembly workaround for LEON3FT B2BST errataDaniel Cederman3-0/+33
This patch adds NOP instructions to prevent instruction sequences that are sensitive to the LEON3FT B2BST errata. See GRLIB-TN-0009: "LEON3FT Stale Cache Entry After Store with Data Tag Parity Error" for more information. The sequences are only modified if __FIX_LEON3FT_B2BST is defined. The patch works in conjunction with the -mfix-ut700, -mfix-gr712rc, and -mfix-ut699 GCC flags that prevents the sensitive sequences from being generated. Update #3057.
2017-07-12score: Fix typoSebastian Huber1-1/+1
Update #3059.
2017-07-12Add interrupt vector set/get affinitySebastian Huber1-0/+25
Close #3071.
2017-07-10score: Fix set schedulerSebastian Huber1-5/+13
Ensure that the thread processor affinity fits the new scheduler instance. Update #3059.
2017-07-10score: Add simple affinity support to EDF SMPSebastian Huber8-104/+592
Update #3059.
2017-07-07score: Pass scheduler nodes to processor allocatorSebastian Huber1-18/+14
This allows scheduler implementations to easily access scheduler-specific data. Update #3059.
2017-07-07score: Add scheduler node to set affinity opSebastian Huber6-14/+14
Update #3059.
2017-07-07score: Fix default set affinitySebastian Huber1-4/+3
The set of online processors must be a subset of the thread processor affinity for the schedulers without arbitrary processor affinity support to avoid problems in case of processor addition and removal. Update #3059.
2017-07-07score: Introduce _SMP_Get_online_processors()Sebastian Huber3-2/+14
Update #3059.
2017-07-07score: Use processor mask for set affinitySebastian Huber6-62/+40
Update #3059.
2017-07-07score: Add processor set to scheduler contextSebastian Huber3-23/+11
Replace the simple processor count with the processor set owned by the scheduler instance. Update #3059.
2017-07-07score: Move processor affinity to Thread_ControlSebastian Huber11-143/+20
Update #3059.
2017-07-06score: Add some processor mask functionsSebastian Huber1-0/+99
Update #3059.
2017-07-06score: Add processor mask to/from cpu_set_tSebastian Huber3-2/+126
Update #3059.
2017-07-06score: Use <sys/bitset.h> for Processor_maskSebastian Huber4-63/+56
Implement the Processor_mask via <sys/bitset.h>. Provide _Processor_mask_To_uint32_t() to enable its use in device specific routines, e.g. interrupt affinity register in an interrupt controller. Update #3059.
2017-07-05score: Fix formatSebastian Huber1-14/+7
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