| Commit message (Collapse) | Author | Files | Lines |
|---|
|
Update #2858.
|
|
|
|
Replace STATES_DELAYING with STATES_WAITING_FOR_TIME.
There is no need for separate timeout thread states. The
Thread_Control::Timer::header and Watchdog_Control::cpu members can be
used to figure out the kind of timeout.
|
|
|
|
The CPU index starts with zero. Increment it by one, to allow global
SMP locks to reside in the BSS section.
|
|
|
|
Add thread state bit to identify thread queues that are embedded in an
object with identifier.
|
|
|
|
Specify all 32-bits in a thread state define.
|
|
Only require that the Newlib defined structure is big enough.
|
|
|
|
Update #2825.
|
|
Update #2825.
|
|
Update #2825.
|
|
Update #2825.
|
|
|
|
Update #2825.
|
|
Update #2825.
|
|
Update #2825.
|
|
The fatal is internal indicator is redundant since the fatal source and
error code uniquely identify a fatal error. Keep the fatal user
extension is internal parameter for backward compatibility and set it to
false always.
Update #2825.
|
|
Resurrect RTEMS_LINKER_SET_BEGIN() and RTEMS_LINKER_SET_END().
Add new macros RTEMS_LINKER_SET_ITEM_COUNT(),
RTEMS_LINKER_SET_IS_EMPTY(), and
RTEMS_LINKER_SET_FOREACH().
Remove confusing RTEMS_LINKER_SET_ASSIGN_BEGIN() and
RTEMS_LINKER_SET_ASSIGN_END().
Fix RTEMS_LINKER_SET_SIZE() to return the size in characters as
specified by the documentation.
Update #2408.
Update #2790.
|
|
Update #2751.
|
|
Initialize thread queue context early preferably outside the critical
section.
Remove implicit _Thread_queue_Context_initialize() from
_Thread_Wait_acquire().
|
|
On ARM Thumb we may have function addresses ending with 0x7f, if we are
lucky.
|
|
Use _Thread_Do_dispatch() instead of _Thread_Dispatch(). Restore the
PSR[EF] state of the interrupted context via new system call
syscall_irqdis_fp in case floating-point support is enabled.
|
|
Initialize the thread queue context with invalid data in debug
configurations to catch missing set up steps.
|
|
Update #2811.
|
|
Move thread state for _Thread_queue_Enqueue() to the thread queue
context. This reduces the parameter count of _Thread_queue_Enqueue()
from five to four (ARM for example has only four function parameter
registers). Since the thread state is used after several function calls
inside _Thread_queue_Enqueue() this parameter was saved on the stack
previously.
|
|
Callers of _Thread_Do_dispatch() must have a valid
Per_CPU_Control::Stats::thread_dispatch_disabled_instant.
Call _Profiling_Outer_most_interrupt_entry_and_exit() with the interrupt
stack to not exceed Per_CPU_Control::Interrupt_frame.
Update #2751.
|
|
Update #2825.
|
|
Update #2825.
|
|
Turn pthread_spinlock_t into a self-contained object. On uni-processor
configurations, interrupts are disabled in the lock/trylock operations
and the previous interrupt status is restored in the corresponding
unlock operations. On SMP configurations, a ticket lock is a acquired
and released in addition.
The self-contained pthread_spinlock_t object is defined by Newlib in
<sys/_pthreadtypes.h>.
typedef struct {
struct _Ticket_lock_Control _lock;
__uint32_t _interrupt_state;
} pthread_spinlock_t;
This implementation is simple and efficient. However, this test case of
the Linux Test Project would fail due to call of printf() and sleep()
during spin lock ownership:
https://github.com/linux-test-project/ltp/blob/master/testcases/open_posix_testsuite/conformance/interfaces/pthread_spin_lock/1-2.c
There is only limited support for profiling on SMP configurations.
Delete CORE spinlock implementation.
Update #2674.
|
|
|
|
Delete unused _Thread_queue_Enqueue() and rename
_Thread_queue_Enqueue_critical() to _Thread_queue_Enqueue().
|
|
Replace the expected thread dispatch disable level with a thread queue
enqueue callout. This enables the use of _Thread_Dispatch_direct() in
the thread queue enqueue procedure. This avoids impossible exection
paths, e.g. Per_CPU_Control::dispatch_necessary is always true.
|
|
On SMP configurations, it is a fatal error to call blocking operating
system with interrupts disabled, since this prevents delivery of
inter-processor interrupts. This could lead to executing threads which
are not allowed to execute resulting in undefined behaviour.
The ARM Cortex-M port has a similar problem, since the interrupt state
is not a part of the thread context.
Update #2811.
|
|
|
|
Use the right register to determine if a thread dispatch is allowed and
necessary.
Update #2751.
|
|
This fixes the CPU ports with relaxed alignment restrictions, e.g. type
alignment is less than the type size.
Close #2822.
Close #2823.
|
|
We cannot use the MRS or MSR instructions in Thumb-1 mode. Stay in ARM
mode for the Thumb-1 targets during interrupt low-level processing.
Update #2751.
|
|
Close #2820.
|
|
Update #2820.
|
|
Close #2818.
|
|
Close #2816.
|
|
Close #2817.
|
|
Avoid use of the stack for the hot paths.
|
|
|
|
In contrast to _ISR_Get_level() the _ISR_Is_enabled() function evaluates
a level parameter and returns a boolean value.
Update #2811.
|
|
Update #2811.
|
|
Update #2751.
|
