| Commit message (Collapse) | Author | Age | Files | Lines |
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Add Thread_Control::is_in_the_air field if configured for SMP. This
helps to simplify the extract operation and avoids superfluous
inter-processor interrupts. Move the processor allocation step into the
enqueue operation.
Add and use _Scheduler_simple_smp_Get_highest_ready(). Add and use
_Scheduler_SMP_Get_lowest_scheduled().
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Rename _Scheduler_simple_smp_Allocate_processor() to
_Scheduler_SMP_Allocate_processor().
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Rename _Scheduler_simple_smp_Start_idle() to
_Scheduler_SMP_Start_idle().
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Replace Scheduler_simple_smp_Control with Scheduler_SMP_Control. Rename
_Scheduler_simple_smp_Instance() to _Scheduler_SMP_Instance().
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Add call to _Scheduler_Schedule() in missing path after
_Thread_Set_transient() in _Thread_Change_priority(). See also
sptests/spintrcritical19.
Add thread parameter to _Scheduler_Schedule(). This parameter is
currently unused but may be used in future SMP schedulers.
Do heir selection in _Scheduler_Schedule(). Use
_Scheduler_Update_heir() for this in the particular scheduler
implementation.
Add and use _Scheduler_Generic_block().
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Use a per-CPU thread dispatch disable level. So instead of one global
thread dispatch disable level we have now one instance per processor.
This is a major performance improvement for SMP. On non-SMP
configurations this may simplifiy the interrupt entry/exit code.
The giant lock is still present, but it is now decoupled from the thread
dispatching in _Thread_Dispatch(), _Thread_Handler(),
_Thread_Restart_self() and the interrupt entry/exit. Access to the
giant lock is now available via _Giant_Acquire() and _Giant_Release().
The giant lock is still implicitly acquired via
_Thread_Dispatch_decrement_disable_level().
The giant lock is only acquired for high-level operations in interrupt
handlers (e.g. release of a semaphore, sending of an event).
As a side-effect this change fixes the lost thread dispatch necessary
indication bug in _Thread_Dispatch().
A per-CPU thread dispatch disable level greatly simplifies the SMP
support for the interrupt entry/exit code since no spin locks have to be
acquired in this area. It is only necessary to get the current
processor index and use this to calculate the address of the own per-CPU
control. This reduces the interrupt latency considerably.
All elements for the interrupt entry/exit code are now part of the
Per_CPU_Control structure: thread dispatch disable level, ISR nest level
and thread dispatch necessary. Nothing else is required (except CPU
port specific stuff like on SPARC).
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Use an event triggered unicast to inform remote processors about a
necessary thread dispatch instead.
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Move implementation specific parts of schedulerpriority.h and
schedulerpriority.inl into new header file schedulerpriorityimpl.h. The
schedulerpriority.h contains now only the application visible API.
Add missing includes. Remove superfluous includes.
Move declaration of _Priority_Bit_map to prioritybitmap.inl since this
variable is used only here.
Remove second declaration of _Priority_Major_bit_map.
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Move implementation specific parts of schedulersimple.h and
schedulersimple.inl into new header file schedulersimpleimpl.h. The
schedulersimple.h contains now only the application visible API.
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The new Simple SMP Scheduler allocates a processor for the processor
count highest priority ready threads. The thread priority and position
in the ready chain are the only information to determine the scheduling
decision. Threads with an allocated processor are in the scheduled
chain. After initialization the scheduled chain has exactly processor
count nodes. Each processor has exactly one allocated thread after
initialization. All enqueue and extract operations may exchange threads
with the scheduled chain. One thread will be added and another will be
removed. The scheduled and ready chain is ordered according to the
thread priority order. The chain insert operations are O(count of ready
threads), thus this scheduler is unsuitable for most real-time
applications.
The thread preempt mode will be ignored.
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