| Commit message (Collapse) | Author | Age | Files | Lines |
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Add call to _Scheduler_Schedule() in missing path after
_Thread_Set_transient() in _Thread_Change_priority(). See also
sptests/spintrcritical19.
Add thread parameter to _Scheduler_Schedule(). This parameter is
currently unused but may be used in future SMP schedulers.
Do heir selection in _Scheduler_Schedule(). Use
_Scheduler_Update_heir() for this in the particular scheduler
implementation.
Add and use _Scheduler_Generic_block().
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Use a per-CPU thread dispatch disable level. So instead of one global
thread dispatch disable level we have now one instance per processor.
This is a major performance improvement for SMP. On non-SMP
configurations this may simplifiy the interrupt entry/exit code.
The giant lock is still present, but it is now decoupled from the thread
dispatching in _Thread_Dispatch(), _Thread_Handler(),
_Thread_Restart_self() and the interrupt entry/exit. Access to the
giant lock is now available via _Giant_Acquire() and _Giant_Release().
The giant lock is still implicitly acquired via
_Thread_Dispatch_decrement_disable_level().
The giant lock is only acquired for high-level operations in interrupt
handlers (e.g. release of a semaphore, sending of an event).
As a side-effect this change fixes the lost thread dispatch necessary
indication bug in _Thread_Dispatch().
A per-CPU thread dispatch disable level greatly simplifies the SMP
support for the interrupt entry/exit code since no spin locks have to be
acquired in this area. It is only necessary to get the current
processor index and use this to calculate the address of the own per-CPU
control. This reduces the interrupt latency considerably.
All elements for the interrupt entry/exit code are now part of the
Per_CPU_Control structure: thread dispatch disable level, ISR nest level
and thread dispatch necessary. Nothing else is required (except CPU
port specific stuff like on SPARC).
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Add and use _Per_CPU_Release_all().
The context switch user extensions are invoked in _Thread_Dispatch().
This change is necessary to avoid the giant lock in _Thread_Dispatch().
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Rename _Per_CPU_Lock_acquire() to _Per_CPU_ISR_disable_and_acquire().
Rename _Per_CPU_Lock_release() to _Per_CPU_Release_and_ISR_enable().
Add _Per_CPU_Acquire() and _Per_CPU_Release().
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Add CPU port specific per-CPU control.
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Rename _Scheduler_simple_Update() in _Scheduler_default_Update().
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Rename _Scheduler_simple_Allocate() in _Scheduler_default_Allocate().
Rename _Scheduler_simple_Free() in _Scheduler_default_Free().
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Rename _Scheduler_priority_Release_job() into
_Scheduler_default_Release_job().
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Add context parameter to _Thread_Start_multitasking() and use this
function in rtems_smp_secondary_cpu_initialize(). This avoids
duplication of code.
Fix missing floating point context initialization in
rtems_smp_secondary_cpu_initialize(). Now performed via
_Thread_Start_multitasking().
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Nothing happened between the SYSTEM_STATE_BEGIN_MULTITASKING to
SYSTEM_STATE_UP transition.
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Two issues are addressed.
1. On single processor configurations the set/get of the now/uptime
timestamps is now consistently protected by ISR disable/enable
sequences. Previously nested interrupts could observe partially written
values since 64-bit writes are not atomic on 32-bit architectures in
general. This could lead to non-monotonic uptime timestamps.
2. The TOD now/uptime maintanence is now independent of the giant lock.
This is the first step to remove the giant lock in _Thread_Dispatch().
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Move the nanoseconds since last tick support from the Watchdog to the
TOD handler. Now the TOD managment is encapsulated in the TOD_Control
structure.
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Fix _times().
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ISR locks are low-level locks to protect critical sections accessed by
threads and interrupt service routines.
On single processor configurations the ISR locks degrade to simple ISR
disable/enable sequences. No additional storage or objects are
required.
This synchronization primitive is supported on SMP configurations. Here
SMP locks are used.
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Delete _Per_CPU_Information_p.
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Use an event triggered unicast to inform remote processors about a
necessary thread dispatch instead.
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Rename to _RTEMS_Tasks_Dispatch_if_necessary().
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Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(),
_ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash().
The ISR disable/enable interface has no parameter to pass a specific
object. Thus it is only possible to implement a single global lock
object with this interface. Using the ISR disable/enable as the giant
lock on SMP configurations is not feasible.
Potentially blocking resource obtain sequences protected by the thread
dispatch disable level are subdivided into smaller ISR disabled critical
sections. This works since on single processor configurations there is
only one thread of execution that can block. On SMP this is different
(image a mutex obtained concurrently by different threads on different
processors).
The thread dispatch disable level is currently used as the giant lock.
There is not need to complicate things with this unused interface.
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Thread dispatching must be repressed to use the per CPU control of the
current processor consistently.
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Add and use _Per_CPU_Get_by_index() and _Per_CPU_Get_index(). Add
_Per_CPU_Send_interrupt(). This avoids direct access of
_Per_CPU_Information.
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Delete TOD_MICROSECONDS_PER_SECOND, TOD_MICROSECONDS_TO_TICKS() and
TOD_MILLISECONDS_TO_TICKS().
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Move implementation specific parts of object.h and object.inl into new
header file objectimpl.h. The object.h contains now only the
application visible API.
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Move implementation specific parts of mpci.h into new header file
mpciimpl.h. The mpci.h contains now only the application visible API.
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Move implementation specific parts of tqdata.h, threadq.h and
threadq.inl into new header file threadqimpl.h. The threadq.h contains
now only the application visible API.
Delete tqdata.h.
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Move implementation specific parts of states.h and states.inl into new
header file statesimpl.h. The states.h contains now only the
application visible API.
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Move implementation specific parts of thread.h and thread.inl into new
header file threadimpl.h. The thread.h contains now only the
application visible API.
Remove superfluous header file includes from various files.
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Move implementation specific parts of prioritybitmap.h and
prioritybitmap.inl into new header file prioritybitmapimpl.h. The
prioritybitmap.h contains now only the application visible API.
Move content of bitfield.h into prioritybitmapimpl.h.
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Move implementation specific parts of scheduler.h and scheduler.inl into
new header file schedulerimpl.h. The scheduler.h contains now only the
application visible API.
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Move implementation specific parts of schedulerpriority.h and
schedulerpriority.inl into new header file schedulerpriorityimpl.h. The
schedulerpriority.h contains now only the application visible API.
Add missing includes. Remove superfluous includes.
Move declaration of _Priority_Bit_map to prioritybitmap.inl since this
variable is used only here.
Remove second declaration of _Priority_Major_bit_map.
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Move implementation specific parts of schedulersimple.h and
schedulersimple.inl into new header file schedulersimpleimpl.h. The
schedulersimple.h contains now only the application visible API.
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This function is used in bootcard.h.
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This file uses CPU_ALIGNMENT.
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