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2017-01-24Remove CPU_BIG_ENDIAN and CPU_LITTLE_ENDIANSebastian Huber17-310/+0
2016-12-12score: Introduce _Internal_error()Sebastian Huber1-1/+1
2016-12-09score: Remove fatal is internal indicatorSebastian Huber4-8/+4
2016-12-02score: Fix ARM and PowerPC context initializationSebastian Huber2-0/+5
2016-11-28sparc: Optimize _ISR_Handler()Sebastian Huber1-0/+3
2016-11-24arm: Fix _CPU_ISR_Is_enabled() for ARMv7-MSebastian Huber1-1/+1
2016-11-23score: Robust thread dispatchSebastian Huber17-0/+47
2016-11-23arm: Fix _ARMV4_Exception_interruptSebastian Huber1-1/+1
2016-11-21arm: Fix Thumb-1 targetsSebastian Huber2-10/+40
2016-11-21sparc64: Fix _CPU_ISR_Is_enabled()Sebastian Huber1-1/+1
2016-11-21nios2: Fix _CPU_ISR_Is_enabled()Sebastian Huber1-4/+4
2016-11-21arm: Fix ARM_CONTEXT_CONTROL_ISR_DISPATCH_DISABLESebastian Huber1-2/+4
2016-11-21bfin: ASM compatibility for <rtems/score/cpu.h>Sebastian Huber1-2/+2
2016-11-18score: Add _ISR_Is_enabled()Sebastian Huber18-2/+112
2016-11-18powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2-2/+5
2016-11-18arm: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber4-31/+94
2016-11-18arm: Simplify _ARMV4_Exception_interruptSebastian Huber1-18/+22
2016-11-18arm: Use local labelsSebastian Huber1-9/+9
2016-11-18sparc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2-22/+5
2016-11-18score: Allow interrupts during thread dispatchSebastian Huber1-3/+7
2016-11-18score: Add Per_CPU_Control::Interrupt_frameSebastian Huber1-5/+0
2016-11-18arm: Provide CPU_Interrupt_frame for ARMv4Sebastian Huber2-3/+55
2016-11-18powerpc: Add up to date CPU_Interrupt_frameSebastian Huber2-6/+386
2016-11-18powerpc: Move legacy CPU_Interrupt_frameSebastian Huber1-31/+0
2016-11-18sparc: Move CPU_Interrupt_frame related definesSebastian Huber5-54/+58
2016-11-18sparc: Rename CPU_Minimum_stack_frameSebastian Huber4-26/+26
2016-11-18sparc64: Rename CPU_Minimum_stack_frameSebastian Huber3-30/+30
2016-11-18rtems: Conditionally define rtems_interrupt_frameSebastian Huber14-14/+14
2016-11-18score: Move CPU_PER_CPU_CONTROL_SIZESebastian Huber34-94/+125
2016-11-18score: Remove obsolete definesSebastian Huber17-270/+0
2016-11-18arm: Use TPIDRPRW for current per-CPU controlSebastian Huber4-9/+30
2016-11-10powerpc: Add _CPU_Get_current_per_CPU_control()Sebastian Huber1-0/+27
2016-11-10score: Move _CPU_Get_current_per_CPU_control()Sebastian Huber4-28/+28
2016-11-07sparc: Provide _CPU_Get_thread_executing()Sebastian Huber1-0/+4
2016-11-07score: Add optional _CPU_Get_thread_executing()Sebastian Huber1-0/+12
2016-11-07score: Add <rtems/score/cpuimpl.h>Sebastian Huber51-0/+595
2016-10-04score/arm: Correct logic to select 64 byte cache line maximum size for Cortex-A.Pavel Pisa1-2/+2
2016-09-23score: Fix C/C++ compatibility issueSebastian Huber16-59/+5
2016-09-08stackchk: Use a const pattern to checkSebastian Huber1-1/+9
2016-08-19arm: Add VFP context validate support for ARMv5Kevin Kirspel2-5/+11
2016-07-26score: Fix printk() format specifiersSebastian Huber1-2/+5
2016-07-04score/arm: Ensure that copile time alignment is 64 bytes for Cortex-A multilib.Pavel Pisa2-2/+9
2016-07-04arm/score and shared: define ARM hypervisor mode and alternate vector table b...Pavel Pisa1-0/+1
2016-06-29score: _CPU_SMP_Send_interrupt() documentationSebastian Huber1-4/+0
2016-06-22sparc: Optimize CPU counter supportSebastian Huber5-38/+98
2016-06-21sparc: Rework CPU counter supportSebastian Huber4-26/+88
2016-06-13i386: Fix _CPU_Bitfield_Find_first_bit()Sebastian Huber1-6/+5
2016-06-08score: Simplify priority bit map implementationSebastian Huber20-41/+2
2016-06-08score: Delete CPU_USE_GENERIC_BITFIELD_DATASebastian Huber18-47/+4
2016-06-08powerpc: Define bitmap defines to FALSESebastian Huber1-0/+4
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