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2002-01-162002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill3-2/+9
* asm.h: Remove #include <rtems/score/targopts.h>. Add #include <rtems/score/cpuopts.h>.
2002-01-162002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill4-5/+9
* asm.h: Remove #include <rtems/score/targopts.h>. Add #include <rtems/score/cpuopts.h>. * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
2002-01-082002-01-07 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2-0/+6
* rtems/score/cpu.h: #include <rtems/bspIo.h>.
2002-01-062002-02-05 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill4-6/+8
* configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP.
2002-01-062002-01-03 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill4-2/+10
* cpu.c: Include rtems/bspIo.h instead of bspIo.h.
2001-12-202001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill6-3/+15
* configure.ac: Use RTEMS_ENV_RTEMSCPU.
2001-12-192001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill32-45/+109
* Makefile.am: Add multilib support.
2001-12-182001-12-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill4-3/+8
* asm.h: include cpuopts.h instead of targopts.h * rtems/score/arm.h: Use __arm__.
2001-11-282001-11-28 Joel Sherrill <joel@OARcorp.com>,Joel Sherrill32-0/+231
This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation.
2001-11-282001-11-28 Joel Sherrill <joel@OARcorp.com>,Joel Sherrill2-0/+14
This was tracked as PR91. * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which is used to specify if the port uses the standard macro for this (FALSE). A TRUE setting indicates the port provides its own implementation. * rtems/score/c_isr.inl: Deleted and contents merged into cpu.c. * cpu.c: Received contents of c_isr.inl. * Makefile.am: Deleted reference to c_isr.inl.
2001-11-202001-11-20 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-0/+2180
* support/new_exception_processing/configure.ac, support/new_exception_processing/rtems/score/c_isr.inl, support/new_exception_processing/rtems/score/cpu.h, support/old_exception_processing/configure.ac, support/old_exception_processing/rtems/score/c_isr.inl, support/old_exception_processing/rtems/score/cpu.h, support/old_exception_processing/rtems/score/ppc_offs.h: New files missed in previous commit.
2001-11-142001-11-14 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-1/+5
* shared/ppc.h: The mpc8260 uses the new exception processing model and thus does not need to define PPC_USE_SPRG.
2001-11-142001-11-14 Andrew Dachs <A.Dachs@SSTL.co.uk>Joel Sherrill2-1/+5
* shared/ppc.h: mpc8260 has double FPU not single FPU.
2001-11-082001-11-08 Dennis Ehlin (ECS) <Dennis.Ehlin@ecs.ericsson.se>Joel Sherrill4-8/+35
This modification is part of the submitted modifications necessary to support the IBM PPC405 family. This submission was reviewed by Thomas Doerfler <Thomas.Doerfler@imd-systems.de> who ensured it did not negatively impact the ppc403 BSPs. The submission and tracking process was captured as PR50. * shared/asm.h, shared/ppc.h: Added PPC405 support.
2001-10-222001-10-22 Andy Dachs <a.dachs@sstl.co.uk>Joel Sherrill2-2/+101
* shared/ppc.h: Added mpc8260 support.
2001-10-152001-10-15 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2-1/+6
* cpu.c: Fix #ifdefs, add missing #endif.
2001-10-122001-10-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-1/+4
* shared/ppctypes.h: Fixed typo.
2001-10-122001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill3-0/+95
* .cvsignore: Add autom4te.cache for autoconf > 2.52. * configure.in: Remove.
2001-10-122001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill1-0/+38
* .cvsignore: Add autom4te.cache for autoconf > 2.52. * configure.in: Remove.
2001-10-122001-10-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill8-23/+58
* asm.h, cpu.c, rtems.c, rtems/score/cpu.h, rtems/score/sh.h, rtems/score/sh_io.h, rtems/score/shtypes.h: Consistency changes and made sure there were no includes from the libcpu tree.
2001-10-122001-10-12 Alexandra Kossovsky <sasha@oktet.ru>Joel Sherrill4-16/+146
* cpu.c, rtems/score/cpu.h, rtems/score/sh.h: Modified to support SH4. Reviewed by Ralf Corsepius <corsepiu@faw.uni-ulm.de> who did the original SH port.
2001-10-122001-10-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-2/+8
* cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional compilation block with (CPU_HARDWARE_FP == FALSE). Reported by Wayne Bullaughey <wayne@wmi.com>.
2001-10-112001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill8-0/+28
* .cvsignore: Add autom4te.cache for autoconf > 2.52. * configure.in: Remove. * configure.ac: New file, generated from configure.in by autoupdate.
2001-10-112001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill39-0/+516
* .cvsignore: Add autom4te.cache for autoconf > 2.52. * configure.in: Remove. * configure.ac: New file, generated from configure.in by autoupdate.
2001-09-282001-09-27 Jiri Gaisler <jiri@gaisler.com>Joel Sherrill1-0/+7
* cpu_asm.S: Small patch to fix a bug in the rtems sparc port. The bug has been there all the time, but only hits the leon bsp since the leon cpu has a 5-stage pipeline (erc32 has 4 stages).
2001-09-272001-09-27 Jiri Gaisler <jiri@gaisler.com>Joel Sherrill1-4/+4
* cpu_asm.S: Small patch to fix a bug in the rtems sparc port. The bug has been there all the time, but only hits the leon bsp since the leon cpu has a 5-stage pipeline (erc32 has 4 stages).
2001-09-272001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill29-14/+89
* rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='. * Makefile.am: Use 'PREINSTALL_FILES ='.
2001-09-272001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill1-0/+4
* shared/Makefile.am: Use 'PREINSTALL_FILES ='.
2001-09-272001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill1-0/+4
* rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
2001-08-162001-07-25 Radzislaw Galler <rgaller@et.put.poznan.pl>Joel Sherrill2-1/+10
* cpu.c (_CPU_ISR_install_vector): Corrected interrupt range checking which was SH1 specific. It didn't work for SH2 (has more interrupt sources).
2001-08-092001-08-09 Chris Johns <ccj@acm.org>Joel Sherrill2-63/+48
* cpu_asm.S: This patch was co-developed with Eric Norum <eric.norum@usask.ca>. It closes a one instruction window on some m68k CPU cores. It fixes symptoms seen as: 1) No more `interrupt handler invoked twice for a single interrupt'. 2) No more `lockup when mc68360 CPM and PIT interrupts are at different levels'. It does insert a little more overhead on machines without hardware interrupt stacks but correctness has a price.
2001-07-032001-07-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-1/+5
* cpu.c: Fixed typo.
2001-05-242000-05-24 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-7/+38
* rtems/score/mips.h: Added constants for MIPS exception numbers. All exceptions should be given low numbers and thus can be installed and processed in a uniform manner. Variances between various MIPS ISA levels were not accounted for.
2001-05-242000-05-24 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-0/+7
* rtems/score/mips.h: Added constants for MIPS exception numbers. All exceptions should be given low numbers and thus can be installed and processed in a uniform manner. Variances between various MIPS ISA levels were not accounted for.
2001-05-242001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov>Joel Sherrill2-57/+157
* Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>. * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch.
2001-05-222001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov>Joel Sherrill3-21/+86
* rtems/score/cpu.h: Add the interrupt stack structure and enhance the context initialization to account for floating point tasks. * rtems/score/mips.h: Added the routines mips_set_cause(), mips_get_fcr31(), and mips_set_fcr31(). * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
2001-05-082001-05-07 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2-2/+4
* rtems/score/cpu.h: Remove #undef __STRICT_ANSI__.
2001-05-072001-05-07 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-67/+95
* cpu_asm.S: Merged patches from Gregory Menke <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up stack usage and include nops in the delay slots.
2001-04-202001-04-20 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-0/+15
* cpu_asm.S: Added code to save and restore SR and EPC to properly support nested interrupts. Note that the ISR (not RTEMS) enables interrupts allowing the nesting to occur.
2001-04-112001-04-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-2/+4
* cpu.c: Removed duplicate declaration for _ISR_Vector_table.
2001-03-142001-03-14 Joel Sherrill <joel@OARcorp.com>Joel Sherrill5-79/+57
* cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: Removed unused variable _CPU_Thread_dispatch_pointer and cleaned numerous comments.
2001-03-142001-03-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill7-722/+408
* cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h: Merged MIPS1 and MIPS3 code reducing the number of lines of assembly. Also reimplemented some assembly routines in C further reducing the amount of assembly and increasing maintainability.
2001-02-052001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill32-57/+128
* Makefile.am, rtems/score/Makefile.am: Apply include_*HEADERS instead of H_FILES.
2001-01-252001-01-25 Joel Sherrill <joel@OARcorp.com>Joel Sherrill3-6/+16
* cpu.c, rtems/score/cpu.h: Bug report from Peter Mueller <peter.o.mueller@gmx.de> because of not correcting for the ISR vector table now being allocated from the workspace.
2001-01-122001-01-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2-2/+7
* rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected register constraints from "general" to "register".
2001-01-092001-01-09 Joel Sherrill <joel@OARcorp.com>Joel Sherrill4-6/+27
* cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants to make it easier to conditionalize the code for various ISA levels.
2001-01-082001-01-08 Joel Sherrill <joel@OARcorp.com>Joel Sherrill5-3/+18
* idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
2001-01-032001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill12-6/+92
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
2001-01-032001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill12-7/+61
* rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Modify to properly dereference _ISR_Vector_table now that it is dynamically allocated.
2001-01-032001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill3-7/+20
* rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
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